Test Procedure for the KSZ8851-16MLL Eval Board Test Procedure for the KSZ8851-16MLL (48-pin) Eval Board Version 1.1 August 2010 Micrel Confidential 1 July 2008 Test Procedure for the KSZ8851-16MLL Eval Board Content 1 INTRODUCTION........................................................................................................ 3 2 REQUIRED TEST EQUIPMENT ............................................................................. 3 3 SYSTEM CONNECTIVITY AND SET-UP FOR TEST ....................................... 3 4 BOARD TEST PROCEDURES .................................................................................. 4 4.1 4.2 4.3 4.4 4.5 VERIFYING ON BOARD LDO 3.3V OUTPUT FOR VDD_IO ............................... 4 VERIFYING ON BOARD LDO 2.5V OUTPUT FOR VDD_IO ............................... 4 VERIFYING ON BOARD LDO 1.8V OUTPUT FOR VDD_IO ............................... 4 VERIFYING POWER CONSUMPTION ........................................................................ 5 VERIFYING ETHERNET LINK AND LED STATUS ................................................. 5 List of Figures Figure 1: KSZ8851-16MLL Eval Board Test Set-up .............................. 4 List of Tables Table 1: KSZ8851-16MLL Eval Board Jumper Setting ......................... 3 Revision History Revision Date 1.0 07-18-08 1.1 08-06-10 Summary of Changes Initial Release Add JP8 and LED pull up to 3.3V Micrel Confidential 2 July 2008 Test Procedure for the KSZ8851-16MLL Eval Board 1 Introduction This document describes a test procedure required to bring-up a new KSZ885116MLL Eval board. This board is designed to provide a convenient way to evaluate or demonstrate the functionality and performance of the Single-port Ethernet MAC Controller. This KSZ8851-16MLL Eval board can operate on either 8-bit or 16-bit generic bus interfacing to any external Microprocessor. By default the KSZ8851-16MLL Eval board comes with an operation of 16-bit bus mode, Little Endian mode and disabled EEPROM interface. 2 Required Test Equipment ¾ Agilent +5 volt DC power supply. ¾ 10/100 Ethernet Smartbit Module. ¾ Ethernet cable and Power wires. 3 System Connectivity and Set-up for Test The KSZ8851-16MLL Eval board test set up as shown in the Figure 1. The KSZ8851-16MLL-Eval board receives +5V power from the header JP1. The following Table shows all the default jumper settings and connections for the KSZ8851-16MLL Eval Board Test. Jumper JP1 Definition Pin 1 or 3 Setting Description 5.0V_IN +5V power supply input pins for this board Pin 2 or 4 GND Ground input pins JP2 EED_IO OFF (Default) OFF: EEPROM is not present ON: EEPROM is present JP3 3.3V ON (Default) ON: to select 3.3V for VDD_IO (JP5 and JP6 must be OFF) OFF: De-select 3.3V JP4 EESK OFF (Default) OFF: Little Endian ON: Big Endian JP5 2.5V OFF (Default) ON: to select 2.5V for VDD_IO (JP3 and JP6 must be OFF) OFF: De-select 2.5V JP6 1.8V OFF (Default) ON: to select 1.8V for VDD_IO (JP3 and JP5 must be OFF) OFF: De-select 1.8V JP7 P1LED1 OFF (Default) OFF: 16-Bit bus mode ON: 8-Bit bus mode JP8 VDD_IO OFF (Default) OFF: VDD_IO = 2.5V or 3.3V ON: VDD_IO = 1.8V Table 1: KSZ8851-16MLL Eval Board Jumper Setting Micrel Confidential 3 July 2008 Test Procedure for the KSZ8851-16MLL Eval Board Please perform the following steps to power on the Eval Board for test: 1. Connect the Ethernet cable between the Smartbit and the Eval Board 2. Connect the +5V DC power wires to Eval Board on pin 1 (+5V) and pin 2 (GND) of JP1. Figure 1: KSZ8851-16MLL Eval Board Test Set-up 4 Board Test Procedures 4.1 Verifying on Board LDO 3.3V Output for VDD_IO To make sure the jumper JP3 is “ON” to select 3.3V for VDD_IO (JP5 and JP6 must be OFF), then Power up +5V supply from Agilent to the KSZ8851-16MLL Eval board. To measure three Test Points voltage as below: TP1 (VDD_IO) = 3.3V +/-5% (The U5 is bad if there is no 3.3V) TP2 (3.3VA) = 3.3V +/-5% (The U3 is bad if there is no 3.3V) TP3 (1.8V) = 1.8V +/-5% (The KSZ8851-16MLL is bad if there is no 1.8V) 4.2 Verifying on Board LDO 2.5V Output for VDD_IO To make sure the jumper JP5 is “ON” to select 2.5V for VDD_IO (JP3 and JP6 must be OFF), then Power up +5V supply from Agilent to the KSZ8851-16MLL Eval board. To measure three Test Points voltage as below: TP1 (VDD_IO) = 2.5V +/-5% (The U5 is bad if there is no 2.5V) TP2 (3.3VA) = 3.3V +/-5% (The U3 is bad if there is no 3.3V) TP3 (1.8V) = 1.8V +/-5% (The KSZ8851-16MLL is bad if there is no 1.8V) 4.3 Verifying on Board LDO 1.8V Output for VDD_IO JP8 must be “ON” in order to supply the 1.8V to KSZ8851M when VDD_IO is 1.8V. To make sure the jumper JP6 is “ON” to select 1.8V for VDD_IO (JP3 and JP5 must be OFF), then Power up +5V supply from Agilent to the KSZ885116MLL Eval board. These Test Points must measure as below: TP1 (VDD_IO) = 1.8V +/-5% (The U5 is bad if there is no 1.8V) Micrel Confidential 4 July 2008 Test Procedure for the KSZ8851-16MLL Eval Board TP2 (3.3VA) = 3.3V +/-5% (The U3 is bad if there is no 3.3V) TP3 (1.8V) = 1.8V +/-5% (The U5 is bad if there is no 1.8V) 4.4 Verifying Power Consumption Power up +5V supply from Agilent to the KSZ8851-16MLL Eval board, the current consumption must be around 100mA during link down and around 150mA during link up (at 100BT). 4.5 Verifying Ethernet Link and LED Status Power up +5V supply from Agilent to the KSZ8851-16MLL Eval board and connect Ethernet cable from Smartbit to KSZ8851-16MLL Eval board. To make sure both LED are on when Smartbit is set auto-neg enabled, then send continuous packets to KSZ8851M, check the upper LED is blinking. All three VDD_IO voltages 3.3V (JP3 ON), 2.5V (JP5 ON) and 1.8V (JP6 ON and JP8 ON) have to test for Ethernet link and LED status. Micrel Confidential 5 July 2008