TB3063 SPI Communication with the AR1020 Controller Author: SIQ “SPI Interrupt” – The AR1020 controller’s SIQ pin provides an OPTIONAL interrupt output from the controller to the host. Cassandra Backus Microchip Technology Inc. The AR1020 controller’s SPI (Serial Peripheral Interface) communicates as a slave mode device with 3-5 interface pins. • The SIQ pin is asserted high when the controller has data available (a touch report or a command response) for the host. • The SIQ pin is de-asserted after the host clocks out the first byte of the data packet. INTERFACE PIN FUNCTIONALITY SS “Slave Select” – The AR1020 controller’s SS pin provides OPTIONAL “Slave Select” functionality. INTRODUCTION • The AR1020 controller is SPI selected (active) when the SS pin is host driven to the controller’s VSS level. • The AR1020 controller’s SPI is deselected (inactive) when the SS pin is host driven to the controller’s VDD level. In this state, the controller’s SDO pin presents a high impedance in order to prevent bus contention with another device on the SPI bus. • If host control over “selecting” the AR1020 controller is not desired, then the SS pin should be hardware connected to the controller's VSS level. SCK “Serial Clock” – The AR1020 controller’s SCL/ SCK/TX pin receives Serial Clock (SCK), controlled by the host. • The Idle state of the SCK should be low. • Data is transmitted on the falling edge of SCK. SDI “Serial Data In” – The AR1020 controller’s SDI/ SDA/RX pin reads Serial Data Input (SDI), sent by the host. SDO “Serial Data Out” – The AR1020 controller’s SDO pin presents Serial Data Output (SDO) to the host. TABLE 1: PIN VOLTAGE LEVEL CHARACTERISTICS(1) Function Pin Input Output SCK SCL/SCK/TX VSS < VIL < 0.2*VDD 0.8*VDD < VIH < VDD — SDI SDI/SDA/RX VSS < VIL < 0.2*VDD 0.8*VDD < VIH < VDD — SDO SDO — VSS < VOL(2) < (1.2V – 0.15*VDD(3) (1.25*VDD – 2.25V)(4) < VOH(1) < VDD SS SS VSS < VIL < 0.2*VDD 0.8*VDD < VIH < VDD — Note 1: 2: 3: 4: Operating voltage: 3.15V < VDD < 5.25V These parameters are characterized but not tested. At 10 mA. At -4 mA. 2010 Microchip Technology Inc. DS93063A-page 1 TB3063 DATA FLOW TOUCH REPORT PROTOCOL SPI data is transferred by the host clocking the AR1020 controller’s Serial Clock (SCK) pin. The AR1020 controller’s touch reporting is interrupt driven. Each host driven clock cycle simultaneously shifts a bit of data into and out from the AR1020 controller. 1. • Out from the AR1020 controller’s Serial Data Out (SDO) line. • Into the AR1020 controller’s Serial Data In (SDI) line. 2. The data is shifted Most Significant bit (MSb) first. If the host clocks data out from the AR1020 controller when no valid data is available, then a byte value of 0x4d will be presented by the controller. FIGURE 1: The AR1020 controller asserts the SIQ interrupt pin high when a touch report is ready. The host clocks out the bytes of the touch report packet from the AR1020 controller. The AR1020 controller clears the SIQ interrupt pin low, after the first byte of the touch report packet has been clocked out by the host. The communication protocol for the AR1020 controller reporting touches to the host is shown in Figure 1. AR1020 COMMUNICATION PROTOCOL (SIQ) COMMAND PROTOCOL The AR1020 controller receives commands from the host as follows: 1. 2. 3. The host clocks the bytes of a command to the AR1020 controller. The AR1020 controller asserts the SIQ interrupt pin high when it is ready with a response to the command sent by the host. The host clocks out the bytes of the command response from the AR1020 controller. The AR1020 controller clears the SIQ interrupt pin low, after the first byte of the command response has been clocked out by the host. The communication protocol for the host sending a command to the AR1020 controller is shown in Figure 2. DS93063A-page 2 2010 Microchip Technology Inc. TB3063 FIGURE 2: COMMAND PROTOCOL FOR HOST SENDING A COMMAND (SIQ) TIMING – GENERAL WAVEFORM General timing waveforms are shown in Figure 3. FIGURE 3: GENERAL TIMING WAVEFORMS 2010 Microchip Technology Inc. DS93063A-page 3 TB3063 TIMING – BIT DETAILS Inter-Byte Delay Bit Rate The SPI standard does not specify a maximum data rate for the serial bus. In general, SPI data rates can be in the MHz. Peripherals devices, such as the AR1020 controller, specify their own unique maximum SPI data rates. The maximum SPI bit rate for the AR1020 controller is ~900 KHz. The AR1020 controller requires an inter-byte delay of ~50 us. This means the host should wait ~50 us between the end of clocking a given byte, and the start of clocking the next byte. Characterized Timing Characterized timing details are shown in Figure 4 and Table 2. Characterization has been performed at bit rates of ~39 KHz and ~156 KHz. FIGURE 4: TABLE 2: CHARACTERIZED TIMING DETAILS CHARACTERIZED TIMING DETAILS Parameter Number(1) Parameter Description Minimum 10 SS ↓ (select) to SCK ↑ (initial) 500 — ns 11 SCK high 550 — ns Maximum Units 12 SCK low 550 — ns 13 SCK ↓ (last) to SS ↑ (deselect) 800 — ns 14 SDI setup before SCK↓ 100 — ns 15 SDI hold after SCK↓ 100 — ns 16 SDO valid after SCK↓ — 150 ns 17 SDO↑ rise — 50 ns 18 SDO↓ fall — 50 ns 19 SS↑ (deselect) to SDO Hi-z 10 50 ns Note 1: Parameters are characterized, but not tested. DS93063A-page 4 2010 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2010, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. 2010 Microchip Technology Inc. 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