Application Note 1904 Author: Carlos Martinez ISL94208EVZ Kit Microcode Reference Guide Introduction/Overview Interrupt Structure The following document provides a description of the code supplied with the ISL94208 evaluation kit. This code supports 4- to 6-cell battery pack implementations. The microcode is set up with an interrupt every 250ms. On this interrupt, the cells following subroutines are executed. There is also an interrupt set up on the I2C communication link. This link opens communication between the microcontroller and a USB to I2C interface microcontroller that, in turn, communicates with the PC. During communication to the PC, the ISL94208 microcode interrupts are suspended. In the microcode, there are a number of routines common to an actual battery pack implementation, such as power control, cell monitoring, over and undervoltage protection, overcurrent detection, temperature monitoring, and communication, but the code is provided only as an example of battery pack operation using the ISL94208. It is not intended for use in production battery packs. Process Flow Chart Required Subroutines There are a number of routines included in the microcontroller code. These are: POWER UP/INITIALIZATION (INCLUDING WAKE UP) The flow chart of Figure 1 on page 3 shows the overall process flow for the microcontroller for two basic, but different configurations. In the first flow, determined by the WKPOL bit, when WKPOL equals zero, the pack is waken when a charger connection to the pack terminals pulls the WKUP pin below its wake up threshold by connecting to a charger or a load, or by using the on board push buttons. In the second configuration, when WKPOL is one, the pack is waken by a push button connected to the WKUP pin of the ISL94208. When WKUP goes HIGH, above the wake up threshold, the pack wakes up. In either mode, the pack goes to sleep if at least one of the cell voltages drops below a sleep threshold, there is no current for a long period of time, or if the user sends a sleep command through the GUI. See “Power-up/Initialization” on page 4 CELL MONITORING See “Cell Voltage/Temperature Monitoring” on page 6 OVERVOLTAGE DETECTION/RESPONSE See “Overvoltage Detection/Response” on page 10 UNDERVOLTAGE DETECTION/RESPONSE See “Undervoltage Detection/Response” on page 12 DISCHARGE OVERCURRENT/SHORT CIRCUIT DETECTION/RESPONSE See “Discharge Overcurrent and Short Circuit Detection/Response” on page 15 To operate unattended with WKPOL = 1 requires a firmware change. Since the device operation depends on the state of the WKPOL bit in the ISL94208, and because the WKPOL is a volatile bit with a default setting of “0”, it requires that the microcontroller set this bit on initial power-up. To change this requires a change to the microcode to set the WKPOL to 1 on power-up. Until then, it is necessary to power the board up with WKPOL = 1, connect the board to a PC, and then use the PC GUI to change the WKPOL bit. From then on, the pack operates in the second mode as long as the VBACK pin does not drop below the POR threshold causing the pack to make another “first power-up”. Note: There is one caveat to the use of the pack in the second mode of operation. Releasing the WKUP pin causes the pack to go to sleep. While the pack is asleep, there can be no communication with the pack through the microcontroller. If the pack is to be monitored by the GUI, then the GUI needs to be restarted when the pack wakes up and will only operate while the pack is awake. CHARGE OVERCURRENT DETECTION/RESPONSE Both process flows include only the required functions for safe pack operation. In the ISL94208 evaluation board, there is no current sense monitoring, so a coulomb counting procedure is not possible. An algorithm based on voltage could be added to give the pack some ability to determine remaining capacity. December 6, 2013 AN1904.1 1 See “Charge Overcurrent Detection/Response” on page 18 TEMPERATURE MONITORING/RESPONSE See “Temperature Monitoring/Response” on page 22 COMMUNICATIONS See “Communications” on page 24 CELL BALANCING See “Cell Balancing” on page 25 Optional Subroutines There are also a number of additional routines that may be included in future releases of the code. These are listed as follows: FUEL GAUGING CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2013. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. Application Note 1904 IN-PACK REPROGRAMMABILITY Future revisions of this code could include the ability to reprogram the microcontroller through the external serial interface, without disassembling the battery pack. OTHER FUNCTIONS Other functions may include the addition of LEDs and pushbutton for status or fuel gauge readout, the addition of battery pack manufacturing data and battery pack information (capacity, voltage, cell type, etc), additional power-down states, and interrupt responses to overcurrent conditions. 2 AN1904.1 December 6, 2013 Application Note 1904 System Operation Main Battery cells connected to the ISL94208 devices and the device initially powers up - OR This is a wakeup from sleep. Wait 2.5s after power up First power up-(check UFlg0)? N Y Microcontroller loads only the µC parameters from Flash Put the ISL94208 into a sleep mode (<10µA current). Vreg and µC are off. Notes: In sleep mode, both CFET and DFET outputs are low, the VRGO output is off (µC is off), and the I2C interface is disabled. Check the cell voltages and determine pack configuration If ISL94208 are not in sleep mode, FETs are on or off depending on cell/pack conditions and standby current depends on microcontroller power management operation. Cell voltages + pack conditions OK? N B In sleep mode ICC of the ISL94208 device is less than 10µA. Y Turn on CFET and DFET A Communication from GUI See “Discharge Overcurrent and Short Circuit Detection/Response” on page 15 Y This is an interrupt driven external operation. µC communicates with to the GUI with information. N Discharge O.C. or S.C. condition? Y N Y Charge O.C. condition? See“Charge Overcurrent Detection/Response” on page 18 N N Scan Cells & temperature Y Int or Ext temp too high or Ext temp too low? Do Cell Balance See “Cell Balancing” on page 25 Turn off FETs A N µC detects overvoltage condition? Turn On FETs Y “Overvoltage Detection/Response” on page 10 Y See“Undervoltage Detection/Response” on page 12 N B Y µC detects sleep condition? N µC detects undervoltage condition? FIGURE 1. SYSTEM OPERATION MAIN 3 AN1904.1 December 6, 2013 Application Note 1904 Power-up/Initialization Power-up The ISL94208 devices initially power-up when the voltage on VBACK rises above about 2V and the VCC pin voltage rises above about 6.5V. Generally, in a battery pack this happens only one time when the cells are connected to the PCB. Once the ISL94208 powers up, the internal registers are reset to all zeros. In this code, the microcontroller does not put the pack into the sleep mode on initial power-up. On power-up, the microcontroller checks the status of the UFLG0. If this bit is zero, then this is the first power-up. In this case, the ISL94208 registers are set to their default states and the microcontroller parameters are loaded. If the UFLG0 is “1”, then only the microcontroller values are re-loaded. Sleep Mode The device can enter sleep mode in four ways: • (Optional) After initial power-up, the microcontroller puts the pack to sleep. This will take a coding change. It was dropped out because it makes debug and demonstration of the pack difficult. • The device enters the sleep mode when at least one cell voltage drops below a sleep threshold. This operation is controlled by the microcontroller. • If there is no current detected for a long period of time, the µC puts the pack to sleep. • In response to an external communication from the GUI, the microcontroller sends a command to the ISL94208 through the device serial port. The sleep mode is induced by the microcontroller, by setting the SLEEP bit in register 04H of the ISL94208. Prior to setting the SLEEP bit, the microcontroller turns off the FETs and does any maintenance operations, because in sleep mode the ISL94208 3.3V voltage regulator turns off - powering down the microcontroller. 4 While in sleep mode, the contents of the ISL94208 are maintained by the voltage of VBACK. If the voltage on VBACK drops low enough for the contents of the registers to be lost, then it is likely that the cells are damaged and the pack unusable. However... The microcontroller stores in Flash memory all default register values used to control the pack operation, for two reasons: • On initial power-up, the microcontroller examines the contents of the UFLG0 bit. If this bit is “1” then this is not an initial condition, since the ISL94208 powers up with this bit equal to “0”. In this way, any changes made to the configuration of the ISL94208 is maintained as long as the power remains on the VBACK input. • Since the contents of the registers determines the operation of some critical functions, the microcontroller periodically checks that the register values are correct. Normally this is not a problem, however, it is desired that a short glitch on the VBACK pin or an inadvertent write operation does not compromise the proper operation of the pack. Wake up The device returns from sleep mode when waken by an external signal, usually from the charger, but this could also come from a load or a switch on the board. Note: The wake up signal could even come from the microcontroller, if the microcontroller has its own separate voltage regulator. However, this capability is not to be designed into this code. The wake up signal causes the voltage regulator to power- up. Once the microcontroller powers up, the microcontroller checks the integrity of the registers and scans the cells. In this scan, the microcontroller determines if the cell voltages are too low or too high, if the temperature of the IC and pack is right, and that there is no other safety issue. If everything checks out, then the microcontroller turns on both power FETs. AN1904.1 December 6, 2013 Application Note 1904 TABLE 1. PACK WAKE UP/INITIALIZATION DESCRIPTION Functional Description As soon as the microcontroller powers up, it checks the contents of the ISL94208 registers to determine if they have been reset. It does this by checking the ISL94208 UFLG0. If this bit is zero, then assume that this is the first power-up. In the first power-up, write the ISL94208 register values and initialize the microcontroller. Next, the microcontroller needs to scan all of the cells to make sure none exceed the maximum allowable voltage and none are below the minimum voltage. If any of the cell voltages are too high, the charge FET will remain off. If any of the cell voltages are too low, the discharge FET will remain off. Then, the microcontroller monitors the temperature. If the cell or IC temperature is too high, both FETs remain off. If the cell or IC temperatures are too low, the charger FET remains off. If the voltage and temperature conditions are within spec, the microcontroller turns on both power FETs and begins normal scan operations. OPTIONAL FUNCTIONS SOFTWARE VARIABLES NAME LOCATION DESCRIPTION CHARGESET_REG DISCHARGESET_REG FEATURESET _REG IC values These values are the key parameters (registers 5, 6, and 7) from the ISL94208 that need default values to be mirrored in the microcontroller Flash. OverVoltageTripLevel OverVoltageTripTime OverVoltageRecoveryLevel OverVoltageRecoveryTime UndervoltageTripLevel UnderVoltageTripTime UnderVoltageRecoveryLevel UnderVoltageRecoveryTime UnderVoltageSleepLevel UnderVoltageSleepTime LoadMonitorOnTime LoadMonitorOffTime ChargeOvercurrentWaitTime ChargeOvercurrentRetestTime XTempLower XTempUpper CBOnTime CBOffTime CBCellMinDeltaV CBCellMaxDeltaV CBOverTemp CBUnderTemp CBMinimumBalVoltage CBMaximumBalVoltage CB_Enable_Charge CB_Enable_Discharge Charger_connect CBMaxNumber µC values These values are the key microcontroller parameters for operation of the various subroutines that are controllable by the user through the GUI and need to be kept in RAM in addition to the Flash. 5 AN1904.1 December 6, 2013 Application Note 1904 Cell Voltage/Temperature Monitoring TABLE 2. CELL VOLTAGE MONITORING DESCRIPTION Functional Description The ISL94208 monitors the voltages on each cell. To speed the cell sampling, there is another value (CellPartition) that indicates the number of cells in the pack. For example, a value of 04H indicates that there are 4 cells being monitored. A value of 06H indicates that this is a configuration with 6 cells. Any comments or code referring to cascading or a partition value greater than 06H is unused code and is residual code from previous iterations of the program. The rate of scan is set by an interrupt set to 250ms. A/D conversion, serial communication and settling time are all sequential and start at the internal temperature (AO3:AO0 = 09H). Sampling proceeds to the external temperature, then to the cells starting at CELL6 and working down. After selecting the external temperature, the code needs to wait for about 1ms, so the ISL94208 circuitry can activate in order to check for an external over temperature condition. To measure the cell voltage, the microcontroller sets a value in the Analog Out register to specify the cell being measured. The value for cell voltages measured from the ISL94208 AO pin must be left shifted once after the A/D conversion, since the ISL94208 divides the cell voltages by 2. Temperature measurements should not be shifted, however, the temperature values need to be converted to °C at some point. As part of the cell voltage monitoring, the total pack voltage is calculated. This values (PackVoltage) is provided in the ISL94208 evaluation software GUI display. The microcode samples each cell voltage and then converts it from a hex value to a voltage, which is stored sequentially. If there are fewer than 6 cells, then the middle cells need to be skipped. The skipped cells are determined by the partition value. The scan starts at CELL6, then does CELL5. It then scans CELL4 and CELL3 only if directed by the partition value. The routine finishes by scanning CELL2 and CELL1. If there are 4 cells in the pack; CELL1, CELL2, CELL5, and CELL6, the ADC values will be stored in the first 4 storage locations. Once the voltages are determined, the code checks to see if any cells are overvoltage or undervoltage. See the state machine in figure 3. For details on the overvoltage and undervoltage monitoring, See “Overvoltage Detection/Response” on page 10. and See “Undervoltage Detection/Response” on page 12. Additional Functions The GUI and the microcode work together to provide a calibration mechanism to the ISL94208. Each cell input has its own calibration parameter. The GUI has a calibration tab. The tab will show two columns of data. These are for the voltage applied at each input and the voltage read back from each cell. This allows a single point calibration value that is added or subtracted from the measured cell voltage value. The microcode will use these balance values in a calibration step following each acquisition of a cell voltage or at the end of a voltage scan. Roughly, the calibration procedure is as follows. The user applies a known voltage to the pack (or monitors the voltage at each cell input.) For this single offset value solution, the input voltage should be set to 3.6V per cell. The input voltages are recorded on the GUI input screen. The user then uses the microcode software to read the input voltage using its ADC. These values are transferred to the GUI screen. The GUI calculates the offset values. The offset values are shown on in the GUI and saved to the microcontroller RAM. The microcontroller uses these values every time the cell voltage is read to adjust and calibrate the cell voltage readings. Ultimately, the calibration values are written to the µC Flash memory. 6 AN1904.1 December 6, 2013 Application Note 1904 TABLE 2. CELL VOLTAGE MONITORING (Continued) DESCRIPTION SOFTWARE VARIABLES NAME LOCATION RANGE CellScanDelay µC 0 to 256 CellPartition µC xxH value CellVoltages1 CellVoltagesN µC 0 to 65536 mV These are the A/D converted values of the cell voltages. PackVoltage µC 0 to 65536 mV This is the sum of the A/D converted values of all cell voltages. IntTemp µC -32768 to +32768 °C This is conversion of the internal temperature voltage to °C. It is calculated using the following formula: IntTemp = 85+[(AO-1.1)/(-0.0035)]. Calculate to 0.1°C. This calculation is not performed within the microcode. ExtTemp µC 0 to 65536 °C This is conversion of the external temperature voltage to °C. It is calculated using the following formula: ExtTemp = Table lookup (R, °C) where: R= (5900*AO)/(3.3-AO) (Note: 3.3 = regulator voltage) R T°C R T°C 68.2k -20 6.95k 35 53.6k -15 5.83k 40 42.5k -10 4.92k 45 33.9k -5 4.16k 50 27.2k 0 3.54k 55 22.0k 5 3.01k 60 17.9k 10 2.59k 65 14.7k 15 2.23k 70 12.1k 20 1.92k 75 10.0k 25 1.67k 80 8.31k 30 1.45k 85 The value is linearly interpolated to get a temperature with 1°C resolution. 7 UNITS DESCRIPTION This value specifies the time between scans of the cell voltages. This value is not used in the existing code, but might be added as part of power saving routines. This is the cell partition specification value stored in the microcontroller. The lower nibble specifies the number of cells being monitored by the ISL94208. The following are available partitions: 6 cells: 06H; 5 cells: 05H; 4 cells: 04H AN1904.1 December 6, 2013 Application Note 1904 START CellScanTime time out? No, not this time Yes, scan voltages Select temperature outputs Read A/D converter convert to voltage Save values to temp registers. Select Cell voltage output. Scan CELL6 to (9-Partition) Read A/D converter 6 times, average, & convert to voltage Divide by 2 and save value to voltage register. Save data sequentially starting at ADDR(partition-1), even if cells are missing due to partitioning. Select Cell voltage output. Scan CELL2 to CELL1 Read A/D converter convert to voltage Divide by 2 and save value to voltage register. Save data sequentially at ADDR1 and ADDR0 Calculate PackVoltage, and temp conversions Exit FIGURE 2. CELL VOLTAGE MONITORING 8 AN1904.1 December 6, 2013 Application Note 1904 At least one cell undervoltage Undervoltage Pending All cell voltages are OK Voltage OK At least one cell overvoltage All cell voltages are OK Overvoltage Pending Undervoltage time-out Overvoltage time-out UnderVoltage Overvoltage At least one All cells above recovery threshold cell overvoltage Overvoltage Recovery 1 At least one cell overvoltage All cells below recovery threshold Overvoltage Recovery Undervoltage recovery time-out Overvoltage recovery time-out Overvoltage Recovery 2 VMON shows no load FIGURE 3. CELL VOLTAGE MONITOR STATE MACHINE 9 AN1904.1 December 6, 2013 Application Note 1904 Overvoltage Detection/Response TABLE 3. OVERVOLTAGE DETECTION AND RESPONSE DESCRIPTION Functional Description The microcode needs to monitor the voltage on each battery cell (VCELL). If for any cell, VCELL > VOV for a time exceeding tOV, then the microcode must turn both the charge FET OFF, by setting the CFET bit to “0”. The pack has now entered Over-charge protection mode. The status of the discharge FET remains unaffected. The charge FET remains off until the voltage on the overcharged cell drops back below a recovery level, VOVR, for a recovery time period, tOVR. The device further continues to monitor the battery cell voltages, and is released from overcharge protection mode when VCELL< VOVR for more than the overcharge release time, for all cells. When the Device is released from over-charge protection mode, the charge FET is automatically switched ON. When the device returns from over-charge protection mode, the status of the discharge FET remains unaffected. Optional Functions The microcontroller may include an option to turn the charge FET back on (in an overvoltage condition) if dV/dt of the pack exceeds a specified limit DVdtCFETon (See “Cell Voltage/Temperature Monitoring” on page 6. for information on dV/dT). Then, if the dV/dt drops below DVdtCFEToff and there is still an over-charge condition on the cell, the microcode again disabled the charge FET. This function is only used if there is a single charge and discharge path. This option is set by a user Flag (Single_Charge_Discharge_Path) stored in Flash. SOFTWARE VARIABLES NAME LOCATION RANGE OverVoltageTripLevel µC 0 to 256 100mV This value (VOV) specifies the maximum allowable voltage on any individual cell (divided by 2). Default = 4.2V OverVoltageTripTime µC 0 to 256 100ms This value (tOV) specifies the time that any cell is allowed to exceed VOV before charging terminates. Default = 1s. OverVoltageRecovery Level µC 0 to 256 100mV This value (VOVR) is the voltage to which a cell must reach before the charge FET is allowed to turn on (divided by 2). Default = 4.0V OverVoltageRecovery Time µC 0 to 256 100ms This value (tOVR) specifies the time that the voltage across any cell must be below the VOVR level before the charge FET turns on. Default = 1s. DVdtCFETon µC 0 to 256 mV/s This optional value specifies the maximum rate of voltage change that is allowed during the discharge of a pack that is in overvoltage protection mode before the charge FET is turned on. This is to prevent the over heating of the charge FET. DVdtCFEToff µC 0 to 256 mV/s This optional value specifies the minimum rate of voltage change that is allowed during the discharge of a pack that is in overvoltage protection mode before the charge FET is turned off. Single_Charge_ Discharge_Path µC This is an optional bit set to “1” that indicates that there is a single charge and discharge path. This bit set to “0” means that there are separate paths. This bit is saved in the microcontroller Flash and is setable through the GUI. Over_Voltage_Tripped µC This is a bit that indicates that at least one cell is in an overcharge (overvoltage) condition 10 UNITS DESCRIPTION AN1904.1 December 6, 2013 Application Note 1904 NORMAL OPERATION MODE OVERCHARGE PROTECTION MODE NORMAL OPERATION MODE VOV tOV VOVR VCELL tOVR CHARGE PACK dV/dt DISCHARGE CFET OVER_VOLTAGE_TRIPPED EVENT 1 0 3 2 4 FIGURE 4. OVER-CHARGE PROTECTION MODE-EVENT DIAGRAM TABLE 4. OVER-CHARGE PROTECTION MODE-EVENT DIAGRAM DESCRIPTION EVENT [0,1) [1] (1,2) [2] (2,3) EVENT DESCRIPTION • • • • Discharge FET is ON (ISL94208 DFET bit = “1”). Charge FET is ON (ISL94208 CFET bit = “1”), and hence battery cells are permitted to receive charge. All cell voltages (VCELL1 – VCELLN) are below the over-charge voltage threshold (VOV). The device is in normal operation mode (i.e. not in a protection mode). • The voltage of one or more of the battery cells (VCELL), exceeds VOV. • The microcode starts an over-charge detection delay timer. • The device is still in normal operation mode The over-charge detection delay timer continues counting for TOV seconds. The over-charge detection delay timer times out AND VCELL still exceeds VOV. • Therefore, the microcode sends a command to the ISL94208 to switch the charge FET OFF (CFET bit = “0”). • The microcontroller sets the OverVoltageTripped bit and the pack has entered the overcharge protection mode. • While in over-charge protection mode: • The battery cells are permitted to discharge via the discharge FET, and the body diode across the charge FET • The microcontroller monitors the voltages VCELL1 - VCELLN to determine whether or not they have all fallen below the “Return from over-charge threshold” (VOVR). [3] • All cell voltages fall below VOVR— but the Over-charge release time has not expired [3] • • • • • All cell voltages fall below VOVR—and the Over-charge release time has expired The pack is now in normal operation mode so the OverVoltageTripped bit is reset to “0”. The microcontroller switches the charge FET = ON (CFET bit = “1”) The status of the discharge FET remains unaffected. Charging of the battery cells can now resume. 11 AN1904.1 December 6, 2013 Application Note 1904 Undervoltage Detection/Response TABLE 5. UNDERVOLTAGE DETECTION AND RESPONSE DESCRIPTION Functional Description If VCELL < VUV, for a time exceeding TUV, the cells are said to be in a over-discharge (undervoltage) state. In this condition, the microcontroller switches the discharge FET OFF (by setting the DFET bit = “0”). At this point: • If any of the cells drop below a second threshold (VCELL < VSLP) for a period of time (TSL), the microcontroller does some clean up, turns off the charge FET (CFET bit = “0”) and puts the pack into a sleep mode by setting the SLEEP bit to “1”. From the Undervoltage condition, if the cells recover to above a VUVR level for a time exceeding TUVR, the microcontroller turns on the VMON output and looks for the absence of a load. If there is no load, and the cells are above the undervoltage recovery level, the microcontroller turns on the discharge FET. If the device has gone to sleep, the microcontroller is also off, so the micro is waken when the regulator turns on (see “Power-up/Initialization” on page 4 Optional Functions SOFTWARE VARIABLES There is a special condition in which the discharge FET turns on if the cells are undervoltage, but being charged. The discharge FET will then remain on until the charge stops. NAME LOCATION RANGE UNITS DESCRIPTION LDMONEN IC This bit is set in the ISL94208 by the microcontroller to turn on the load monitor. LDFAIL IC This bit is set by the ISL94208 to indicate a load failure (continued short circuit). SLEEP IC This bit is set n the ISL94208 by the microcontroller to go into the sleep mode. UnderVoltageTripLevel µC 0 to 256 100mV This value specifies the minimum allowable voltage (VUV) on any individual cell for normal operation. Default = 3.0V UnderVoltageTripTime µC 0 to 256 100ms This value specifies the time (tUV) that any cell is allowed to exceed VUV before discharge is prevented by turning off the DFET. Default = 1s. UnderVoltageRecoverLevel µC 0 to 256 100mV This value is the voltage to which a cell must reach (VUVR) before the charge FET is allowed to turn on. Default = 3.2V UnderVoltageRecoverTime µC 0 to 256 100ms This value specifies the time (tUVR) that the voltage across any cell must be above the VUVR level before the charge FET turns on. This also requires that the load has been removed from the pack. Default = 1s. UnderVoltageSleepLevel µC 0 to 256 100mV This value specifies the minimum allowable voltage (VSL) on any individual cell. If the cell stays below this level for the TSL period of time, the microcontroller specifies that the pack go to sleep. Default = 2.7V UnderVoltageSleepTime µC 0 to 256 100ms This value specifies the time (tSL) that the voltage across any cell must be below the VSL level before setting the sleep condition. Default = 1s. Under_Voltage_Tripped µC 12 This is a bit that indicates that at least one cell is in an over discharge (undervoltage) condition. AN1904.1 December 6, 2013 Application Note 1904 VCELL VUVR VUV tUVR VSL tUV tUV IPACK tSL DISCHARGE DISCHARGE LDMONEN bit VMON pin VVMON LDFAIL bit DFET bit CFET bit SLEEP bit Under_Voltage_Tripped Over-discharge Over-discharge Protection Mode Protection Mode SLEEP Event 0 1 2 3 4 5 6 7 8 9 10 FIGURE 5. OVER-DISCHARGE PROTECTION MODE-EVENT DIAGRAM TABLE 6. OVER-DISCHARGE PROTECTION MODE—EVENT DIAGRAM DESCRIPTION EVENT [0,1) [1] (1,2) [2] (2,3) [3] EVENT DESCRIPTION • • • • Charge FET is ON (CFET bit = “1”) Discharge FET is ON (DFET bit = “1”), and hence battery cells are permitted to discharge. All cell voltages (VCELL1–VCELLN) are above the over-discharge threshold voltage (VUV). The device is in normal operation mode (i.e. not in a protection mode). • The voltage of one or more of the battery cells (VCELL), falls below VUV. • The microcontroller over-discharge detection delay timer begins counting. • The device is still in normal operation mode • The microcontroller over-discharge detection delay timer continues counting for TUV seconds. • • • • • The microcontroller over-discharge detection delay timer times out, AND VCELL is still below VUV. The microcontroller switches the discharge FET OFF (sets the DFET bit to “0”). The charge FET remains on (CFET bit = “1”). The microcontroller sets the Under_Voltage_Tripped bit as the pack enters the over-discharge protection mode. At this time, the microcontroller does not enter the sleep mode. • While device is in over-discharge protection mode the microcontroller monitors for cell voltage recovery. • Cell voltages rise above VUVR, but device remains in over-discharge protection mode. 13 AN1904.1 December 6, 2013 Application Note 1904 TABLE 6. OVER-DISCHARGE PROTECTION MODE—EVENT DIAGRAM DESCRIPTION (Continued) EVENT (3,4) [4] (4,5) [5] (5,6) [6] (6,7) [7] (7,8) [8] (8,9) [9] (9,10) [10] EVENT DESCRIPTION • The microcontroller over-discharge recovery detection delay timer continues counting for TUVR seconds. • The voltage of all of the battery cells (VCELL), have risen above VUVR for the minimum amount of time. • To prevent an unexpected motor turn on, the microcontroller turns on the VMON output with the LDMONEN bit. When this bit turns on, the VMON pin will be high, and the LDFAIL bit will be high, until the load turns off. • The pack is still in over-discharge protection mode. • The microcontroller monitors the LDFAIL flag. • The over-discharge release timer has times out, AND VCELL is still above VUVR, and the load has been released (LDFAIL = “0”). • The microcontroller resets the Under_Voltage_Tripped flag, turns off the load monitor and turns the discharge FET on. • The load turns on and the batteries again start to drain. • The pack is operating normally. There are no protection conditions. • The voltage of one or more of the battery cells (VCELL), falls below VUV. • The microcontroller over-discharge detection delay timer begins counting. • The device is still in normal operation mode • The microcontroller over-discharge detection delay timer continues counting for TUV seconds. • • • • • The microcontroller over-discharge detection delay timer times out, AND VCELL is still below VUV. The microcontroller switches the discharge FET OFF (sets the DFET bit to “0”). The charge FET remains on (CFET bit = “1”). The microcontroller sets the Under_Voltage_Tripped bit as the pack enters the over-discharge protection mode. At this time, the microcontroller does not enter the sleep mode. • While device is in over-discharge protection mode the microcontroller monitors for cell voltage recovery. • The cells do not recover and no charger is connected. The cell voltages continue to decline. • The voltage of one or more of the battery cells (VCELL), falls below the sleep voltage level, VSL • The microcontroller sleep detection delay timer begins counting. • The device is still in over-discharge mode. The discharge FET is off. • The microcontroller sleep detection delay timer continues counting for TSL seconds. • The voltage of one or more of the battery cells (VCELL), remains below the sleep voltage level, VSL • The microcontroller sleep detection delay timer times out. • The microcontroller turns off the charge FET, completes housekeeping tasks and sets the SLEEP bit. Setting the sleep bit in the ISL94208 turns off the voltage regulator powering the microcontroller. 14 AN1904.1 December 6, 2013 Application Note 1904 Discharge Overcurrent and Short Circuit Detection/Response TABLE 7. DISCHARGE OVERCURRENT/SHORT CIRCUIT DETECTION AND RESPONSE DESCRIPTION Functional Description Software Variables The ISL94208 continually monitors discharge current by monitoring voltage across a current sense resistor at the Dsense pin. When the voltage at the terminal exceeds the limit, the FETs are automatically turned off, unless over-ridden by the overcurrent or short circuit disable flags (DENOCD and DENSCD). If the automatic response is over-ridden, then the microcontroller needs to turn off the FETs. This software implementation will base its operation on the status of the over-ride bits, since they can be controlled by the user through the GUI. Overcurrent is specified as current exceeding the overcurrent threshold voltage, set by the overcurrent threshold bits (OCDV1:OCDV0) for the overcurrent time delay, set by the overcurrent time out bits (OCDT1:OCDT0) and the discharge time speed up bit (DTDIV). The microcontroller can detect the overcurrent condition by monitoring the DOC bit. Short circuit is specified as current exceeding the short circuit threshold voltage, set by the short circuit threshold bits (OCCV1:OCCV0) for the short circuit time out period, set by the short circuit time out bit (SCLONG). The microcontroller can detect the short circuit condition by monitoring the DSC bit. Once the ISL94208 enters overcurrent protection mode, the microcontroller begins a load monitor state. In the load monitor state, the microcontroller turns on the load monitor by setting the LDMONEN bit to “1”. This allows a small current to flow from the load through an external resistor and into the device. With a load present, the voltage on the VMON pin is high and the LDFAIL bit is set to “1”. When the load rises to a sufficiently high resistance, the voltage on the VMON pin drops below the VMON threshold and the LDFAIL bit is reset. When the load has been released for a sufficiently long period of time (tOCR or tSCR) the microcontroller acknowledges the removal of the load and re-enables the power FETs by setting the CFET and DFET bits to “1”. If the load has not been removed in LoadMonitorOn seconds after entering the load monitor state, LDMONEN is reset to “0”. After LoadMonitorOff seconds, the load monitor is turned on and waits again for LoadMonitorOn seconds before turning off the load monitor. This continues indefinitely. NAME LOCATION RANGE UNITS DESCRIPTION VOCD IC/µC 2 bits Selection bits for the discharge overcurrent protection threshold VSC IC/µC 2 bits Selection bits for the discharge short circuit protection threshold TOCD IC/µC 2 bits This value (along with the DTDIV bit) specifies the time that the overcurrent can remain before the charge and discharge FETs turns off. DTDIV IC/µC 1 bit This value specifies the overcurrent delay is divided by 1 or by 64. SCLONG IC/µC 1 bit This value specifies the time that the short circuit can remain (short or long) before the charge and discharge FETs turns off. DENOCD IC/µC 1 bit ISL94208 bit set to “0” to enable automatic discharge overcurrent response. DENSCD IC/µC 1 bit ISL94208 bit set to “0” to enable automatic short circuit response. DOC IC/µC 1 bit ISL94208 bit set to “1” to indicate a discharge overcurrent condition. DSC IC/µC 1 bit ISL94208 bit set to “1” to indicate a short circuit condition. LDMONEN IC This bit is set in the ISL94208 by the microcontroller to turn on the load monitor. LDFAIL IC This bit is set by the ISL94208 to indicate a load failure (continued short circuit). LoadMonitorOnTime µC 0 to 256 sec This value (tMONON) specifies the time that the load monitor will be allowed to continue without detecting a release of the load. LoadMonitorOffTime µC 0 to 65535 sec This value (tMONOFF) specifies the time between load monitor states to restart the release of load detection. 15 AN1904.1 December 6, 2013 Application Note 1904 NORMAL OPERATION MODE O.C. PROTECTION NORMAL SHORT NORMAL BATTERY VOLTAGE VMON PIN VVMON Load not released VSC Load released VSC VOCD VOCD DSENSE PIN tMONON DFET/CFET VSS tSC <tMONON TOC <tMONON tVMONOFF VCC VSS Note 1 DOC Note 1 DSC LDFAIL LDMONEN EVENT 0 1 2 3 4 5 6 7 8 9 10 FIGURE 6. DISCHARGE OVERCURRENT PROTECTION MODE - EVENT DIAGRAM NOTE: 1. DOC and DSC bits are reset when the register is read. 16 AN1904.1 December 6, 2013 Application Note 1904 TABLE 8. DISCHARGE OVERCURRENT AND SHORT CIRCUIT PROTECTION MODE-EVENT DIAGRAM DESCRIPTION EVENT (0,1) [1] (1,2) [2] EVENT DESCRIPTION • Discharge FET is ON (DFET bit = “1”) and Charge FET is ON (CFET = “1”). Battery cells are permitted to discharge. • Current sense resistor voltage is less than the discharge overcurrent threshold voltage (VOCD) and less than the short circuit threshold (VSC). • The device is in normal operation mode (i.e. not in a protection mode). • • • • Excessive current starts flowing through the battery terminals, dropping the battery voltage. The voltage across the current sense resistor exceeds VOCD. The ISL94208 overcurrent detection delay timer begins counting down. The device is still in Normal Operation Mode The ISL94208 overcurrent detection delay timer continues counting for TOC seconds. • The ISL94208 overcurrent detection delay timer times out, AND the sense resistor voltage Vdsense is still above VOCD. • The ISL94208 automatically turns off the DFET and the CFET (unless over-ridden by the DENOCD and DECSCD bits) • The ISL94208 sets the DOC flag. (2,3) • The microcontroller detects that there is an overcurrent condition by reading the status register and seeing a DOC bit = “1”. • Reading the status register resets the DOC bit. • The microcontroller turns off the discharge and charge FETs (if not already automatically turned off) by setting the DFET and CFET bits to “0”. • The microcontroller turns on the LDMONEN bit to start the load monitor • The microcontroller monitors the LDFAIL bit. If it goes LOW, then the load is released. [3] • LDFAIL did not go low and the microcontroller load monitor time out expires, so the micro turns off the LDMONEN bit to stop looking for a load release for a while. (3,4) • The microcontroller times out the period between load release scans. [4] • The microcontroller starts the load monitor again by setting the LDMONEN bit to “1”. • The microcontroller starts scanning the LDFAIL bit. [5] • The VMON pin drops below the VMON threshold level as the load is released. • The positive battery terminal voltage (P+) falls, and VCS21 exceeds VSC. • The FET is turned off immediately. There is no delay and the FET drive should be stronger than a normal FET turnoff. [6] • • • • (6,7) [7] (7,8) [8] (8,9) The microcontroller has detected that there is no current and that the load has been released. The microcontroller turns off the load monitoring by setting the LDMONEN bit = “0”. The microcontroller turns on the discharge and charge FETs by setting the DFET = “1” and CFET = “1” The device has now returned to a normal operating condition so discharge of the battery cells is once again possible. • Discharge FET is ON (DFET bit = “1”) and Charge FET is ON (CFET = “1”). Battery cells are permitted to discharge. • Current sense resistor voltage is less than the discharge overcurrent threshold voltage (VOCD) and less than the short circuit threshold (VSC). • The device is in normal operation mode (i.e. not in a protection mode). • • • • Excessive current starts flowing through the battery terminals, dropping the battery voltage. The voltage across the current sense resistor exceeds both VOCD and VSCD. The ISL94208 overcurrent and short circuit detection delay timers begin counting down. The device is still in Normal Operation Mode • The ISL94208 short circuit detection delay timer continues counting for TSC seconds. • The ISL94208 short circuit detection delay timer times out, AND the sense resistor voltage Vdsense is still above VSC. • The ISL94208 automatically turns off the DFET and the CFET (unless over-ridden by the DENOCD and DECSCD bits) • The ISL94208 sets the DSC flag. • The microcontroller detects that there is a short circuit condition by reading the status register and seeing a DOC bit = “1”. • Reading the status register resets the DSC bit. • The microcontroller turns off the discharge and charge FETs (if not already automatically turned off) by setting the DFET and CFET bits to “0”. • The microcontroller turns on the LDMONEN bit to start the load monitor • The microcontroller monitors the LDFAIL bit. If it goes LOW, then the load is released. [9] • LDFAIL bit is read to be “0” by the microcontroller. This indicates that the short circuit load has been released. [10] • • • • The microcontroller has detected that there is no current and that the load has been released. The microcontroller turns off the load monitoring by setting the LDMONEN bit = “0”. The microcontroller turns on the discharge and charge FETs by setting the DFET = “1” and CFET = “1” The device has now returned to a normal operating condition so discharge of the battery cells is once again possible. 17 AN1904.1 December 6, 2013 Application Note 1904 CURRENT OK VMON indicates no load Turn on FETs If overcurrent bit = ‘1’ or short circuit bit = ‘1’ Turn off FETs Turn on VMON OVERCURRENT If LD Mon Off-time expires VMON turned on Timer starts If LD Mon On-time expires VMON turned off OVERCURRENT LD MON Timer starts FIGURE 7. DISCHARGE OVERCURRENT AND SHORT CIRCUIT STATE MACHINE Charge Overcurrent Detection/Response TABLE 9. CHARGE OVERCURRENT DETECTION AND RESPONSE DESCRIPTION Functional Description The ISL94208 continually monitors charge current by monitoring voltage across a current sense resistor at the Csense pin. When the voltage at the terminal exceeds the limit, the charge FET is automatically turned off, unless over-ridden by the overcurrent disable flag (DENOCC). If the automatic response is over-ridden, then the microcontroller needs to turn off the FETs. This software implementation will base its operation on the status of the over-ride bits, since they can be controlled by the user through the GUI. Overcurrent is specified as current exceeding the overcurrent threshold voltage, set by the overcurrent threshold bits (OCCV1:OCCV0) for the overcurrent time delay, set by the overcurrent time out bits (OCCT1:OCCT0) and the discharge time speed up bit (CTDIV). The microcontroller can detect the overcurrent condition by monitoring the COC bit. Once the ISL94208 enters overcurrent protection mode, the microcontroller waits for a period of time tSCDW, then turns the charge FET on again. If there is an overcurrent again within a time period tSCDR, then the microcontroller puts the ISL94208 into a sleep condition, waiting for the removal and re-connection of the charger. OPTIONAL FUNCTIONS SOFTWARE VARIABLES NAME LOCATION RANGE UNITS DESCRIPTION VOCC IC/µC 2 bits ISL94208 selection bits for the discharge overcurrent protection threshold TOCC IC/µC 2 bits ISL94208 value (tOCC, along with the ISL94208 CTDIV bit) specifies the time that the overcurrent can remain before the charge and discharge FETs turns off. CTDIV IC/µC 1 bit This ISL94208 value specifies the overcurrent delay is divided by 1 or by 32. DENOCC IC/µC 1 bit ISL94208 bit set to “0” to enable automatic charge overcurrent response. COC IC/µC 1 bit ISL94208 bit set to “1” to indicate a charge overcurrent condition. ChargeOvercurrentWaitTime µC 0 to 256 sec This value specifies the time that the microcontroller will wait after detecting a charger overcurrent condition before starting another charge operation. ChargeOvercurrent RetestTime µC 0 to 256 sec This value specifies the time that the microcontroller looks for an overcurrent condition after a previous charge overcurrent condition. If the microcontroller detects an overcurrent during the repeat charge time period, then the microcontroller will put the pack into a sleep condition. 18 AN1904.1 December 6, 2013 Application Note 1904 NORMAL OPERATION MODE OVERCURRENT PROTECTION MODE NORMAL OPERATION MODE VSS DSENSE PIN VOCC VOCC tOCC tSCDW <tSCDR Note 2 Note 2 COC BIT CFET SLEEP EVENT 0 1 2 3 4 5 6 7 FIGURE 8. CHARGE OVERCURRENT PROTECTION MODE - EVENT DIAGRAM NOTE: 2. COC bit is reset when the register is read. 19 AN1904.1 December 6, 2013 Application Note 1904 TABLE 10. CHARGE OVERCURRENT PROTECTION MODE-EVENT DIAGRAM DESCRIPTION EVENT (0,1) [1] (1,2) EVENT DESCRIPTION • Charge FET is ON (CFET = “1”). Discharge FET is on (DFET = “1”). Battery cells are permitted to charge. • The voltage at the Dsense pin is less than the overcurrent threshold voltage (VOCC). • The device is in normal operation mode (i.e. not in a protection mode). • Excessive charge current flows into the pack. • The ISL94208 charge overcurrent detection delay timer begins counting down. • The device is still in Normal Operation Mode • The internal Overcurrent detection delay timer continues counting for tOC seconds. • The microcontroller monitors the COC bit. [2] • The ISL94208 charge overcurrent detection delay timer times out, AND the voltage across the discharge resistor is still above VOCC. • The ISL94208 charge overcurrent circuitry switches the charge FET OFF (CFET = “0”), unless the automatic overcurrent response is over-ridden. • The ISL94208 sets the COC bit. • The device has now entered overcurrent protection mode. [3] • • • • (3,4) The microcontroller detects that there is an overcurrent condition by reading the status register and seeing a COC bit = “1”. Reading the status register resets the COC bit. The microcontroller turns off the charge FET (if not already automatically turned off) by setting the CFET bit to “0”. The microcontroller starts a timer (TSCDW) that waits for a while, keeping the charger off. • The microcontroller TSCDW wait timer counts down. [4] • The microcontroller TSCDW timer times out. • The microcontroller turns on the charge FET by setting the CFET bit to “1”. • The microcontroller starts a timer (TSCDR) that prevents repetitive charge overcurrent conditions from occurring too frequently. [5] • • • • [6] • The ISL94208 charge overcurrent detection delay timer times out, AND the voltage across the discharge resistor is still above VOCC. • The ISL94208 charge overcurrent circuitry switches the charge FET OFF (CFET = “0”), unless the automatic overcurrent response is overridden. • The ISL94208 sets the COC bit. • The device has again entered overcurrent protection mode. [7] • • • • • Excessive charge current again flows into the pack. The ISL94208 charge overcurrent detection delay timer begins counting down. The device is still in Normal Operation Mode. The repetitive timer TSCDR has not yet timed out. The microcontroller detects that there is an overcurrent condition by reading the status register and seeing a COC bit = “1”. Reading the status register resets the COC bit. The microcontroller turns off the charge FET (if not already automatically turned off) by setting the CFET bit to “0”. The TSCDR timer has not yet expired, meaning a second charge overcurrent condition in too short a period of time. Because there were two charge overcurrent conditions within the time period, the microcontroller saves its state and puts the pack into the sleep condition by setting the ISL94208 SLEEP bits to “1”. 20 AN1904.1 December 6, 2013 Application Note 1904 CURRENT OK VMON INDICATES NO LOAD TURN ON FETS IF OVERCURRENT BIT = ‘1’ TURN OFF FETS OVERCURRENT TIMER STARTS IF OVERCURRENT WAIT-TIME EXPIRES CFET TURNED ON IF OVERCURRENT BIT = ‘1’ FORCE SLEEP OVERCURRENT RETEST TIMER STARTS TIMER EXPIRES AND OVERCURRENT BIT = 0 FIGURE 9. DISCHARGE OVERCURRENT AND SHORT CIRCUIT STATE MACHINE 21 AN1904.1 December 6, 2013 Application Note 1904 Temperature Monitoring/Response TABLE 11. TEMPERATURE MONITORING AND RESPONSE DESCRIPTION Functional Description The ISL94208 continually monitors both the temperature of the pack and the temperature of the IC. If the temperature of the IC (Internal Temp) goes above 140°C, then the ISL94208 sets an over temp flag (IOT), prevents cell balancing and turns off the FETs, if automatic response is enabled (DISITSD bit = “0”). Otherwise, the ISL94208 sets an over temperature flag (IOT) and the microcontroller responds to the condition. In this code, the microcontroller response will be identical to the automatic response. If the temperature of the cells (External Temperature) goes above a threshold determined by an external resistor and thermistor, the ISL94208 sets an over temp flag XOT), prevents cell balancing and turns off the FETs, if automatic response is enabled (DISXTSD bit = “0”). Otherwise, the ISL94208 sets an over temperature flag (XOT) and the microcontroller responds to the condition. In this code, the microcontroller response will be identical to the automatic response. The temperature of the IC or cells is also available to the microcontroller through the AO pin. This requires that the internal or external temperature value be selected by using the Analog out register, then requires that the analog voltage be converted to a digital value and scaled appropriately. These temperature values can be used for a number of purposes in the pack operation, but in this code, the only use will be to use the external temperature to prevent charging if the cell temperature is too low. The external temperature scan circuit can be set to automatic or manual. If the ATMPOFF flag is set to “0”, then the external temperature is sampled for 4ms out of every 512ms. In this case, an over temperature condition is detected automatically. If the ATMPOFF bit is set to “1”, the microcontroller code needs to sample the external temperature periodically. To do this, a timer value (TempScan) is required to set the time between external temperature scans. The actual “on” time of the temperature circuit is determined by the register read operation. OPTIONAL FUNCTIONS SOFTWARE VARIABLES NAME LOCATION RANGE UNITS DESCRIPTION IOT IC 1 bit ISL94208 bit indicates an internal over temperature condition. XOT IC 1 bit ISL94208 bit indicates an external over temperature condition. DISITD IC/µC 1 bit ISL94208 bit set to “1” to disable automatic internal over temperature response. DISXTD IC/µC 1 bit ISL94208 bit set to “1” to disable automatic external over temperature response. ATMPOFF IC/µC 1 bit Selection bit for the automatic scan of the external temperature. TempScanDelay 0 to 255 10ms This value specifies the time between external temperature scans. A value of 0 means that there is no temperature scan. ChargeTempMin 0 to 255 2°C This value specifies the minimum temperature allowed for charging. A value of 0 corresponds to a temperature range of -40°C. A value of 255 corresponds to 87.5°C. TempMeasDelay µC 0 to 65535 ms This value specifies the time between analog temperature measurements. ExtTemp µC -32768 to +32768 0.01 °C This is the external (cell temperature) converted to °C for the ISL94208 or ISL9216. (The ISL9217 does not have an external temperature measurement) ITempLower µC -32768 to +32768 0.01 °C This is the internal (IC temperature) converted to °C for the ISL94208 or ISL9216. (See voltage monitoring, Table 2 for temperature conversion calculation. ITempUpper µC -32768 to +32768 0.01 °C This is the internal (IC temperature) converted to °C for the ISL9217 22 AN1904.1 December 6, 2013 Application Note 1904 START No ATMPOFF = 0? Yes, auto scan No XOT = 1? No Yes, manual scan Read External Temperature Set AO2:AO0 = 08H DISXTSD = 0? No Temp SCAN timer expired? Yes, autorespond DISITSD = 0? IOT = 1? No Yes, autorespond Turn off FETs, Stop cell balancing No Temp MEAS timer expired? Yes Measure external Temperature, convert to °C and save Measure internal Temperature, convert to °C and save Exit FIGURE 10. TEMPERATURE MONITORING AND RESPONSE Current Direction Detection Open Wire Detection The evaluation board provides a circuit to indicate the presence of a charge or discharge current. The algorithm periodically monitors the Discharge Current input (DSCG_I) port PTB5 (pin 7) and the Charge Current input (CHRG_I) port PTB4 (pin 8). This routine detects the presence of an open input cell. This routine is run once at power up (right after the FETs are initially turned on) and then every time just prior to the cell balance “On” period. That is, before any cell balance outputs are turned on, this routine runs. If the DSCG_I pin is “HIGH”, then the algorithm sets the “discharging” flag HIGH. If the CHRG_I pin is HIGH, then the algorithm sets the “charging” flag HIGH. These flags are used for the cell balance and power management routines and are passed to the GUI. If the CHRG_I pin is HIGH and the CB_Enable_Charge bit is set, the cell balance is enabled. See “Cell Balancing” on page 25. Power Management Control The microcontroller code monitors the “charging” and “discharging” flags and if neither is set will start a counter. The counter is set to a value provided by the GUI in the PACK tab (PowerManagementOnTime). This counter value is written to Flash along with the other pack values. The counter value is set for 1 to 15 minutes (a 4-bit value in the microcode.) If there is no charge or discharge current detected within the counter period, the FETs are turned off, cell balance is turned off and the ISL94208 are put into a sleep mode. The procedure is as follows: Whenever any of the following conditions exist take the associated action immediately: • If any cell < 0.5V when not charging – take Action 1 (see “Actions”). • If any cell < 0.5V when charge current present - take Action 2. • If any cell > 4.7V – take Action 1. • If |VCn -VC(n-1)| > CBMaxDV – take Action 1. ACTIONS 1. Turn off all FETs (power FETs/balance FETs), turn on PTB7 output (this is an indicator only). Continue to scan the cells. If the voltage returns to normal levels, recover the pack operation. 2. Turn off discharge FET, turn off all cell balance FETs – leave charge FET on. A zero in this register turns off the powerdown operation. 23 AN1904.1 December 6, 2013 Application Note 1904 Continue checking and if the open wire is resolved, reset the bit. This will allow the FETs to turn on and CB to be executed if everything else is OK. Code Revision The GUI will be able to show the current revision of the software loaded into the µC. The microcode now includes a revision number, that is sent to the GUI. The revision number includes both the software revision and the device base code. Communications Communications with between the device and the microcontroller use an I2C protocol. The ISL94208 uses an industry standard 7-bit address, slave protocol. Communications between the microcontroller and the outside world can be any desired type of connection, I2C, one-wire, SPI, etc. However for this code implementation, the communication outside the pack uses a master/slave 7-bit I2C protocols. The Specific communication protocols between the microcontroller and the PC are not described in this document. TABLE 12. MICROCONTROLLER TO DEVICE COMMUNICATIONS DESCRIPTION Functional Description I2C Slave Address: This is the address of the device on the I2C bus. The I2C slave address is the first one to be sent in the communication stream. The last bit in the slave address identifies the subsequent operation as a read or a write. If the last bit is a “1”, it is a read. If it is a “0” it is a write. ISL94208: 0101 000x Register Address: (See below) The second byte sent to the ISL94208 (following an ACK bit) is the address of the register being read or written. Data: The third byte sent or received from the ISL94208 (following an ACK bit) is the data byte. The ACK bit following the data byte increments the address, so additional data can be transferred between the ISL94208 and the microcontroller by sending or receiving subsequent data bytes before sending the final stop bit. However, when the address reaches 0AH, the address “wraps around” back to address 0, so care needs to be taken in multiple write operation. ADDRESSES Optional Functions Software Variables FUNCTION 00H, 01H Status registers - read only 02H, 03H, 04H Control registers - read or write. These register control functions that turned off as a default or in sleep mode. 05H, 06H, 07H Configuration registers - read or write. These registers control the basic operation of the ISL94208. These should be re-loaded from a default set stored in the microcontroller Flash. 08H Write enable register - read or write. This register controls the ability to change the contents of the ISL94208 configuration registers. These are always reset to zero following a write operation, so the microcontroller needs to set the proper bit to “1” prior to a write to a configuration register. 09H, 0AH Test registers - read or write. These register control various test modes of the device and should not be used in normal device operation. 0BH - FFH Reserved locations: Do not access these addresses. Other device can be placed on the I2C bus, besides the ISL94208, as long as the device I2C slave address does not conflict. For example, on an initial ISL94208 test board, a serial A/D converter will be used. The I2C slave address of this device is: 1001 000x. NAME REG5-REG7 DESCRIPTION values These values are the key parameters from the ISL94208 that need default values to be mirrored in the microcontroller Flash. 24 AN1904.1 December 6, 2013 Application Note 1904 Cell Balancing TABLE 13. MICROCONTROLLER TO DEVICE COMMUNICATIONS DESCRIPTION Functional Description At the same rate as the scan of the cell voltages, if cell balancing is on, the system is checked for cell balance proper conditions. The microcontroller prevents cell balancing if proper conditions are not met. There will be no cell balancing if the temperature, current, and voltage conditions exceed the limits specified in CBOverTemp, CBUnderTemp. The microcontroller calculates the voltage of the lowest cell and the highest cell. If the difference between these cells is below CBCellMinDeltaV voltage, then there will be no cell balancing. If the CBMaxV is greater than the CBMaxBalVoltage or if CBMinV is less than CBMinBalVoltage, then there is an no balancing. If any cell has a voltage greater than the programmed threshold (CBMinDeltaVoltage) above the lowest cell voltage, then that cell balancing output is turned on (up to a maximum of CBMaxNum outputs at once.) If any cell voltage differential exceeds the CBMaxDeltaV, then an error flag is set. Note: All designated cell balancing FETs need to turn on at the same time. Each cell balancing cycle lasts for the programmed interval (CBOnTime), after which there is a pause of (CBOffTime). During the CBOnTime, the cells are not compared for balance purposes. At the end of the pause, the cell voltages are again compared, and a new cell balance cycle is started, if necessary. Cell balancing can be enabled during charge, discharge or both. If the Cell Balance During Charge bit is set and the board hardware indicates that there is charging current, then the cell balancing is enabled. If the Cell Balance During Discharge bit is set and the external hardware detects that there is a discharge current, then cell balancing is enabled. (See Figure 11.) Optional Functions Desired CBDC CHING HIGH = Stop cell balance CBDD DCHING LOW = Allow balance to continue CBDC = CB during charge bit CHING = Charge current detected CBDD = CB during discharge bit DCHING = Discharge current detected CB during CB during discharge charging discharge charging 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 OUT 1 1 1 0 1 1 1 0 1 1 1 0 0 1 0 1 FIGURE 11. CELL BALANCE CURRENT DETECTION/START/STOP ROUTINE 25 AN1904.1 December 6, 2013 Application Note 1904 TABLE 13. MICROCONTROLLER TO DEVICE COMMUNICATIONS (Continued) DESCRIPTION SOFTWARE VARIABLES NAME RANGE UNITS DESCRIPTION Charger_connect OFF/ON ‘0’ A “1” in this bit, set by an external pack device, indicates that a charger is connected to the pack. CB_Chg_Current_ OK OFF/ON ‘0’ This is an optional bit that is set by a charger. “1” indicates that the charge current is high enough for balancing (This bit can be used instead of the dVdT measurements for determining the cell balance minimum current specification). CB_Enable_Charge OFF/ON ‘1’ Determines if cell balancing will take place while the pack is charging CB_Enable_ Discharge OFF/ON ‘0’ Determines if cell balancing will take place while the pack is discharging CMinV 0 to 65535 mV This is the voltage on the cell with the minimum voltage CMaxV 0 to 65535 500mV This is the voltage on the cell with the maximum voltage cellv[ ] array of integer This array holds the sorted voltages for balancing. Voltages sorted low to high celln[ ] array of integer This array holds the sorted cell number for balancing. Cell number associates with the voltage in the cellv[] array. CBOnTime 0 to 65535 seconds Cell Balance ON cycle time (see functional description on page 25) Default = 600s CBOffTime 0 to 65535 seconds Cell Balance OFF cycle time (see functional description on page 25) Default = 10s CBMinBalVoltage 0 to 65535 mV Cell voltage below which cell balancing will not take place. Default = 3V CBMaxBalVoltage 0 to 65535 mV Cell voltage above which cell balancing will not take place. Default = 4.2V CBOverTemp 0 to 65535 °K Cell temperature above which cell balancing will not take place. Default = -40°C CBUnderTemp 0 to 65535 °K Cell temperature below which cell balancing will not take place. Default = 0°C CBCellMinDeltaV 0 to 65536 mV Voltage delta between two cells below which no balancing takes place. Default = 30mV CBCellMaxDeltaV 0 to 65536 mV Voltage differential between two cells above which no balancing takes place. In this case, an error flag is set and may cause the pack to shut down. Default = 500mV CBError ON/OFF Voltage differential between two cells above which no balancing takes place. In this case, an error flag is set and may cause the pack to shut down. CBcount 0 to 8 This is a counter for tracking the number of cells that can be balanced at the same time. CBMaxNum 0 to 16 This value specifies the maximum number of cells that can be balanced at the same time. Default = 4. 26 AN1904.1 December 6, 2013 Application Note 1904 CB IDLE CELLBALANCECHECK = TRUE CELLBALANCECHECK = FALSE CBOFF TIMER EXPIRES CB ON CB OFF CELLBALANCECHECK = FALSE OR CBON TIMER EXPIRES FIGURE 12. CELL BALANCING (STATE DIAGRAM) CellBalanceCheck Temp outside Cell balance limits? Yes No Set CellbalanceCheck = No False and Exit Charger_connect = 1? Yes Yes CB_Enable_Charge =1? No Set CellbalanceCheck = True and Exit No Charger_connect = 1? Yes CB_Enable_Disharge = 1? No Set CellbalanceCheck = False and Exit Yes Set CellbalanceCheck = True and Exit FIGURE 13. CELL BALANCING (CHECK CONDITIONS) 27 AN1904.1 December 6, 2013 Application Note 1904 Example: Cell Balance Turn ON Sort Cell voltages highest to lowest - keep associations to cells (see example) Min Cell voltage = CMinV Max Cell Voltage = CMaxV Yes Yes CB control bits Cell6V: 3.73 Cell5V: 3.72 Cell4V: 3.75 Cell3V: 3.71 Cell2V: 3.70 Cell1V: 3.74 Sort: cellv[5]: cellv[4]: cellv[3]: cellv[2]: cellv[1]: cellv[0]: CMinV < CBMinimumBalVoltage? CMaxV > CBMaximumBalVoltage ? 3.75 3.74 3.73 3.72 3.71 3.70 CB6 = 40H CB5 = 20H CB4 = 10H CB3 = 08H CB2 = 04H CB1 = 02H celln[5]: 4 celln[4]: 1 celln[3]: 6 celln[2]: 5 celln[1]: 3 celln[0]: 2 CBreg: 10H CBreg: 11H CBreg: 51H CBreg: 71H CBreg: 79H CBreg: 7EH The CB value is built up as long as the difference between the cell voltage and the CMinV voltage is larger than the CBMinimumBalVoltage and the CBMaxNum of cells to be balanced has not been reached. In the example above, with a CBMinimumBalVoltage of 30mV, and a CBMaxNum of 4, only the first three cells will be balanced and a CB value of 51H would be written to the ISL94208. No Exit Associate a hex value to the each cell in the sort that relates to the cell balance bit in the ISL94208 (see example) Start at the highest voltage cell CellSortn= 0 & set CBcount=0, CBSet=0 CellSortn = CellSortn + 1. Celln - CBMinV>= CBCellMinDelta? Yes Generate a CB register value for either 94208 or 9216 fir this cell CBCount = CBMaxNum? No Note: This will work differently defending on how many cells in the pack. Yes No Increment CBcount Write value of CBSet into the ISL94208 and ISL9217 CBRegs Start CBONtime counter Exit FIGURE 14. CELL BALANCING (TURN CELL BALANCE ON) 28 AN1904.1 December 6, 2013 Application Note 1904 Cell Voltage Reg ISL94208 Cell Balance Reg Monitor Cells 4 Cell pack 0 CB6 0 CB4 CB3 0 CB1 0 0-3 1, _, 3, 4, _, 6 5 Cell pack 0 CB6 CB5 CB4 CB3 0 CB1 0 0-4 1, _, 3, 4, 5, 6 6 Cell pack 0 CB6 CB5 CB4 CB3 CB2 CB1 0 0-5 1, 2, 3, 4, 5, 6 FIGURE 15. CELL BALANCING (CELL MONITORING AND CB CONTROL) Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 29 AN1904.1 December 6, 2013