LTC6363 - Precision, Low Power Rail-to-Rail Output Differential Op Amp

LTC6363
Precision, Low Power
Rail-to-Rail Output
Differential Op Amp
DESCRIPTION
FEATURES
100µV Max Offset Voltage
nn 50nA Max Input Offset Current
nn Fast Settling: 780ns to 18-Bit, 8V
P-P Output
nn 1.9mA Supply Current
nn 2.9nV/√Hz Input-Referred Noise
nn 2.8V (±1.4V) to 11V (±5.5V) Supply Voltage Range
nn Differential Rail-to-Rail Outputs
nn Input Common Mode Range Includes Ground
nn Low Distortion: 115dB SFDR at 2kHz, 18V
P–P
nn 500MHz Gain-Bandwidth Product
nn 35MHz –3dB Bandwidth
nn Low Power Shutdown: 20µA (V = 3V)
S
nn 8-lead MSOP and 2mm × 3mm 8-Lead DFN Packages
The LTC®6363 is a low power, low noise, fully differential
op amp with rail-to-rail outputs optimized to drive low
power SAR ADCs. The LTC6363 draws only 1.9mA supply
current in active operation and features a shutdown mode
which reduces the current consumption to 20µA (VS = 3V).
nn
The amplifier may be configured to convert a single-ended
input signal to a differential output signal or may be driven
differentially. Low offset voltage and low input offset current
make this amplifier suitable for use not only as an ADC
driver but also earlier in the signal chain to provide filtering,
gain or even attenuation by up to 10-to-1 to convert high
voltage signals to levels suitable for low voltage ADCs.
The LTC6363 is available in 8-lead MSOP and 2mm × 3mm
leadless DFN packages, and operates with guaranteed
specifications over a –40°C to 125°C temperature range.
APPLICATIONS
n
n
n
n
n
20-Bit, 18-Bit and 16-Bit SAR ADC Drivers
Single-Ended-to-Differential Conversion
Low Power Pipeline ADC Drivers
Differential Line Drivers
Battery-Powered Instrumentation
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
LTC6363 Driving LTC2378-20
fIN = 2kHz, –1dBFS,175k-Point FFT
DC-Coupled Interface from a Ground-Referenced
Single-Ended Input to an LTC2378-20 SAR ADC
0
1k
VIN
VOCM
0.1µF
SHDN
0.1µF
1k
– +
LTC6363
+ –
1k
–1V
5V
2.5V
VREF
VDD
–40
3.3nF
30.1Ω
30.1Ω
AIN+
3.3nF
3.3nF
AIN–
20-BIT
LTC2378-20
SAR ADC
1Msps
GND
6363 TA01a
AMPLITUDE (dBFS)
6V
1k
VS = 6V, –1V
VOUTDIFF = 8.9VP-P
HD2 = –138.2dBc
HD3 = –119.9dBc
SFDR = 114.6dB
THD = –111.3dB
SNR = 102.7dB
SINAD = 101.4dB
–20
–60
–80
–100
–120
–140
–160
0
50 100 150 200 250 300 350 400 450 500
FREQUENCY (kHz)
6363 TA01b
6363f
For more information www.linear.com/LTC6363
1
LTC6363
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (V+ – V–)...................................12V
Input Current (+IN, –IN, VOCM, SHDN) (Note 2).... ±10mA
Output Short-Circuit Duration
(Note 3)...........................................Thermally Limited
Operating Temperature Range (Note 4)
LTC6363I..............................................–40°C to 85°C
LTC6363H........................................... –40°C to 125°C
Specified Temperature Range (Note 5)
LTC6363I..............................................–40°C to 85°C
LTC6363H........................................... –40°C to 125°C
Maximum Junction Temperature........................... 150°C
Storage Temperature Range................... –65°C to 150°C
MSOP Lead Temperature (Soldering, 10 sec)......... 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
–IN 1
VOCM 2
V+ 3
+OUT 4
– +
+–
8
7
6
5
+IN
SHDN
V–
–OUT
–IN 1
8
+IN
VOCM 2
7
SHDN
6
V–
5
–OUT
V+ 3
+OUT 4
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 273°C/W
– +
9 +–
V–
DD PACKAGE
8-LEAD (2mm × 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 64°C/W, θJC = 10.6°C/W
EXPOSED PAD (PIN 9) IS V–, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
LTC6363IMS8#PBF
LTC6363IMS8#TRPBF
LTGSQ
8-Lead Plastic MSOP
–40°C to 85°C
LTC6363HMS8#PBF
LTC6363HMS8#TRPBF
LTGSQ
8-Lead Plastic MSOP
–40°C to 125°C
TAPE AND REEL (MINI)
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC6363IDCB#TRMPBF
LTC6363IDCB#TRPBF
LGVG
8-Lead (2mm × 3mm) Plastic DFN
–40°C to 85°C
LTC6363HDCB#TRMPBF
LTC6363HDCB#TRPBF
LGVG
8-Lead (2mm × 3mm) Plastic DFN
–40°C to 125°C
Lead Free Finish
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
6363f
2
For more information www.linear.com/LTC6363
LTC6363
ELECTRICAL
CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 10V, V– = 0V, VCM = VOCM = VICM = 5V, VSHDN = open. VS is defined
as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined as (V+OUT – V–OUT).
SYMBOL
VOSDIFF
PARAMETER
Differential Offset Voltage (Input Referred)
CONDITIONS
VS = 3V
VICM =1.5V
VS = 5V
VICM = 2.5V
VS = 10V
VICM = 5V
∆VOSDIFF/∆T
(Note 6)
IB (Note 7)
IOS (Note 7)
Differential Offset Voltage Drift (Input Referred) VS = 3V
VS = 5V
VS = 10V
Input Bias Current
VS = 3V
VS = 5V
VS = 10V
Input Offset Current
VS = 3V
MIN
TYP
25
MAX
100
200
100
200
UNITS
µV
µV
µV
µV
25
100
200
µV
µV
0.45
0.45
0.45
–0.5
–0.5
–0.5
±5
1.25
1.25
1.25
–0.1
–0.1
–0.1
±50
±75
±50
±75
±50
±75
±150
±150
±150
l
25
l
l
l
0
0
0
78
85
90
70
80
90
90
110
115
120
120
120
120
125
µV/°C
µV/°C
µV/°C
µA
µA
µA
nA
nA
nA
nA
nA
nA
pA/°C
pA/°C
pA/°C
MΩ
kΩ
pF
µVP-P
nV/√Hz
nV/√Hz
pA/√Hz
V
V
V
dB
dB
dB
dB
dB
dB
dB
l
70
90
dB
1
1
1
0.2
0.1
0.07
V/V
V/V
V/V
%
%
%
l
l
l
l
l
l
–1
–1
–1
l
VS = 5V
±5
l
VS = 10V
±5
l
∆IOS/∆T (Note 6)
Input Offset Current Drift
RIN
Input Resistance
CIN
en
Input Capacitance
Differential Input Noise Voltage
Differential Input Noise Voltage Density
Common Mode Noise Voltage Density
Input Noise Current Density
Input Common Mode Range
envocm
in
VICMR (Note 8)
VS = 3V
VS = 5V
VS = 10V
Common Mode
Differential Mode
Differential Mode
0.1Hz to 10Hz
f = 100kHz (Not Including RI/RF)
f = 100kHz
f = 100kHz (Not Including RI/RF)
VS = 3V
VS = 5V
VS = 10V
VS = 3V, VICM from 0V to 1.8V
VS = 5V, VICM from 0V to 3.8V
VS = 10V, VICM from 0V to 8.8V
VS = 3V, VOCM from 0.5V to 2.5V
VS = 5V, VOCM from 0.5V to 4.5V
VS = 10V, VOCM from 0.5V to 9.5V
VS = 2.8V to 11V
CMRRI (Note 9)
Input Common Mode Rejection Ratio
(Input Referred) ∆VICM/∆VOSDIFF
CMRRIO (Note 9)
Output Common Mode Rejection Ratio
(Input Referred) ∆VOCM/∆VOSDIFF
PSRR (Note 10)
Differential Power Supply Rejection
(∆VS/∆VOSDIFF)
Output Common Mode Power Supply Rejection VS = 2.8V to 11V
(∆VS/∆VOSCM)
VS = 3V, VOCM from 0.5V to 2.5V
Common Mode Gain (∆VOUTCM/∆VOCM)
VS = 5V, VOCM from 0.5V to 4.5V
VS = 10V, VOCM from 0.5V to 9.5V
Common Mode Gain Error 100 • (GCM – 1)
VS = 3V, VOCM from 0.5V to 2.5V
VS = 5V, VOCM from 0.5V to 4.5V
VS = 10V, VOCM from 0.5V to 9.5V
PSRRCM (Note 10)
GCM
∆GCM
±30
±30
±30
50
40
2
2.5
2.9
14
0.55
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
1.8
3.8
8.8
1
0.5
0.4
6363f
For more information www.linear.com/LTC6363
3
LTC6363
ELECTRICAL
CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 10V, V– = 0V, VCM = VOCM = VICM = 5V, VSHDN = open. VS is defined
as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined as (V+OUT – V–OUT).
SYMBOL
BAL
AVOL
VOSCM
∆VOSCM/∆T
VOUTCMR (Note 8)
PARAMETER
CONDITIONS
Output Balance (∆VOUTCM/∆VOUTDIFF)
∆VOUTDIFF = 2V
Single-Ended Input
Differential Input
VS = 3V
VS = 5V
VS = 10V
Open-Loop Voltage Gain
Common Mode Offset Voltage
(VOUTCM – VOCM)
Common Mode Offset Voltage Drift
Output Signal Common Mode Range
(Voltage Range for the VOCM Pin)
VOCM
Self-Biased Voltage at the VOCM Pin
RINVOCM
VOUT
Input Resistance, VOCM Pin
Output Voltage, High, Either Output Pin
ISC
SR
GBW
-3dB Bandwidth
Full Power Bandwidth
HD2/HD3
2nd/3rd Order Harmonic Distortion
Single-Ended Input
tS
Settling Time to a 8VP-P Output Step
VS (Note 11)
Supply Voltage Range
TYP
MAX
UNITS
l
l
–58
–58
–35
–35
dB
dB
l
l
l
125
±1
±1
±1
10
±6
±6
±6
dB
mV
mV
mV
μV/°C
l
VOCM Driven Externally, VS = 3V
VOCM Driven Externally, VS = 5V
VOCM Driven Externally, VS = 10V
VOCM Not Connected, VS = 3V
VOCM Not Connected, VS = 5V
VOCM Not Connected, VS = 10V
l
l
l
l
l
l
l
IL= 0mA, VS = 3V
IL = –5mA, VS = 3V
IL= 0mA, VS = 5V
IL = –5mA, VS = 5V
IL= 0mA, VS = 10V
IL = –5mA, VS = 10V
Output Voltage, Low, Either Output Pin
IL= 0mA, VS = 3V
IL = 5mA, VS = 3V
IL= 0mA, VS = 5V
IL = 5mA, VS = 5V
IL= 0mA, VS = 10V
IL = 5mA, VS = 10V
Output Short-Circuit Current, Either Output Pin, VS = 3V, Output Shorted to 1.5V
Sinking
VS = 5V, Output Shorted to 2.5V
VS = 10V, Output Shorted to 5V
Output Short-Circuit Current, Either Output Pin, VS = 3V, Output Shorted to 1.5V
VS = 5V, Output Shorted to 2.5V
Sourcing
VS = 10V, Output Shorted to 5V
Slew Rate
Differential 18VP-P Output
Gain-Bandwidth Product
fTEST = 200kHz
f-3dB
FPBW (Note 12)
MIN
l
l
l
l
l
l
0.5
0.5
0.5
1.38
2.33
4.79
1.3
2.8
2.75
4.8
4.75
9.8
9.7
l
l
l
l
l
l
l
l
l
12
13
14
25
27
30
l
390
230
l
l
l
RI = RF =1k
10VP-P Output
18VP-P Output
f = 1kHz, VOUT = 18VP-P
f = 10kHz, VOUT = 18VP-P
f = 100kHz, VOUT = 18VP-P
0.1%
0.01%
0.0015% (16-Bit)
4ppm (18-Bit)
1.5
2.5
5
1.8
2.88
2.83
4.88
4.83
9.88
9.83
0.1
0.15
0.1
0.15
0.1
0.15
25
35
40
55
75
90
75
500
2.5
4.5
9.5
1.82
2.82
5.21
2.3
0.15
0.25
0.15
0.25
0.2
0.3
35
2.4
1.3
–113/–118
–122/–111
–76/–79
350
420
470
780
l
2.8
11
V
V
V
V
V
V
MΩ
V
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
V/μs
MHz
MHz
MHz
MHz
MHz
dBc
dBc
dBc
ns
ns
ns
ns
V
6363f
4
For more information www.linear.com/LTC6363
LTC6363
ELECTRICAL
CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 10V, V– = 0V, VCM = VOCM = VICM = 5V, VSHDN = open. VS is defined
as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined as (V+OUT – V–OUT).
SYMBOL
IS
PARAMETER
Supply Current
CONDITIONS
VS = 3V, Active
MIN
l
VS = 3V, Shutdown
VS = 5V, Active
l
l
VS = 5V, Shutdown
VS = 10V, Active
l
VS = 10V, Shutdown
l
l
VIL
VIH
tON
tOFF
RSHDN
SHDN Input Logic Low
SHDN Input Logic High
Turn-On Time
Turn-Off Time
Input Resistance, SHDN Pin
l
l
l
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: If input pins (+IN, –IN, VOCM and SHDN) should exceed either
supply voltage, the input current should be limited to less than 10mA.
Additionally, if the differential input voltage exceeds 1.4V, the input current
should be limited to less than 10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
Note 4: The LTC6363I is guaranteed functional over the operating
temperature range of –40°C to 85°C. The LTC6363H is guaranteed
functional over the operating temperature range of –40°C to 125°C.
Note 5: The LTC6363I is guaranteed to meet specified performance
from –40°C to 85°C. The LTC6363H is guaranteed to meet specified
performance from –40°C to 125°C.
Note 6: Maximum differential input referred offset voltage drift and
offset current drift are determined by sampling typical parts. Drift is not
guaranteed by test or QA sampled at this value.
Note 7: Input bias current is defined as the average of the input currents
flowing into the input pins (–IN and +IN). Input Offset current is defined as
the difference between the input bias currents (IOS = IB+ – IB–).
Note 8: Input common mode range is tested by verifying that at the limits
stated in the Electrical Characteristics table, the differential offset (VOSDIFF)
and common mode offset (VOSCM) have not deviated by more than
TYP
1.7
MAX
1.8
1.95
20
40
1.75
1.85
2
30
65
1.9
2
2.2
70
130
+
–
(V + V )/2 + 0.4
(V+ + V–)/2 + 1.2
4
2
300
500
700
UNITS
mA
mA
µA
mA
mA
µA
mA
mA
µA
V
V
μs
μs
kΩ
±200µV and ±10mV respectively compared to the VICM = 5V (at VS = 10V),
VICM = 2.5V (at VS = 5V) and VICM = 1.5V (at VS = 3V) cases.
Output common mode range is tested by verifying that at the limits stated
in the Electrical Characteristics table, the common mode offset (VOSCM)
has not deviated by more than ±15mV compared to the VOCM = 5V
(at VS = 10V), VOCM = 2.5V (at VS = 5V) and VOCM = 1.5V (at VS = 3V)
cases.
Note 9: Input CMRR is defined as the ratio of the change in the input
common mode voltage at the pins +IN or –IN to the change in differential
input referred offset voltage. Output CMRR is defined as the ratio of
the change in the voltage at the VOCM pin to the change in differential
input referred offset voltage. This specification is strongly dependent on
feedback ratio matching between the two outputs and their respective
inputs and it is difficult to measure amplifier performance (see Effects of
Resistor Pair Mismatch in the Applications Information section of this data
sheet). For a better indicator of actual amplifier performance independent
of feedback component matching, refer to the PSRR specification.
Note 10: Differential power supply rejection (PSRR) is defined as the
ratio of the change in supply voltage to the change in differential input
referred offset voltage. Common mode power supply rejection (PSRRCM)
is defined as the ratio of the change in supply voltage to the change in the
common mode offset voltage.
Note 11: Supply voltage range is guaranteed by power supply rejection
ratio test.
Note 12: Full power bandwidth is calculated from the slew rate.
FPBW = SR/(2 • π • VP)
6363f
For more information www.linear.com/LTC6363
5
LTC6363
TYPICAL PERFORMANCE CHARACTERISTICS
16
100
50
0
–50
–100
–150
–200
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
VS = ±5V
VICM = VOCM = 0V
FIVE TYPICAL UNITS
12
2.0
8
SUPPLY CURRENT (mA)
VS = ±5V
VICM = VOCM = 0V
FIVE TYPICAL UNITS
150
4
0
–4
–8
–16
–50
2.1
1.8
–25
0
25
50
75
TEMPERATURE (°C)
100
1.0
0.8
0.6
TA = –40°C
TA = 25°C
TA = 125°C
0
1
2
3 4 5 6 7
SUPPLY VOLTAGE (V)
8
9
1.2
0.9
0.6
0
1
2
3 4 5 6 7
SHDN VOLTAGE (V)
8
9
45
30
15
TA = –40°C
TA = 25°C
TA = 125°C
0
0
10
6363 G05
5.0
1V/DIV
VS = ±5V
4.8
–4.7
4.7
–4.8
2
3 4 5 6 7
SUPPLY VOLTAGE (V)
–5
0
5
LOAD CURRENT (mA)
8
9
10
VINDIFF
–4.9
TA = –40°C
TA = 25°C
TA = 125°C
–10
1
Output Overdrive Recovery
–4.6
4.5
–15
0
–4.5
4.9
4.6
TA = –40°C
TA = 25°C
TA = 125°C
6363 G06
–SWING (V)
+SWING (V)
VSHDN
125
60
Output Voltage Swing vs Load
Current
6363 G07
100
Shutdown Supply Current
vs Supply Voltage
1.5
Turn-On and Turn-Off
Transient Response
5μS/DIV
0
25
50
75
TEMPERATURE (°C)
VSHDN = V–
6363 G04
RI = RF = 1k
RLOAD = 500
–25
75
0.3
10
VOUTDIFF
VS = 10V
VS = 3V
6363 G03
SUPPLY CURRENT (µA)
VOCM AND SHDN PINS
BYPASSED BY
0.1µF CAPACITORS
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
1.6
0
1.6
1.4
–50
125
V+ = 10V
V– = 0V
1.8
0.2
1.7
Supply Current vs SHDN Voltage
2.0
0.4
1.8
6363 G02
Supply Current
vs Supply Voltage
1.2
1.9
1.5
–12
6363 G01
1.4
Supply Current vs Temperature
2.1
4V/DIV
200
Common Mode Offset Voltage
vs Temperature
COMMON MODE OFFSET VOLTAGE (mV)
DIFFERENTIAL INPUT OFFSET VOLTAGE (µV)
Differential Input Offset Voltage
vs Temperature
VOUTDIFF
10
15
6363 G08
–5.0
VS = ±5V
VINDIFF = 24VP–P
RLOAD = 1k
1μS/DIV
6363 G09
6363f
6
For more information www.linear.com/LTC6363
LTC6363
TYPICAL PERFORMANCE CHARACTERISTICS
Differential Output Impedance
vs Frequency
150
100
10
1
1M
10M
100M
FREQUENCY (Hz)
VS = ±5V
125
100
75
50
25
0
1G
PSRR+
PSRR–
1
10
100
1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
6363 G10
0
100
50
0
–50
–100
TA = –40°C
TA = 25°C
TA = 125°C
–150
–200
–5 –4 –3 –2 –1 0 1 2 3 4
INPUT COMMON MODE VOLTAGE (V)
INPUT OFFSET CURRENT (nA)
–300
–400
–500
6363 G12
25.0
12.5
0
–12.5
–25.0
–37.5
VICM = 3.8V
–5 –4 –3 –2 –1 0 1 2 3 4
INPUT COMMON MODE VOLTAGE (V)
–50.0
–50
5
–25
0
25
50
75
TEMPERATURE (°C)
100
6363 G13
Slew Rate vs Temperature
90
100
en
1
in
10
100
1k
10k 100k
FREQUENCY (Hz)
1M
0.1
30M
85
SLEW RATE (V/µs)
10
INPUT CURRENT NOISE DENSITY (pA/√Hz)
VS = ±5V
VICM = VOCM = 0V
10
125
6363 G14
Input Noise Density vs Frequency
100
0.1
5
VS = ±5V
VICM = VOCM = 0V
FIVE TYPICAL UNITS
37.5
–200
1
VICM = 3.8V
50.0
–100
–700
VS = ±5V
150
Input Offset Current vs
Temperature
VS = ±5V
–600
200
6363 G11
Input Bias Current vs Input
Common Mode Voltage
INPUT BIAS CURRENT (nA)
0.1
100k
Differential Input Offset Voltage
vs Input Common Mode Voltage
DIFFERENTIAL INPUT OFFSET VOLTAGE (µV)
POWER SUPPLY REJECTION RATIO (dB)
VS = ±5V
RI = RF = 1k
INPUT VOLTAGE NOISE DENSITY (nV/√Hz)
OUTPUT IMPEDANCE (Ω)
1k
Differential Power Supply
Rejection Ratio vs Frequency
VS = ±5V
SINGLE–ENDED INPUT
VOUTDIFF = 18VP–P
80
75
70
SLEW MEASURED 10% TO 90%
65
60
–50
–25
6363 G15
0
25
50
75
TEMPERATURE (°C)
100
125
6363 G16
6363f
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7
LTC6363
TYPICAL PERFORMANCE CHARACTERISTICS
Input Common Mode Rejection
Ratio vs Frequency
80
VS = ±5V
VS = ±5V
VICM = VOCM = 0V
RLOAD = 1k
70
100
60
50
80
40
GAIN (dB)
COMMON MODE REJECTION RATIO (dB)
120
Frequency Response
vs Closed-Loop Gain
60
AV = 0.1, RI = 2k, RF = 200
AV = 0.25, RI = 1.4k, RF = 350
AV = 0.5, RI = 1.4k, RF = 700
AV = 1, RI = 1k, RF = 1k
AV = 2, RI = 700, RF = 1.4k
AV = 5, RI = 400, RF = 2k
AV = 10, RI = 200, RF = 2k
AV = 20, RI = 100, RF = 2k
AV = 100, RI = 20, RF = 2k
AV = 1000, RI = 2, RF = 2k
30
20
10
40
0
–10
20
–20
0
1k
10k
100k
1M
FREQUENCY (Hz)
10M
–30
100k
100M
1M
10M
FREQUENCY (Hz)
100M 300M
6363 G18
6363 G17
Frequency Peaking vs Load
Capacitance and Series Output
Resistance
10
160
RSER = 30Ω
RSER = 10Ω
9
8 OUTPUTS MEASURED
AFTER SERIES RESISTORS
7
5
4
3
2
1
10
100
1000
10000
CAPACITIVE LOAD (pF)
50000
180
160
120
140
100
120
80
100
60
80
40
60
20
40
GAIN (dB)
6
0
GAIN
PHASE
140
V = ±5V
0 S
VICM = VOCM = 0V
–20 RI = RF = 1k
NO LOAD
–40
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
PHASE (DEG)
FREQUENCY PEAKING (dB)
Open-Loop Gain and Phase vs
Frequency
20
0
–20
10M 100M
6363 G20
6363 G19
Small-Signal Step Response
Large-Signal Step Response
V–OUT
1V/DIV
20mV/DIV
V–OUT
VS = ±5V
VICM = VOCM = 0V
RI = RF = 1k
RLOAD = 1k
VINDIFF = 250mVP-P
SINGLE-ENDED INPUT
V+OUT
200nS/DIV
6363 G21
VS = ±5V
VICM = VOCM = 0V
RI = RF = 1k
RLOAD = 1k
VINDIFF = 18VP-P
SINGLE-ENDED INPUT
V+OUT
500nS/DIV
6363 G22
6363f
8
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LTC6363
TYPICAL PERFORMANCE CHARACTERISTICS
DC Linearity
Harmonic Distortion vs Frequency
–70
60
40
20
0
–20
VS = ±5V
VICM = VOCM = 0V
RI = RF = 1k
NO LOAD
LINEAR FIT FOR –8V ≤ VINDIFF ≤ 8V
–80
–100
–10 –8 –6 –4 –2 0 2
VINDIFF (V)
4
6
–90
–100
–110
8
–130
10
100k
SETTLING TIME (ns)
800
700
600
18-BIT
500
400
300
16-BIT
4
6
8
10 12 14 16 18 20
VOUTDIFF (VP–P)
6363 G26
100
0
2
3
4
5
6
7
DIFFERENTIAL OUTPUT STEP (VP–P)
8
VS = 10V, 0V
RI = RF = 1k
4
3
2
1
0
1 DIV = 18-BIT ERROR OF AN
8VP-P INPUT ADC
150
120
90
60
30
ERROR
0
–1
–30
–2
–60
–3
–90
VOUTDIFF
–4
–120
–5
–150
0.5μS/DIV
6363 G28
Typical Distribution of Input
Offset Current Drift
Typical Distribution of Differential
Input Offset Voltage Drift
30
5
6363 G25
6363 G27
100
VS = ±5V
90
25
PERCENTAGE OF PARTS (%)
2
PERCENTAGE OF PARTS (%)
0
–5 –4 –3 –2 –1 0 1 2 3 4
INPUT COMMON MODE VOLTAGE (V)
5
200
HD2
HD3
HD2
HD3
Settling Time to 8VP-P
Output Step
VS = 10V, 0V
RI = RF = 1k
BIT NUMBERS ARE REFERENCED
TO AN 8VP-P INPUT ADC
900
–130
–120
6363 G24
1000
–120
–110
–140
Settling Time vs Output Step
–110
–140
10k
FREQUENCY (Hz)
6363 G23
–100
–100
ERROR (µV)
DISTORTION (dBc)
–90
1k
–90
VS = ±5V
RI = RF = 1k
VOUTDIFF = 18VP–P
fIN = 2kHz
DIFFERENTIAL INPUTS
–130
HD2
VS = ±5V
VOCM = 0V
RI = RF = 1k
fIN = 2kHz
SINGLE–ENDED INPUT
GROUND REFERENCED
–80
HD3
–120
Harmonic Distortion vs Output
Amplitude
–70
–80
DIFFERENTIAL OUTPUT VOLTAGE (V)
–60
–70
VS = ±5V
VOCM = 0V
RI = RF = 1k
VOUTDIFF = 18VP–P
SINGLE–ENDED INPUT,
GROUND REFERENCED
–80
DISTORTION (dBc)
DIFFERENTIAL OUTPUT ERROR
FROM LINEAR FIT (µV)
80
DISTORTION (dBc)
100
–40
Harmonic Distortion vs Input
Common Mode Voltage
20
15
10
5
VS = ±5V
80
70
60
50
40
30
20
10
0
–2 –1.5 –1 –0.5 0 0.5 1 1.5 2
DIFFERENTIAL INPUT OFFSET VOLTAGE DRIFT (µV/°C)
0
–150
–90
–30
30
90
150
INPUT OFFSET CURRENT DRIFT (pA/°C)
6363 G29
6363 G30
6363f
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9
LTC6363
PIN FUNCTIONS
–IN (Pin 1): Inverting Input of Amplifier.
VOCM (Pin 2): Output Common Mode Reference Voltage.
Apply a voltage to this pin to set the output common
mode voltage level. If left floating, an internal resistor
divider develops a default voltage approximately halfway
between V+ and V–.
V+ (Pin 3): Positive Power Supply. Operational supply
range is 2.8V to 11V when V– = 0V.
+OUT (Pin 4): Positive Output Pin. Output capable of
swinging rail-to-rail.
V– (Pin 6/Exposed Pad Pin 9): Negative Power Supply.
Negative supply can be negative as long as 2.8V ≤ (V+ –
V–) ≤ 11V still applies.
SHDN (Pin 7): When the SHDN pin is floating or driven
high, the LTC6363 is in the normal (active) operating mode.
When SHDN pin is connected to V– or driven low, the
part is disabled and draws approximately 20µA of supply
current (VS = 3V). Refer to SHDN Pin in the Applications
information section of this data sheet for more details.
+IN (Pin 8): Noninverting Input of Amplifier.
–OUT (Pin 5): Negative Output Pin. Output capable of
swinging rail-to-rail.
BLOCK DIAGRAM
LTC6363
8
7
+IN
V–
6
V+
V–
5
V–
SHDN
V+
–OUT
V–
V+
V+
V+
3.6M
+
3.6M
–
VOCM
V–
V–
V–
V+ V–
V+
–IN
1
V–
V–
VOCM
2
V+
V+
3
+OUT
4
6363 BD
6363f
10
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LTC6363
APPLICATIONS INFORMATION
Functional Description
The LTC6363 is a fully-differential, low power, low-noise,
precision amplifier. The amplifier is optimized to convert
a fully differential or single-ended signal to a low impedance, balanced differential output suitable for driving high
performance, low power differential ∑∆ or SAR ADCs. The
balanced differential nature of the amplifier also provides
even-order harmonic distortion cancellation, and low
susceptibility to common mode noise (e.g. power supply
noise).
Note from the previous equation, the differential output
voltage (V+OUT – V–OUT) is independent of input and output
common mode voltages, or the voltage at the common
mode pin. This makes the LTC6363 ideally suited for preamplification, level shifting and conversion of single-ended
signals to differential output signals for driving differential
input ADCs.
G=
RI
The outputs of the LTC6363 are capable of swinging railto-rail and can source up to 90mA or sink up to 40mA
of current. The LTC6363 is optimized for high bandwidth
and low power applications. Load capacitances above
50pF to ground or 25pF differentially should be decoupled
with 10Ω to 50Ω of series resistance from each output to
prevent oscillation or ringing.
SHDN Pin
The LTC6363 has a SHDN pin which, when tied to V– or
driven to below (V+ + V–)/2 + 0.4V, will shut down amplifier
operation such that only 20µA (at VS = 3V) to 70µA (at
VS = 10V) is drawn from the supplies. Pull-down circuitry
should be capable of sinking at least 12µA to guarantee
complete shutdown over all conditions. For normal amplifier operation, the SHDN pin should be either:
a) Bypassed with a 0.1uF capacitor to ground
b) Driven to (V+ + V–)/2 + 1.2V after supply voltages have
been established for 30ms or longer.
This will ensure that the LTC6363 will power up in normal
operation under any operating condition of temperature
and supply voltage and will additionally prevent noise
pickup and supply rail transients from inadvertently shutting down the amplifier. Do not tie the SHDN pin directly
to the positive supply (V+).
General Amplifier Applications
In Figure 1, the gain to VOUTDIFF from VINP and VINM is
given by:
VINP
VCM
+
–
V+IN
V–OUT
V+
+
–
+
VOCM
VINM
RF
RF
RI
VOCM
–
+
–
RI
V–
V–IN
RF
6363 F01
V+OUT
Figure 1. Definitions and Terminology
Output Common Mode and VOCM Pin
The output common mode voltage is defined as the average of the two outputs:
+V
V

VOUTCM =  +OUT –OUT  = VOCM


2
As the equation shows, the output common mode voltage
is independent of the input common mode voltage, and
is instead determined by the voltage on the VOCM pin, by
means of an internal common mode feedback loop.
If the VOCM pin is left open, an internal resistor divider
develops a default voltage of approximately halfway
between V+ and V–. The VOCM pin can be overdriven to
another voltage if desired for greater accuracy or flexibility.
For example, when driving an ADC, if the ADC makes a
reference available for setting the common mode voltage, it can be directly tied to the VOCM pin, as long as
the ADC is capable of driving the 1.8M input resistance
presented by the VOCM pin. The Electrical Characteristics
table specifies the valid range that can be applied to the
VOCM pin (VOUTCMR).
R 
VOUTDIFF = V+OUT − V–OUT ≈  F  • ( VINP – VINM )
 RI 
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11
LTC6363
APPLICATIONS INFORMATION
Input Common Mode Voltage Range
The LTC6363's input common mode voltage (VICM) is
defined as the average of the two input pins, V+IN and V–IN.
The inputs of the LTC6363 are capable of swinging over
the range defined in the Electrical Characteristics table
(see VICMR). Due to the external resistive divider action
of the gain and feedback resistors, the effective range of
signals that can be processed is wider than the provided
range. The input common mode range at the op amp
inputs depends on the circuit configuration (G = gain),
VOCM, and VCM (refer to Figure 1). For fully differential
input applications, where VINP = –VINM, the common
mode input is approximately:
VICM = VCM •
G
1
+ VOCM •
G+1
G+1
For single-ended applications, where VINM = 0, the input
common mode voltage also depends on the input signal.
In this case, the input common mode voltage at the input
pins of the LTC6363 is approximately :
VICM = ( VCM + VINP / 2) •
G
1
+ VOCM •
G+1
G+1
If, for example, the input signal (VINP) is a sinusoid, an
attenuated version of that sinusoid also appears at the
LTC6363 inputs.
In general, VCM (refer to Figure 1) is valid if it satisfies the
following inequality:
(
)
G + 1 VOCM
G + 1 VOCM
V
−
≤ VCM ≤ V + – 1.2
–
G
G
G
G
−
which exceed either supply, the current should be limited
to under 10mA to prevent damage to the IC.
Input Impedance and Loading Effects
The low frequency input impedance looking into the VINP
or VINM input of Figure 1 depends on how the inputs are
driven. For fully differential input sources (VINP = –VINM),
the input impedance seen at either input is simply:
RINP = RINM = RI
For single-ended inputs, due to the signal imbalance at the
input, the input impedance increases over the balanced
differential case. The input impedance looking into either
input is:
RINP = RINM =
RI
 1  RF 
1–   • 
 2   RI +RF 
Input signal sources with non-zero impedances can also
cause feedback imbalance between the pair of feedback
networks. For the best performance, it is recommended
that the input source impedance be compensated. If impedance matching is required at the source, a termination
resistor R1 should be chosen (see Figure 2) such that:
R1=
RINM •RS
RINM –RS
RINM
RS
VS
RI
R1
Input Pin Protection
The input stage of the LTC6363 op amp is protected against
differential input voltages which exceed 1.4V by two pairs
of series diodes connected back-to-back between +IN
and –IN. If the differential input voltage exceeds 1.4V, the
input current should be limited to under 10mA to prevent
damage to the IC. Moreover, all pins have clamping diodes
to both power supplies. If any pin is driven to voltages
RF
R1 CHOSEN SO THAT R1 || RINM = RS
R2 CHOSEN TO BALANCE R1 || RS
RI
–
+
+
–
RF
6405 F04
R2 = RS || R1
Figure 2. Optimal Compensation for Signal Source Impedance
6363f
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LTC6363
APPLICATIONS INFORMATION
According to Figure 2, the input impedance looking into
the differential amp (RINM) reflects the single-ended source
case, given above. Also, R2 is chosen as:
R2 = R1||RS =
R1•RS
R1+RS
RI2
VINP
VCM
VOUT(DIFF) = V+OUT – V–OUT
R
∆β
∆β
≈ VINDIFF • F + VCM •
– VOCM •
RI
β AVG
β AVG
where RF is the average of RF1 and RF2, and RI is the
average of RI1 and RI2.
βAVG is defined as the average feedback factor from the
outputs to their respective inputs:
RI2 
1  RI1
β AVG = • 
+
2  RI1 +RF1 RI2 +RF2 
∆β is defined as the difference in the feedback factors:
∆β =
RI2
RI1
–
RI2 +RF2 RI1 +RF1
Here, VCM and VINDIFF are defined as the average and
the difference of the two input voltages VINP and VINM,
respectively:
VCM =
V–OUT
+
VVOCM
VINM
RF2
VOCM
–
+
–
V–IN
RF1
6362 F03
Figure 3 shows a circuit diagram which takes into consideration resistors mismatch. Often, resistor mismatch
limits CMRR well below amplifier specifications. Assuming infinite open-loop gain, the differential output
relationship is given by the equation:
+
–
RI1
Effects of Resistor Pair Mismatch
+
–
V+IN
V+OUT
Figure 3. Real-World Application with
Feedback Resistor Pair Mismatch
When the feedback ratios mismatch (Δβ), common mode
to differential conversion occurs. Setting the differential
input to zero (VINDIFF = 0), the degree of common mode
to differential conversion is given by the equation:
VOUTDIFF ≈ (VCM – VOCM) • ∆β/βAVG
In general, the degree of feedback pair mismatch is a source
of common mode to differential conversion of both signals
and noise. For instance, Table 1 shows the worst-case,
resistor limited CMRR of the LTC6363 amplifier configured
in a gain of 1 using external resistors.
Table 1.
Tolerance
CMRR
5%
20dB
1%
34dB
0.1%
54dB
0.01%
74dB
LT5400
86dB
0.001%
94dB
A low impedance ground plane should be used as a reference for both the input signal source and the VOCM pin.
VINP + VINM
2
VINDIFF = VINP – VINM
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13
LTC6363
APPLICATIONS INFORMATION
Noise
The LTC6363’s differential input referred voltage and
current noise densities are 2.9nV/√Hz and 0.55pA/√Hz,
respectively. In addition to the noise generated by the
amplifier, the surrounding feedback resistors also contribute noise. A simplified noise model is shown in Figure 4.
The output noise generated by both the amplifier and the
feedback components is given by the equation:
2
eno =

 RF  
2
eni •  1+   + 2 • (in •RF )
 RI  

2

R 
2
+ 2 • enRI • F  + 2 • enRF
RI 

For example, if RF = RI = 1k, the output noise of the circuit
eno = 10nV/√Hz.
If the circuits surrounding the amplifier are well balanced,
common mode noise (envocm) does not appear in the differential output noise equation given above.
The LTC6363’s input referred voltage noise contributes the
equivalent noise of a 510Ω resistor. When the feedback
network is comprised of resistors whose values are larger
enRI2
RI
RF
enRF2
in+2
+
in–2
enRI2
–
eni2
RI
eno2
RF
enRF2
than this, the output noise is resistor noise and amplifier
current noise dominant. For feedback networks consisting
of resistors with values smaller than 510Ω, the output
noise is voltage noise dominant.
Lower resistor values always result in lower noise at the
penalty of increased distortion due to increased loading of
the feedback network on the output. Higher resistor values
will result in higher output noise, but typically improved
distortion due to less loading on the output.
GBW vs f–3dB
Gain-bandwidth product (GBW) and –3dB frequency
(f–3dB) have been specified in the Electrical Characteristics
table as two different metrics for the speed of the LTC6363.
GBW is obtained by measuring the open-loop gain of the
amplifier at a specific frequency (fTEST), then calculating
gain • fTEST. GBW is a parameter that depends only on the
internal design and compensation of the amplifier and is
a suitable metric to specify the inherent speed capability
of the internal amplifier.
Of more practical interest, f–3dB is the frequency at which
the closed-loop gain is 3dB lower than its low frequency
value. The value of f–3dB depends on the speed of the
internal amplifier as well as the feedback factor.
In most amplifiers, the open-loop gain response exhibits
a conventional single-pole roll-off for most of the frequencies before the unity-gain crossover frequency, and the
GBW and unity-gain frequency are close to each other.
However, the LTC6363 is intentionally compensated in
such a way that its GBW is significantly larger than its
f–3dB in a closed loop gain of 1. This means that at lower
frequencies where the amplifier inputs generally operate,
the amplifier’s gain and thus the feedback loop gain is
larger. This further linearizes the amplifier and improves
distortion at those frequencies.
6362 F04
Figure 4. Simplified Noise Model
6363f
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LTC6363
APPLICATIONS INFORMATION
Feedback Capacitors
Power Dissipation
When the combination of parasitic capacitances (device +
PCB) at the LTC6363’s inputs form a pole whose frequency
lies within the closed-loop bandwidth of the amplifier, a
capacitor (CF) can be added in parallel with the external
feedback resistors (RF) to cancel the degradation on stability. CF should be chosen such that it generates a zero at a
frequency close to the frequency of the pole.
Due to the wide supply voltage range, it is possible for the
LTC6363 to exceed the maximum junction temperature
under certain conditions. Maximum junction temperature
(TJ) is calculated from the ambient temperature (TA) and
power dissipation (PD) as follows: TJ= TA+ (PD • θJA).
The power dissipation in the IC is a function of the supply
voltage, output voltage and the load, input and feedback
resistances. For a given supply voltage, the worst-case
power dissipation, PD(MAX), occurs at the maximum quiescent supply current and at an output voltage which is
half of either supply voltage (or the maximum swing if it
is less than half the supply voltage). In this condition, the
LTC6363 will supply current to the load resistors and the
input and feedback resistors, RI and RF. PD(MAX)is given by:
Board Layout and Bypass Capacitors
For single supply applications, it is recommended that
high quality 0.1µF ceramic bypass capacitors be placed
directly between the V+ and the V– pin with short connections. The V– pin should be tied directly to a low impedance ground plane with minimal routing. For dual (split)
power supplies, it is recommended that additional high
quality 0.1µF ceramic capacitors be used to bypass V+ to
ground and V– to ground, again with minimal routing. Small
geometry (e.g., 0603) surface mount ceramic capacitors
have a much higher self-resonant frequency than leaded
capacitors, and perform best with the LTC6363.
To prevent degradation in stability response, it is highly
recommended that any stray capacitance at the LTC6363’s
input pins, +IN and –IN, be kept to an absolute minimum
by keeping printed circuit connections as short as possible.
At the output, always keep in mind the differential nature of
the LTC6363, because it is critical that the load impedances
seen by both outputs (stray or intended), be as balanced
and symmetric as possible. This will help preserve the
balanced operation of the LTC6363 that minimizes the
generation of even-order harmonics and maximizes the
rejection of common mode signals and noise.
The VOCM pin should be bypassed to the ground plane with
a high quality 0.1µF ceramic capacitor. This will prevent
common mode signals and noise on this pin from being
inadvertently converted to differential signals and noise
by impedance mismatches both externally and internally
to the IC.
(
)(
PD(MAX) = V + − V – IS(MAX)
)
 V+
RI  
1+
 2  R  

F 
+2 •
RI + RF
 V+ 
 2 


+2•
RL
2
2
Example: An LTC6363HMS8 in the 8-Lead MSOP package
has a thermal resistance of θJA = 273°C/W. Operating on
±5V supplies, with RI = RF = 1k, and driving a 1k load to
ground at each output, the worst-case power dissipation
is given by:
PD(MAX) = (10V ) ( 2.2mA )
2
2
2.5V )
5V )
(
(
+2•
+2•
1000Ω
2000Ω
= 60mW
In this example, the maximum ambient temperature that
the part is allowed to operate is:
TA = TJ – (PD(MAX) • 273°C/W)
TA = 150°C – (60mW)(273°C/W) = 133.6°C
To operate the device at a higher ambient temperature
for the same conditions, use the LTC6363 in the 8-Lead
DFN package.
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15
LTC6363
APPLICATIONS INFORMATION
Interfacing to ADCs
When driving an ADC, an additional passive filter should be
used between the outputs of the LTC6363 and the inputs
of the ADC. Depending on the application, a single-pole
RC filter will often be sufficient. The sampling process of
ADCs creates a charge transient due to the switching in
of the ADC sampling capacitor. This momentarily creates
high frequency current pulses at the output of the amplifier
as charge is transferred between amplifier and sampling
capacitor. The amplifier must recover and settle from this
load transient before the acquisition period has ended for
a valid representation of the input signal. The RC network
between the outputs of the driver and the inputs of the
ADC decouples this sampling transient (see Figure 5).
The capacitance serves to provide the bulk of the charge
during the sampling process, and the two resistors at the
outputs of the LTC6363 are used to dampen and attenuate
any charge injected by the ADC. Additionally, the RC filter
band limits broadband output noise.
The selection of an appropriate filter depends on the specific ADC, and the following procedure is suggested for
choosing filter component values. Begin by selecting an
appropriate RC time constant for the input signal. Generally, longer time constants improve SNR at the expense of
settling time. Output transient settling to 20-bit accuracy
will require nearly 14 RC time constants to completely
settle. To select the resistor value, remember the resistors
in the decoupling network should be at least 10Ω. Keep
in mind that these resistors also serve to decouple the
LTC6363 outputs from load capacitance. Too large of a
resistor will leave insufficient settling time. Too small of
a resistor will not properly dampen the load transient of
the sampling process, prolonging the time required for
settling. For lowest distortion, choose capacitors with low
dielectric absorption (such as a C0G multilayer ceramic
capacitor). In general, large capacitor values attenuate
the fixed nonlinear charge kickback, however very large
capacitor values will detrimentally load the driver at the
desired input frequency and cause driver distortion. Smaller
input swings will allow for larger filter capacitor values
due to decreased loading demands on the driver. This
property may be limited by the particular input amplitude
dependence of differential nonlinear charge kickback for
the specific ADC.
In some applications, placing series resistors at the inputs
of the ADC may further improve distortion performance.
These series resistors function with the ADC sampling
capacitor to filter potential ground bounce or other high
speed sampling disturbances. Additionally, the resistors
limit the rise time of residual filter glitches that manage to
propagate to the driver outputs. Restricting possible glitch
propagation rise time to within the small signal bandwidth
of the driver enables less disturbed output settling.
For the specific application of LTC6363 driving the
LTC2378-20 SAR ADC, the recommended component
values of the RC filter are provided in Figure 5. These
component values are chosen for optimal distortion and
noise performance.
1k
6V
1k
VIN
VOCM
SHDN
0.1µF
1k
– +
RFILT
30.1Ω
1k
–1V
0Ω
CDIFF
3.3nF
LTC6363
+ –
CCM
3.3nF
RFILT
30.1Ω
0Ω
CCM
3.3nF
AIN+
AIN–
5V
2.5V
VREF
VDD
20-BIT
LTC2378-20
SAR ADC
1Msps
GND
6363 F05
Figure 5. Recommended Interface Solution for Driving the LTC2378-20 SAR ADC
6363f
16
For more information www.linear.com/LTC6363
LTC6363
TYPICAL APPLICATIONS
Single-Ended-to-Differential Conversion of a 5VP-P, 2.5V Referenced Input with Gain of AV = 2 to Drive an ADC
5V
2k
V+OUT
0V
3.3nF
7.5V
5V
1k
2.5V
VIN
0V
VOCM
SHDN
0.1µF
1k
+
–
30.1Ω
– +
LTC6363
30.1Ω
+ –
2k
AIN+
3.3nF
3.3nF
AIN–
5V
2.5V
VREF
VDD
LTC2378-20
SAR ADC
GND
–2.5V
6363 TA02
5V
V–OUT
VCM
2.5V
0V
Differentially Driving an ADC with ∆VIN = 10VP-P and Gain of AV = 1
5V
1k
V+OUT
0V
3.3nF
7.5V
5V
1k
2.5V
VINM
0V
5V
VOCM
SHDN
0.1µF
1k
– +
LTC6363
+ –
1k
30.1Ω
30.1Ω
AIN+
3.3nF
3.3nF
–2.5V
AIN–
5V
2.5V
VREF
VDD
LTC2378-20
SAR ADC
GND
6363 TA03
5V
V–OUT
VINP
0V
0V
6363f
For more information www.linear.com/LTC6363
17
LTC6363
TYPICAL APPLICATIONS
Differentially Driving a Pipeline ADC with AV = 1
100Ω
VCM = 0.9V
V+OUT
0.4V
3.3V
1k
VOCM
SHDN
0.1µF
INPUT BW = 1.2MHz
FULL SCALE = 2VP-P
1k
1V
0.1µF
1.4V
1k
5Ω
30.1Ω
– +
LTC6363
30.1Ω
+ –
1.8V
1.5nF
1.5nF
5Ω
1.5nF
AIN+
AIN–
VDD
VCM
16 BIT
LTC2160
PIPELINE ADC
25Msps
GND
6363 TA04
1k
1.4V
VIN
V–OUT
–1V
0.4V
MEASURED PERFORMANCE FOR LTC6363 DRIVING LTC2160:
INPUT: fIN = 2kHz, –1dBFS
SNR: 77dB
HD2: –100.0dBc
HD3: –100.2dBc
THD: –96.5dB
Differential Line Driver Connected in Gain of AV = 2
1V
V+OUT
1V
2k
VIN
–1V
1k
VIN
–1V
5V
VOCM
0.1µF
SHDN
1k
49.9Ω
– +
LTC6363
+ –
–5V
100Ω
49.9Ω
6363 TA05
2k
1V
V–OUT
–1V
6363f
18
For more information www.linear.com/LTC6363
LTC6363
TYPICAL APPLICATIONS
LTC6363 Used as Lowpass Filter/Driver with 10VP-P Singled-Ended Input, Driving a SAR ADC
4.7nF
2.2nF
1k
3-POLE FILTER
f–3dB = 50kHz
5V
7.5V
0V
30.1Ω
0.1µF
VCM
5V
V
–5V IN
499Ω
499Ω
VOCM
0.1µF
– +
LTC6363
+ –
6.8nF
VCM
499Ω
–2.5V
499Ω
33nF
30.1Ω
0.1µF
33nF
33nF
AIN+
AIN–
5V
2.5V
VREF
VDD
16 BIT
LTC2380-16
SAR ADC
5V
2Msps
GND
6363 TA06
0V
1k
2.2nF
4.7nF
Differential AV = 1/9 Configuration Using an LT®5400 Quad-Matched Resistor Network
72V
–72V
VIN
1
2
3
4
LT5400-8 9k
1k
1k
9k
15pF
8
VOCM
7
6
5
0.1µF
SHDN
10V
9V
– +
V+OUT
LTC6363
+ –
V–OUT
15pF
1V
9V
1V
6363 TA07
6363f
For more information www.linear.com/LTC6363
19
LTC6363
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev G)
0.889 ±0.127
(.035 ±.005)
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.65
(.0256)
BSC
0.42 ± 0.038
(.0165 ±.0015)
TYP
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.1016 ±0.0508
(.004 ±.002)
MSOP (MS8) 0213 REV G
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6363f
20
For more information www.linear.com/LTC6363
LTC6363
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DCB Package
8-Lead Plastic DFN (2mm × 3mm)
(Reference LTC DWG # 05-08-1718 Rev A)
0.70 ±0.05
1.35 ±0.05
3.50 ±0.05
1.65 ±0.05
2.10 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.45 BSC
1.35 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.115
TYP
R = 0.05
5
TYP
2.00 ±0.10
(2 SIDES)
0.40 ±0.10
8
1.35 ±0.10
1.65 ±0.10
3.00 ±0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR 0.25
× 45° CHAMFER
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
(DCB8) DFN 0106 REV A
4
0.200 REF
1
0.23 ±0.05
0.45 BSC
0.75 ±0.05
1.35 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
6363f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LTC6363
21
LTC6363
TYPICAL APPLICATION
Single-Ended-to-Differential Conversion of a 20VP-P Ground-Referenced Input with Gain of AV = 0.5 to Drive an ADC
5V
10V
1k
VIN
0V
3.3nF
7.5V
–10V
2k
VIN
V+OUT
2.5V
VOCM
SHDN
0.1µF
2k
30.1Ω
– +
LTC6363
30.1Ω
+ –
1k
AIN+
3.3nF
3.3nF
AIN–
5V
2.5V
VREF
VDD
LTC2378-20
SAR ADC
GND
–2.5V
6363 TA08
5V
V–OUT
0V
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
Fully Differential Amplifiers
1mA, -116 dBc Distortion at 1kHz, 8VP-P Output
LTC6362
Precision, Low Power Rail-to-Rail Input/Output
Differential Op Amp/SAR ADC Driver
LTC1992/LTC1992-X
3MHz to 4MHz Fully Differential Input/Output Amplifiers Internal Feedback Resistors Available (G =1, 2, 5,10)
LT1994
70MHz Low Noise, Low Distortion Fully Differential
Input/Output Amplifier/Driver
13mA, –94dBc Distortion at 1MHz, 2VP-P Output
LT6350
Low Noise, Single-Ended to Differential Converter/
ADC Driver
4.8mA, –97dBc Distortion at 100kHz, 4VP–P Output
LTC6246/LTC6247/
LTC6248
Single/Dual/Quad 180MHz Rail-to-Rail Low Power
Op Amps
1mA/Amplifier, 4.2nV/√Hz
LTC6360
1GHz Very Low Noise Single-Ended SAR ADC Driver
with True Zero Output
13.6mA, HD2/HD3 = –103dBc/–109dBc at 40kHz, 4VP-P Output
Operational Amplifiers
Matched Resistor Networks
LT5400
Precision Quad Matched Resistor Networks
Ratios = 1:1, 1:4, 1:5, 1:9, 1:10
20-Bit, 1Msps, Low Power SAR ADC with 0.5ppm
INL
2.5V Supply, Differential Input, 104dB SNR, ±5V Input Range, DGC,
Pin Compatible Family in MSOP-16 and 4mm × 3mm DFN-16 Packages
ADCs
LTC2378-20
LTC2379-18/LTC2378-18 18-Bit, 1.6Msps/1Msps/500ksps/250ksps Serial, Low 2.5V Supply, Differential Input, 101.2dB SNR, ±5V Input Range, DGC,
LTC2377-18/LTC2376-18 Power ADC
Pin Compatible Family in MSOP-16 and 4mm × 3mm DFN-16 Packages
LTC2380-16/LTC2378-16 16-Bit, 2Msps/1Msps/500ksps/250ksps Serial,
LTC2377-16/LTC2376-16 Low Power ADC
2.5V Supply, Differential Input, 96.2dB SNR, ±5V Input Range, DGC,
Pin Compatible Family in MSOP-16 and 4mm × 3mm DFN-16 Packages
LTC2393-16/LTC2392-16 16-Bit, 1Msps/500ksps/250ksps Parallel/Serial ADC
/LTC2391-16
5V Supply, Differential Input, 94dB SNR, ±4.096V Input Range, Pin
Compatible Family in 7mm × 7mm LQFP-48 and QFN-48 Packages
LTC2383-16/LTC2382-16 16-Bit, 1Msps/500ksps/250ksps Serial, Low
/LTC2381-16
Power ADC
2.5V Supply, Differential Input, 92dB SNR, ±2.5V Input Range, Pin
Compatible Family in MSOP-16 and 4mm × 3mm DFN-16 Packages
LTC2355-14/LTC2356-14 14-Bit, 3.5Msps Serial ADC
3.3V Supply, 1-Channel, Unipolar/Bipolar, 18mW, MSOP-10 Package
LTC2366
12-Bit, 3Msps Serial ADC
2.35V to 3.6V Supply 6- and 8-Lead TSOT-23 Packages
LTC2162/LTC2161/
LTC2160
16-Bit, 65/40/25Msps Low Power ADC
1.8V Supply, Differential Input, 77dB SNR, 2VP-P Input Range, Pipeline
Converter in 7mm × 7mm QFN-48 Package
6363f
22 Linear Technology Corporation
LT 0815 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC6363
 LINEAR TECHNOLOGY CORPORATION 2015