LFP AK 56 D PHPT610030NK NPN/NPN high power double bipolar transistor 20 October 2014 Product data sheet 1. General description NPN/NPN high power double bipolar transistor in a SOT1205 (LFPAK56D) SurfaceMounted Device (SMD) power plastic package. PNP/PNP complement: PHPT610030PK. NPN/PNP complement: PHPT610030NPK. 2. Features and benefits • • • • • High thermal power dissipation capability Suitable for high temperature applications up to 175 °C Reduced Printed-Circuit Board (PCB) requirements comparing to transistors in DPAK High energy efficiency due to less heat generation AEC-Q101 qualified 3. Applications • • • • • • Motor control Power management Load switch Linear mode voltage regulator Backlighting applications Relay replacement 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VCEO collector-emitter voltage open base - - 100 V IC collector current - - 3 A - 75 110 mΩ Per transistor Per transistor RCEsat collector-emitter saturation resistance IC = 3 A; IB = 0.3 A; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C Scan or click this QR code to view the latest information for this product PHPT610030NK NXP Semiconductors NPN/NPN high power double bipolar transistor 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 E1 emitter TR1 2 B1 base TR1 3 E2 emitter TR2 4 B2 base TR2 5 C2 collector TR2 6 C2 collector TR2 7 C1 collector TR1 8 C1 collector TR1 Simplified outline 8 7 6 Graphic symbol 5 C1 B2 E2 TR2 TR1 E1 B1 C2 sym140 1 2 3 4 LFPAK56D (SOT1205) 6. Ordering information Table 3. Ordering information Type number Package PHPT610030NK Name Description Version LFPAK56D Plastic single ended surface mounted package (LFPAK56D); 8 leads SOT1205 7. Marking Table 4. Marking codes Type number Marking code PHPT610030NK 10030NK 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - 100 V VCEO collector-emitter voltage open base - 100 V VEBO emitter-base voltage open collector - 7 V IC collector current - 3 A ICM peak collector current - 8 A IB base current - 0.5 A Per transistor PHPT610030NK Product data sheet single pulse; tp ≤ 1 ms All information provided in this document is subject to legal disclaimers. 20 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 2 / 15 PHPT610030NK NXP Semiconductors NPN/NPN high power double bipolar transistor Symbol Parameter Conditions Ptot total power dissipation Tamb ≤ 25 °C Min Max Unit [1] - 1 W [2] - 2.4 W [3] - 25 W [1] - 1.25 W [4] - 5 W [2] - 3 W Per device Ptot total power dissipation Tamb ≤ 25 °C Tj junction temperature - 175 °C Tstg storage temperature -65 175 °C Tamb ambient temperature -55 175 °C [1] [2] [3] [4] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. 2 Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm . Power dissipation from junction to mounting base. Device mounted on a ceramic PCB, Al2O3, standard footprint. aaa-014341 4 Ptot (W) 3 (1) 2 1 (2) 0 -75 0 75 (1) FR4 PCB, mounting pad for collector 6 cm (2) FR4 PCB, standard footprint Fig. 1. 150 225 Tamb (°C) 2 Per transistor: power derating curves PHPT610030NK Product data sheet All information provided in this document is subject to legal disclaimers. 20 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 3 / 15 PHPT610030NK NXP Semiconductors NPN/NPN high power double bipolar transistor 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions thermal resistance from junction to ambient in free air Min Typ Max Unit [1] - - 150 K/W [2] - - 62.5 K/W - - 6 K/W [1] - - 120 K/W [2] - - 50 K/W [3] - - 30 K/W Per transistor Rth(j-a) Rth(j-sp) thermal resistance from junction to solder point Per device Rth(j-a) thermal resistance from junction to ambient [1] [2] [3] in free air Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. aaa-014342 103 Zth(j-a) (K/W) 102 duty cycle = 1 0.75 0.33 0.2 10 2 Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm . Device mounted on a ceramic PCB, Al2O3, standard footprint. 0.05 0.01 1 10-1 10-5 0.5 0.25 0.1 0.02 0 10-4 10-3 10-2 10-1 1 10 102 tp (s) 103 FR4 PCB, standard footprint Fig. 2. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values PHPT610030NK Product data sheet All information provided in this document is subject to legal disclaimers. 20 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 4 / 15 PHPT610030NK NXP Semiconductors NPN/NPN high power double bipolar transistor aaa-014343 102 Zth(j-a) (K/W) duty cycle = 1 0.75 0.5 0.33 10 0.25 0.2 0.1 0.05 1 0.02 0 0.01 10-1 10-5 10-4 10-3 10-2 FR4 PCB, mounting pad for collector 6 cm Fig. 3. 10-1 1 102 10 tp (s) 103 2 Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit collector-base cut-off current VCB = 80 V; IE = 0 A; Tamb = 25 °C - - 100 nA VCB = 80 V; IE = 0 A; Tj = 150 °C - - 50 µA Per transistor ICBO ICES collector-emitter cut-off VCE = 80 V; VBE = 0 V; Tamb = 25 °C current - - 100 nA IEBO emitter-base cut-off current VEB = 7 V; IC = 0 A; Tamb = 25 °C - - 100 nA hFE DC current gain VCE = 10 V; IC = 500 mA; pulsed; 150 250 - 80 250 - 20 100 - 10 40 - - 90 150 mV - 225 330 mV tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C VCE = 10 V; IC = 1 A; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C VCE = 10 V; IC = 2 A; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C VCE = 10 V; IC = 3 A; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C VCEsat collector-emitter saturation voltage IC = 1 A; IB = 50 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C IC = 3 A; IB = 300 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C PHPT610030NK Product data sheet All information provided in this document is subject to legal disclaimers. 20 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 5 / 15 PHPT610030NK NXP Semiconductors NPN/NPN high power double bipolar transistor Symbol Parameter Conditions Min Typ Max Unit RCEsat collector-emitter saturation resistance IC = 3 A; IB = 0.3 A; pulsed; tp ≤ 300 µs; - 75 110 mΩ - 0.86 1 V - 1 1.2 V - 0.67 0.85 V δ ≤ 0.02; Tamb = 25 °C base-emitter saturation IC = 1 A; IB = 50 mA; pulsed; voltage tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C VBEsat IC = 2 A; IB = 200 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C VBEon base-emitter turn-on voltage VCE = 2 V; IC = 0.1 A; pulsed; td delay time VCC = 12.5 V; IC = 1 A; IBon = 50 mA; - 20 - ns tr rise time IBoff = -50 mA; Tamb = 25 °C - 300 - ns ton turn-on time - 320 - ns ts storage time - 830 - ns tf fall time - 470 - ns toff turn-off time - 1300 - ns fT transition frequency - 140 - MHz - 11 - pF tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C VCE = 10 V; IC = 100 mA; f = 100 MHz; Tamb = 25 °C Cc collector capacitance VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C aaa-010261 400 hFE (1) aaa-010267 3 IB = 50 mA 45 IC (A) 300 40 35 30 2 (2) 200 25 20 15 10 (3) 1 5 100 0 10-1 1 10 102 0 103 104 IC (mA) VCE = 10 V 1 2 3 4 VCE (V) 5 Tamb = 25 °C (1) Tamb = 100 °C Fig. 5. (2) Tamb = 25 °C (3) Tamb = −55 °C Fig. 4. 0 Collector current as a function of collectoremitter voltage; typical values DC current gain as a function of collector current; typical values PHPT610030NK Product data sheet All information provided in this document is subject to legal disclaimers. 20 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 6 / 15 PHPT610030NK NXP Semiconductors NPN/NPN high power double bipolar transistor aaa-010262 1.2 aaa-010265 1.4 VBE (V) VBEsat (V) (1) 0.8 1.0 (2) (1) (3) 0.4 0.6 (2) (3) 0 10-1 Fig. 6. 1 102 10 103 0.2 10-1 104 105 IC (mA) 1 102 10 VCE = 2 V IC/IB = 20 (1) Tamb = −55 °C (1) Tamb = −55 °C (2) Tamb = 25 °C (2) Tamb = 25 °C (3) Tamb = 100 °C (3) Tamb = 100 °C Base-emitter voltage as a function of collector current; typical values Fig. 7. aaa-010263 1 103 104 105 IC (mA) Base-emitter saturation voltage as a function of collector current; typical values aaa-010264 10 VCEsat (V) VCEsat (V) 1 10-1 (2) (1) (1) (2) (3) 10-1 (3) 10-2 10-2 10-3 10-1 Fig. 8. 1 10 102 10-3 10-1 103 104 IC (mA) 1 IC/IB = 20 Tamb = 25 °C (1) Tamb = 100 °C (1) IC/IB = 50 (2) Tamb = 25 °C (2) IC/IB = 20 (3) Tamb = −55 °C (3) IC/IB = 10 Collector-emitter saturation voltage as a function of collector current; typical values PHPT610030NK Product data sheet Fig. 9. 102 103 104 IC (mA) Collector-emitter saturation voltage as a function of collector current; typical values All information provided in this document is subject to legal disclaimers. 20 October 2014 10 © NXP Semiconductors N.V. 2014. All rights reserved 7 / 15 PHPT610030NK NXP Semiconductors NPN/NPN high power double bipolar transistor aaa-010266 103 RCEsat (Ω) RCEsat (Ω) 102 102 10 10 (1) 1 aaa-010268 103 1 (2) 10-1 10-2 10-1 (1) (3) 1 10 102 (2) 10-1 10-2 10-1 103 104 IC (mA) (3) 1 IC/IB = 20 Tamb = 25 °C (1) Tamb = 100 °C (1) IC/IB = 50 (2) Tamb = 25 °C (2) IC/IB = 20 (3) Tamb = −55 °C (3) IC/IB = 10 Fig. 10. Collector-emitter saturation resistance as a function of collector current; typical values PHPT610030NK Product data sheet 10 102 103 104 IC (mA) Fig. 11. Collector-emitter saturation resistance as a function of collector current; typical values All information provided in this document is subject to legal disclaimers. 20 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 8 / 15 PHPT610030NK NXP Semiconductors NPN/NPN high power double bipolar transistor 11. Test information IB input pulse (idealized waveform) 90 % IBon (100 %) 10 % IBoff output pulse (idealized waveform) IC 90 % IC (100 %) 10 % t td ts tr ton tf toff 006aaa003 Fig. 12. BISS transistor switching time definition VBB RB VCC RC Vo (probe) oscilloscope 450 Ω (probe) 450 Ω R2 VI oscilloscope DUT R1 mlb826 Fig. 13. Test circuit for switching times 11.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. PHPT610030NK Product data sheet All information provided in this document is subject to legal disclaimers. 20 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 9 / 15 PHPT610030NK NXP Semiconductors NPN/NPN high power double bipolar transistor 12. Package outline Plastic single ended surface mounted package LFPAK56D; 8 leads E SOT1205 A A b1 c1 L1 mounting base D H D1 D2 L 1 2 3 e b (8x) 4 w X c A E1 E2 A1 C θ Lp detail X 0 2.5 A max 1.05 nom min mm 5 mm scale Dimensions Unit y C c c1 D(1) D1(1) A1 b b1 0.1 0.50 4.4 0.25 0.30 4.70 0.0 0.35 4.1 0.19 0.24 4.45 4.8 D2 (ref) 3.5 E(1) E1(1) 5.30 1.8 4.95 1.6 E2 0.85 e 1.27 H L L1 Lp 6.2 1.3 0.55 0.85 5.9 0.8 0.30 0.40 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. Outline version References IEC JEDEC JEITA w y θ 0.25 0.1 8° 0° sot1205_po European projection Issue date 13-02-21 14-08-21 SOT1205 Fig. 14. Package outline LFPAK56D (SOT1205) PHPT610030NK Product data sheet All information provided in this document is subject to legal disclaimers. 20 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 10 / 15 PHPT610030NK NXP Semiconductors NPN/NPN high power double bipolar transistor 13. Soldering Footprint information for reflow soldering of LFPAK56D package SOT1205 5.85 3.81 1.27 0.7 (4x) 3.2 3.175 3.325 2.0 1.275 0.8 1.875 2.1 1.0 (2x) 2.7 3.85 3.975 0.0625 0.025 0.7 (4x) 1.44 1.27 1.1 (2x) 3.81 solder land solder land plus solder paste solder paste deposit solder resist occupied area Dimensions in mm sot1205_fr Fig. 15. Reflow soldering footprint for LFPAK56D (SOT1205) PHPT610030NK Product data sheet All information provided in this document is subject to legal disclaimers. 20 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 11 / 15 PHPT610030NK NXP Semiconductors NPN/NPN high power double bipolar transistor 14. Revision history Table 8. Revision history Data sheet ID Release date Data sheet status Change notice Supersedes PHPT610030NK v.1 20141020 Product data sheet - - PHPT610030NK Product data sheet All information provided in this document is subject to legal disclaimers. 20 October 2014 © NXP Semiconductors N.V. 2014. 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Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. 20 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 13 / 15 PHPT610030NK NXP Semiconductors NPN/NPN high power double bipolar transistor No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 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Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................2 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 5 11 11.1 Test information ..................................................... 9 Quality information ............................................... 9 12 Package outline ................................................... 10 13 Soldering .............................................................. 11 14 Revision history ................................................... 12 15 15.1 15.2 15.3 15.4 Legal information .................................................13 Data sheet status ............................................... 13 Definitions ...........................................................13 Disclaimers .........................................................13 Trademarks ........................................................ 14 © NXP Semiconductors N.V. 2014. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 20 October 2014 PHPT610030NK Product data sheet All information provided in this document is subject to legal disclaimers. 20 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 15 / 15