DF N1 010 D-3 PDTC143/114/124/144EQA series 50 V, 100 mA NPN resistor-equipped transistors Rev. 1 — 30 October 2015 Product data sheet 1. Product profile 1.1 General description 100 mA NPN Resistor-Equipped Transistor (RET) family in a leadless ultra small DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible and solderable side pads. Table 1. Product overview Type number R1 R2 Package NXP PNP complement PDTC143EQA 4.7 k 4.7 k PDTC114EQA 10 k 10 k DFN1010D-3 (SOT1215) PDTC124EQA 22 k 22 k PDTA124EQA PDTC144EQA 47 k 47 k PDTA144EQA PDTA143EQA PDTA114EQA 1.2 Features and benefits 100 mA output current capability Built-in bias resistors Simplifies circuit design Reduces component count Reduced pick and place costs Low package height of 0.37 mm AEC-Q101 qualified Suitable for Automatic Optical Inspection (AOI) of solder joint 1.3 Applications Digital applications Cost saving alternative for BC847/BC857 series in digital applications Controlling IC inputs Switching loads 1.4 Quick reference data Table 2. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VCEO collector-emitter voltage open base - - 50 V IO output current - - 100 mA PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 2. Pinning information Table 3. Pinning Pin Symbol Description 1 I input (base) 2 GND GND (emitter) Simplified outline Graphic symbol O 1 3 O output (collector) 4 O output (collector) R1 I 4 3 R2 GND 2 aaa-019964 Transparent top view 3. Ordering information Table 4. Ordering information Type number PDTC143EQA PDTC114EQA PDTC124EQA Package Name Description Version DFN1010D-3 plastic thermal enhanced ultra thin small outline package; no leads; 3 terminals; body: 1.1 1.0 0.37 mm SOT1215 PDTC144EQA PDTC143_114_124_144EQA_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 2 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 4. Marking Table 5. Marking codes Type number Marking code PDTC143EQA 10 10 01 PDTC114EQA 11 01 10 PDTC124EQA 10 11 01 PDTC144EQA 10 01 10 4.1 Binary marking code description READING DIRECTION MARKING CODE (EXAMPLE) YEAR DATE CODE VENDOR CODE PIN 1 INDICATION MARK MARK-FREE AREA READING EXAMPLE: 11 01 10 aaa-008041 Fig 1. PDTC143_114_124_144EQA_SER Product data sheet SOT1215 binary marking code description All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 3 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 5. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - 50 V VCEO collector-emitter voltage open base VEBO emitter-base voltage VI input voltage - 50 V - 10 V PDTC143EQA 10 +30 V PDTC114EQA 10 +40 V PDTC124EQA 10 +40 V PDTC144EQA 10 +40 V output current IO Tamb 25 C total power dissipation Ptot - 100 mA [1] - 280 mW [2] - 440 mW Tj junction temperature - 150 C Tamb ambient temperature 55 +150 C Tstg storage temperature 65 +150 C [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint. aaa-017637 500 Ptot (mW) (1) 400 300 (2) 200 100 0 -75 -25 25 75 125 175 Tamb (°C) (1) FR4 PCB, 4-layer copper, standard footprint (2) FR4 PCB, standard footprint Fig 2. PDTC143_114_124_144EQA_SER Product data sheet Power derating curves All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 4 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 6. Thermal characteristics Table 7. Thermal characteristics Symbol Parameter Conditions thermal resistance from junction to ambient Rth(j-a) in free air Min Typ Max Unit [1] - - 446 K/W [2] - - 284 K/W [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint. aaa-017638 103 Zth(j-a) (K/W) duty cycle = 1 0.75 0.50 102 0.33 0.20 0.10 0.05 10 0.02 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, single-sided copper, tin-plated and standard footprint Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values aaa-017639 103 Zth(j-a) (K/W) duty cycle = 1 0.75 102 0.50 0.33 0.20 0.10 0.05 10 0.02 0 0.01 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, 4-layer copper, tin-plated and standard footprint. Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PDTC143_114_124_144EQA_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 5 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 7. Characteristics Table 8. Characteristics Tamb = 25 C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit ICBO collector-base cut-off current VCB = 50 V; IE = 0 A - - 100 nA ICEO collector-emitter cut-off VCE = 30 V; IB = 0 A current VCE = 30 V; IB = 0 A; Tj = 150 C - - 1 A - - 5 A IEBO emitter-base cut-off current - - 900 A PDTC114EQA - - 400 A PDTC124EQA - - 180 A PDTC144EQA - - 90 A PDTC143EQA VEB = 5 V; IC = 0 A DC current gain hFE PDTC143EQA VCE = 5 V; IC = 10 mA 30 - - PDTC114EQA VCE = 5 V; IC = 5 mA 30 - - 60 - - PDTC124EQA PDTC144EQA VCEsat collector-emitter saturation voltage VI(off) off-state input voltage R1 - - 150 mV VCE = 5 V; IC = 100 A - 1.1 0.5 V - 1.1 0.8 V PDTC124EQA - 1.1 0.8 V PDTC144EQA - 1.2 0.8 V on-state input voltage PDTC143EQA VCE = 0.3 V; IC = 20 mA 2.5 1.9 - V PDTC114EQA VCE = 0.3 V; IC = 10 mA 2.5 1.8 - V PDTC124EQA VCE = 0.3 V; IC = 5 mA 2.5 1.7 - V PDTC144EQA VCE = 0.3 V; IC = 2 mA 3 1.6 - V PDTC143EQA 3.3 4.7 6.1 k PDTC114EQA 7 10 13 k PDTC124EQA 15.4 22 28.6 k PDTC144EQA 33 47 61 k 0.8 1 1.2 - - 2.5 pF - 230 - MHz [1] bias resistor 1 (input) R2/R1 bias resistor ratio Cc collector capacitance fT - - PDTC114EQA PDTC143EQA VI(on) 80 IC = 10 mA; IB = 0.5 mA transition frequency [1] VCB = 10 V; IE = ie = 0 A; f = 1 MHz VCE = 5 V; IC = 10 mA; f = 100 MHz [1] See Section 8 “Test information” for resistor calculation and test conditions. [2] Characteristics of built-in transistor. PDTC143_114_124_144EQA_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 [2] © NXP Semiconductors N.V. 2015. All rights reserved. 6 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 006aac831 103 aaa-018583 0.1 0.80 mA IC (A) hFE (1) 0.72 mA 0.64 mA 0.08 (2) 0.56 mA (3) 102 0.48 mA 0.06 0.40 mA 0.32 mA 0.04 10 0.24 mA 0.02 IB = 0.16 mA 1 10-1 1 0 102 10 0 1 2 3 4 IC (mA) 5 VCE (V) Tamb = 25 C VCE = 5 V (1) Tamb = 100 C (2) Tamb = 25 C (3) Tamb = 40 C Fig 5. PDTC143EQA: DC current gain as a function of collector current; typical values Fig 6. 006aac832 1 PDTC143EQA: Collector current as a function of collector-emitter voltage; typical values 006aac833 10 VI(on) (V) VCEsat (V) (1) (1) (2) (2) (3) 10-1 (3) 1 10-2 1 102 10 10-1 10-1 IC (mA) IC/IB = 20 VCE = 0.3 V (1) Tamb = 40 C (2) Tamb = 25 C (2) Tamb = 25 C (3) Tamb = 40 C (3) Tamb = 100 C PDTC143EQA: Collector-emitter saturation voltage as a function of collector current; typical values PDTC143_114_124_144EQA_SER Product data sheet 102 10 IC (mA) (1) Tamb = 100 C Fig 7. 1 Fig 8. PDTC143EQA: On-state input voltage as a function of collector current; typical values All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 7 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 006aac834 10 006aac835 3 Cc (pF) VI(off) (V) 2 (1) (2) 1 (3) 1 10-1 10-1 0 1 10 0 10 20 IC (mA) 30 40 50 VCB (V) f = 1 MHz; Tamb = 25 C VCE = 5 V (1) Tamb = 40 C (2) Tamb = 25 C (3) Tamb = 100 C Fig 9. PDTC143EQA: Off-state input voltage as a function of collector current; typical values PDTC143_114_124_144EQA_SER Product data sheet Fig 10. PDTC143EQA: Collector capacitance as a function of collector-base voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 8 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 006aac768 103 aaa-018663 0.1 0.60 mA 0.54 mA 0.48 mA IC (A) hFE (1) (2) (3) 102 0.08 0.42 mA 0.36 mA 0.06 0.30 mA 0.24 mA 0.04 0.18 mA 10 0.12 mA 0.02 IB = 0.06 mA 1 10-1 1 102 10 0 0 1 2 3 4 IC (mA) 5 VCE (V) Tamb = 25 C VCE = 5 V (1) Tamb = 100 C (2) Tamb = 25 C (3) Tamb = 40 C Fig 11. PDTC114EQA: DC current gain as a function of collector current; typical values 006aac769 1 Fig 12. PDTC114EQA: Collector current as a function of collector-emitter voltage; typical values 006aac770 10 VI(on) (V) VCEsat (V) (1) (2) 10-1 1 (3) (1) (2) (3) 10-2 1 102 10 10-1 10-1 IC (mA) IC/IB = 20 VCE = 0.3 V (1) Tamb = 40 C (2) Tamb = 25 C (2) Tamb = 25 C (3) Tamb = 40 C (3) Tamb = 100 C Fig 13. PDTC114EQA: Collector-emitter saturation voltage as a function of collector current; typical values Product data sheet 102 10 IC (mA) (1) Tamb = 100 C PDTC143_114_124_144EQA_SER 1 Fig 14. PDTC114EQA: On-state input voltage as a function of collector current; typical values All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 9 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 006aac771 10 006aac772 3 Cc (pF) VI(off) (V) 2 (1) (2) 1 (3) 1 10-1 10-1 0 1 10 0 10 20 IC (mA) 30 40 50 VCB (V) f = 1 MHz; Tamb = 25 C VCE = 5 V (1) Tamb = 40 C (2) Tamb = 25 C (3) Tamb = 100 C Fig 15. PDTC114EQA: Off-state input voltage as a function of collector current; typical values PDTC143_114_124_144EQA_SER Product data sheet Fig 16. PDTC114EQA: Collector capacitance as a function of collector-base voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 10 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 006aac794 103 aaa-018665 0.1 0.60 mA IC (A) hFE (1) 0.54 mA 0.48 mA 0.42 mA 0.08 (2) 0.36 mA (3) 102 0.30 mA 0.06 0.24 mA 0.18 mA 0.04 10 0.12 mA 0.02 IB = 0.06 mA 1 10-1 1 102 10 0 0 1 2 3 4 IC (mA) 5 VCE (V) Tamb = 25 C VCE = 5 V (1) Tamb = 100 C (2) Tamb = 25 C (3) Tamb = 40 C Fig 17. PDTC124EQA: DC current gain as a function of collector current; typical values aaa-018664 1 Fig 18. PDTC124EQA: Collector current as a function of collector-emitter voltage; typical values 006aac796 10 VI(on) (V) VCEsat (V) (1) (2) (3) 10-1 1 (1) (2) (3) 10-2 10-1 1 102 10 10-1 10-1 IC (mA) IC/IB = 20 VCE = 0.3 V (1) Tamb = 40 C (2) Tamb = 25 C (2) Tamb = 25 C (3) Tamb = 40 C (3) Tamb = 100 C Fig 19. PDTC124EQA: Collector-emitter saturation voltage as a function of collector current; typical values Product data sheet 102 10 IC (mA) (1) Tamb = 100 C PDTC143_114_124_144EQA_SER 1 Fig 20. PDTC124EQA: On-state input voltage as a function of collector current; typical values All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 11 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 006aac797 10 006aac798 3 Cc (pF) VI(off) (V) 2 (1) (2) (3) 1 1 10-1 10-1 0 1 10 0 10 20 IC (mA) 30 40 50 VCB (V) f = 1 MHz; Tamb = 25 C VCE = 5 V (1) Tamb = 40 C (2) Tamb = 25 C (3) Tamb = 100 C Fig 21. PDTC124EQA: Off-state input voltage as a function of collector current; typical values PDTC143_114_124_144EQA_SER Product data sheet Fig 22. PDTC124EQA: Collector capacitance as a function of collector-base voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 12 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 006aac752 103 hFE aaa-018667 0.1 0.08 0.60 mA 0.54 mA 0.48 mA 0.42 mA 0.06 0.30 mA IC (A) (1) (2) (3) 102 0.36 mA 0.24 mA 0.04 0.18 mA 10 0.12 mA 0.02 IB = 0.06 mA 1 10-1 1 102 10 0 0 1 2 3 4 IC (mA) 5 VCE (V) Tamb = 25 C VCE = 5 V (1) Tamb = 100 C (2) Tamb = 25 C (3) Tamb = 40 C Fig 23. PDTC144EQA: DC current gain as a function of collector current; typical values aaa-018666 1 Fig 24. PDTC144EQA: Collector current as a function of collector-emitter voltage; typical values 006aac754 10 VI(on) (V) VCEsat (V) (1) (2) 10-1 (3) 1 (1) (2) (3) 10-2 10-1 1 102 10 10-1 10-1 IC (mA) IC/IB = 20 VCE = 0.3 V (1) Tamb = 40 C (2) Tamb = 25 C (2) Tamb = 25 C (3) Tamb = 40 C (3) Tamb = 100 C Fig 25. PDTC144EQA: Collector-emitter saturation voltage as a function of collector current; typical values Product data sheet 102 10 IC (mA) (1) Tamb = 100 C PDTC143_114_124_144EQA_SER 1 Fig 26. PDTC144EQA: On-state input voltage as a function of collector current; typical values All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 13 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 006aac755 10 006aac756 2.0 Cc (pF) 1.6 VI(off) (V) (1) 1.2 (2) (3) 1 0.8 0.4 10-1 10-1 0.0 1 10 0 10 20 IC (mA) 30 40 50 VCB (V) f = 1 MHz; Tamb = 25 C VCE = 5 V (1) Tamb = 40 C (2) Tamb = 25 C (3) Tamb = 100 C Fig 27. PDTC144EQA: Off-state input voltage as a function of collector current; typical values Fig 28. PDTC144EQA: Collector capacitance as a function of collector-base voltage; typical values 006aac757 103 fT (MHz) 102 10 10-1 1 102 10 IC (mA) VCE = 5 V; Tamb = 25 C Fig 29. Transition frequency as a function of collector current; typical values of built-in transistor PDTC143_114_124_144EQA_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 14 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 8. Test information 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. 8.2 Resistor calculation • Calculation of bias resistor 1 (R1): V I I2 – V I I1 R1 = -----------------------------------I I2 – I I1 • Calculation of bias resistor ratio (R2/R1): V I I4 – V I I3 R2 -–1 ------- = ----------------------------------R1 R1 I I4 – I 13 n.c. II1; II2 R1 II3; II4 R2 GND aaa-020082 Fig 30. Resistor test circuit 8.3 Resistor test conditions Table 9. PDTC143_114_124_144EQA_SER Product data sheet Resistor test conditions Type number R1 (k) R2 (k) Test conditions II1 II2 II3 II4 PDTC143EQA 4.7 4.7 600 A 700 A -600 A -700 A PDTC114EQA 10 10 350 A 450 A -350 A -450 A PDTC124EQA 22 22 150 A 230 A -150 A -230 A PDTC144EQA 47 47 55 A 105 A -55 A -105 A All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 15 of 21 NXP Semiconductors PDTC143/114/124/144EQA series 50 V, 100 mA NPN resistor-equipped transistor 9. Package outline 0.87 0.95 0.75 1 0.95 1.05 2 0.34 0.40 Dimensions in mm 0.17 0.25 0.16 0.24 0.1 3 0.04 max 0.22 0.30 0.245 0.325 0.195 0.275 1.05 1.15 13-03-05 Fig 31. Package outline DFN1010D-3 (SOT1215) PDTC143_114_124_144EQA_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 16 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 10. Soldering Footprint information for reflow soldering of DFN1010D-3 package SOT1215 1.2 0.45 (2x) 0.3 1.1 0.35 (2x) 0.4 0.25 (2x) 0.75 0.3 0.5 1.5 1.4 0.4 0.5 0.4 0.3 0.5 1.3 0.4 0.3 0.4 0.5 1.3 solder land solder land plus solder paste occupied area solder resist Dimensions in mm Issue date 12-11-23 13-03-06 sot1215_fr Fig 32. Reflow soldering footprint DFN1010D-3 (SOT1215) PDTC143_114_124_144EQA_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 17 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 11. Revision history Table 10. Revision history Document ID Release date PDTC143_114_124_144EQA 20151030 _SER v.1 PDTC143_114_124_144EQA_SER Product data sheet Data sheet status Change notice Supersedes Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 - © NXP Semiconductors N.V. 2015. All rights reserved. 18 of 21 PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 12.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. PDTC143_114_124_144EQA_SER Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 19 of 21 NXP Semiconductors PDTC143/114/124/144EQA series 50 V, 100 mA NPN resistor-equipped transistor No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 12.4 Trademarks Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PDTC143_114_124_144EQA_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 October 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 20 of 21 NXP Semiconductors PDTC143/114/124/144EQA series 50 V, 100 mA NPN resistor-equipped transistor 14. Contents 1 1.1 1.2 1.3 1.4 2 3 4 4.1 5 6 7 8 8.1 8.2 8.3 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Binary marking code description. . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Thermal characteristics . . . . . . . . . . . . . . . . . . 5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test information . . . . . . . . . . . . . . . . . . . . . . . . 15 Quality information . . . . . . . . . . . . . . . . . . . . . 15 Resistor calculation . . . . . . . . . . . . . . . . . . . . 15 Resistor test conditions . . . . . . . . . . . . . . . . . 15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Contact information. . . . . . . . . . . . . . . . . . . . . 20 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP Semiconductors N.V. 2015. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 30 October 2015 Document identifier: PDTC143_114_124_144EQA_SER