INTERSIL ISL9201IRZ

ISL9201
®
Data Sheet
February 22, 2007
FN6429.1
Li-ion Battery Charger
Features
The ISL9201 is an integrated single-cell Li-ion or Li-polymer
charger capable of operating at an input voltage as low as
2.5V. The low operating voltage allows the charger to work
with a variety of AC adapters.
• Complete Charger for Single-Cell Li-ion/Polymer Batteries
The ISL9201 operates as a linear charger when the AC
adapter is a voltage source. The battery is charged in a
standard Li-ion charge profile, i.e. a constant current phase
followed be a constant voltage phase (CC/CV). The charge
current during the constant current phase is determined by the
external resistor connected to the IREF pin. When the adapter
output is a current-limited voltage source and the current limit
is smaller than the programmed constant current of the IC, the
ISL9201 operates as a pulse charger where the charge
current is determined by the current limit of the AC adapter
during the constant current phase. The ISL9201 operates in a
linear mode during the constant voltage phase in both adapter
cases.
• Low Component Count and Cost
TM, which protects
Preliminary
The ISL9201 incorporates Thermaguard
the IC against over-temperature. If the die temperature rises
above a typical value of +110 °C, the thermal foldback function
reduces the charge current to prevent further temperature
rise. The ISL9201 also includes a timer to set the time
reference for the delay time of the end-of-charge (EOC) and
recharge indications. The timer is programmable with an
external capacitor. A logic input and an open-drain logic output
are available for controlling the charger and indicating the
charger status. The EN pin enables the charger. The STATUS
pin is an open-drain output which turns on when the charger is
delivering current. The charger uses a 10 Ld 3x3 DFN
package to maximize thermal conductivity.
ISL9201IRZ
PART
TEMP.
MARKING RANGE (°C)
DLGA
ISL9201IRZ-T DLGA
-40 to +85
• No External Blocking Diode Required
• 25mV Voltage Accuracy Over-Temperature and Input
Voltage Range
• 20mV Voltage Accuracy at Room Temperature
• Programmable Charge Current
• Charge Current Thermal Foldback for Thermal Protection
(ThermaguardTM)
• Trickle Charge for Fully Discharged Batteries
• Power Presence and Charge/EOC Indications
• Less than 4µA Leakage Current off the Battery when No
Input Power Attached or Charger Disabled
• Ambient Temperature Range: -40°C to +85°C
• DFN Package
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Mobile Phones
• Blue-Tooth Devices
• PDAs
• MP3 Players
• Stand-Alone Cradle or Travel Chargers
• Other Handheld Devices
Ordering Information
PART
NUMBER
• Integrated Pass Element and Current Sensor
PACKAGE
(Pb-free)
PKG
DWG. #
Pinout
ISL9201
(10 LD DFN)
TOP VIEW
10 Ld 3x3 DFN L10.3x3
-40 to +85 10 Ld 3x3 DFN L10.3x3
Tape & Reel
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1
VIN
1
10
VBAT
GND
2
9
VSEN
STATUS
3
8
IREF
TIME
4
7
V2P8
GND
5
6
EN
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL9201
Typical Applications
5V WALL
ADAPTER
VIN
1µF
C1
R1
1Ω
VBAT
1µF
C2
1kΩ
R1
BATTERY
PACK
ISL9201IRZ
D1
VSEN
STATUS
EN
V2P8
TIME
4.7µF
C3
CTIME
15nF
Pin Description
IREF
RIREF
100kΩ
GND
V2P8 (Pin 7)
GND (Pin 2)
This is a 2.8V reference voltage output. This pin provides a
2.8V voltage source when the input voltage is above the
POR threshold and outputs 0V otherwise. The V2P8 pin can
be used as an indication for adapter presence.
GND is the connection to system ground.
IREF (Pin 8)
STATUS (Pin 3)
This is the charge current programming and monitoring pin.
Connect a resistor between this pin and GND to set the
charge current during the constant current phase, as given
by Equation 1:
VIN (Pin 1)
VIN is the input power source. Connect to a wall adapter.
STATUS is an open-drain output indicating charging and
inhibit states. The STATUS pin is pulled LOW when the
charger is charging a battery. It will be turned into high
impedance when the charge current drops to IMIN. This high
impedance state will be latched until a recharge cycle or a
new charge cycle starts. When the charger is disabled, the
STATUS pin outputs high impedance.
80
I REF = ----------------R IREF
(A)
(EQ. 1)
Where RIREF is in kΩ.
TIME (Pin 4)
VSEN (Pin 9)
The TIME pin determines the oscillation period by
connecting a timing capacitor between this pin and GND.
The oscillator also provides a time reference for the charger.
VSEN is the remote voltage sense pin. Connect this pin as
close to the battery positive terminal as possible. If the
VSEN pin is left floating, its voltage drops to 0V and the
charger operates in trickle mode.
GND (Pin 5)
GND is the connection to system ground.
EN (Pin 6)
EN is the enable logic input. Connect the EN pin to HIGH to
disable the charger. Connect the EN pin to LOW or leave it
floating to enable the charger. There is an internal 400kΩ
pull-down resistor at this pin.
2
VBAT (Pin 10)
VBAT is the connection to the battery. Typically a 10µF
Tantalum capacitor is needed for stability when there is no
battery attached. When a battery is attached, only a 0.1µF
ceramic capacitor is required.
FN6429.1
February 22, 2007
ISL9201
Absolute Maximum Ratings
Thermal Information
Voltage Ratings for All Pins . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Charge Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0A
ESD Rating
Human Body Model (Per EIA JESD22 Method A114-B) . . . . .2kV
Machine Model (Per EIA JED-4701 Method C-111) . . . . . . . 200V
Thermal Resistance
θJA (°C/W)
θJC (°C/W)
3x3 DFN Package (Note 1) . . . . . . . . .
48
6
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . .-65°C to +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Supply Voltage (VIN Pin). . . . . . . . . . . . . . . 4.25V to 6.5V
Programmed Charge Current . . . . . . . . . . . . . . . . . 50mA to 900mA
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
+150°C max junction temperature is for information purposes only. In reality, the current foldback feature will prevent the junction from rising above the
typical temperature of +110°C.
1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. See
Tech Brief TB379.
2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Typical Values Are Tested at VIN = 5V and TA = +25°C. All Maximum and Minimum Values Are Guaranteed
Under the Recommended Operating Supply Voltage Range and Ambient Temperature Range, Unless
Otherwise Noted.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
3.2
3.6
3.9
V
2.25
2.5
2.7
V
45
80
100
mV
-
-
3.3
µA
POWER-ON RESET
Rising POR Threshold
VPOR
Falling POR Threshold
VPOR
VBAT = 3.0V, use V2P8 pin to indicate the
comparator output.
VIN-BAT OFFSET VOLTAGE
Rising Edge
VOS
VBAT = 4.2V, IBAT = 20mA, use STATUS pin to
indicate the comparator output (Note 3)
STANDBY CURRENT
ISTANDBY Charger disabled or the input is floating
BAT Pin Sink Current
VIN Pin Supply Current
IVIN
Charger disabled
-
150
250
µA
VIN Pin Supply Current
IVIN
Charger enabled
-
1.0
-
mA
Output Voltage
VCH
Tested at 50mA load, 5V input and +25°C
4.180
4.20
4.220
V
Output Voltage
VCH
-40°C < TA < +85°C, 4.3V < VIN < 6.5V
4.175
4.20
4.225
V
-
500
-
mΩ
VIN = 5V, RIREF = 887kΩ, VBAT = 3.0V to 4.0V
60
90
120
mA
VIN = 5V, RIREF = 100kΩ, VBAT = 3.0V to 4.0V
725
800
840
mA
VIN = 5V, RIREF = 800kΩ, VBAT = 0V to 2.5V
6
10
14
mA
VIN = 5V, RIREF = 100kΩ, VBAT = 0V to 2.5V
64
80
96
mA
RIREF = 100kΩ
60
80
105
mA
Load current less than 1mA
2.8
2.9
3.0
V
VMIN
2.7
2.8
2.9
V
VMINHYS
50
100
150
mV
VOLTAGE REGULATION
PMOS On Resistance
rDS(ON)
VBAT = 4.0V, charge current = 0.35A
CHARGE CURRENT (Note 4)
Constant Charge Current
ICC
Trickle Charge Current
ITRK
End-of-Charge Current
IMIN
V2P8 PIN OUTPUT
V2P8 Pin Output Voltage
VV2P8
CHARGE THRESHOLDS
Preconditioning Charge Threshold Voltage
Preconditioning Voltage Hysteresis
3
FN6429.1
February 22, 2007
ISL9201
Electrical Specifications
Typical Values Are Tested at VIN = 5V and TA = +25°C. All Maximum and Minimum Values Are Guaranteed
Under the Recommended Operating Supply Voltage Range and Ambient Temperature Range, Unless
Otherwise Noted. (Continued)
PARAMETER
Recharge Threshold
Recharge Threshold Hysteresis
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
VRCH
Referenced to the charger output voltage VCH
-225
-150
-70
mV
-
50
-
mV
VRCHHYS
INTERNAL TEMPERATURE MONITORING
Charge Current Foldback Threshold
TFOLD
°C
110
OSCILLATOR
Oscillation Period
tOSC
CTIME = 15nF
2.7
3.0
3.3
ms
EN Pin Logic Input High
1.3
-
-
V
EN Pin Logic Input Low
-
-
0.5
V
200
400
600
kΩ
LOGIC INPUT AND OUTPUTS
EN Pin Internal Pull Down Resistance
STATUS Output Voltage When On
10mA current
-
-
0.8
V
STATUS Leakage Current
VSTATUS = 6.5V
-
-
1
µA
NOTE:
3. The 4.2V VBAT is selected so that the STATUS output can be used as the indication for the offset comparator output indication. If the VBAT is
lower than the POR threshold, no output pin can be used for indication.
4. The charge current can be affected by the thermal foldback function if the IC under the test setup cannot dissipate the heat.
4
FN6429.1
February 22, 2007
ISL9201
Functional Block Diagram
QMAIN
VIN
C1
VBAT
ISEN
INPUT_OK
RIREF
+
+
CA
-
IR
VSEN
VIN
-
VPOR
+
+
-
IREF
V2P8
VRECHRG
IT
VPOR
100000:1
CURRENT
MIRROR
VMIN
QSEN
VCH
REFERENCES
TEMPERATURE
MONITORING
80MV
CHRG
CURRENT
REFERENCES
+
VA
-
IMIN = IR/10
VCH
+
TRICKLE/FAST
-
MINBAT
VMIN
ISEN
+
(16 LD OPTION)
-
VRECHRG
+
MIN_I
-
INPUT_OK
RECHARGE
LOGIC
ESD DIODE
EN
STATUS
STATUS
TIME
OSC
CTIME
COUNTER
GND
GND
5
FN6429.1
February 22, 2007
ISL9201
Theory of Operation
TRICKLE
The ISL9201 is an integrated charger for single-cell Li-ion or
Li-polymer batteries. The ISL9201 is capable of operating in
two operation modes; linear charge mode and pulse charge
mode. The ISL9201 functions as a traditional linear charger
when powered with a voltage source adapter. When
powered with a current-limited adapter, the charger functions
as a pulse charger by fully turning on the pass element and
the power dissipation is hence drastically reduced.
CC
4.2V
IREF
CV
CHARGE
VOLTAGE
VREC
CHARGE
CURRENT
2.8V
10% IREF
IMIN
Constant Current Phase
The ISL9201 starts the charge at a constant current (CC)
phase. The charge current is regulated to fast charge the
battery before the final voltage has been reached. The
charge current is programmable with the IREF pin and has
two operation modes: trickle mode and constant current
mode, depending on the battery voltage. When the battery
voltage is lower than 2.8V, the charger operates in trickle
mode where the charge current is set at 10% of the constant
current mode current. The trickle mode is for preconditioning
a deeply discharged battery. Once the battery voltage is
above the typical 2.8V threshold, the constant current (CC)
mode starts. The constant current is programmable between
50mA to 1A.
CHG
STATUS
INDICATION
TIME
FIGURE 1. TYPICAL CHARGE CYCLE WITH TIMEOUT
POR
The power-on reset (POR) function monitors the supply
voltage. The POR has a rising edge threshold of 3.6V typical
and 2.5V typical for falling edge. The charger is expected to
operate when the input voltage is above the POR threshold.
After POR the charger will continue to operate for supply
voltage down to 2.5V typical. It is also required that the
supply voltage be higher than the VBAT pin voltage by a
typical 80mV for the charger to function.
Constant Voltage Phase
Oscillator
When the battery reaches the final voltage, the ISL9201
switches the operation to a constant voltage (CV) phase.
The output voltage is regulated at the final voltage value.
During the constant voltage phase, the charge current
reduces gradually as the cell voltage rises.
The ISL9201 incorporates with an oscillation circuit using an
external timing capacitor connected to the TIME pin. The
oscillator sets the delay time for the STATUS indication for
EOC and recharge conditions to prevent nuisance trip due to
in-rush currents.
Charge Termination and Recharge
Indications
As the charge current reaches the EOC (end of charge)
current threshold during the constant voltage phase, the
STATUS pin open-drain FET is turned off to indicate an EOC
condition. The EOC current is fixed at 10% of the
programmed constant charge current. When the EOC
condition is reached, the STATUS pin is latched at logic
HIGH, the charger, however, will continue to charge the
battery until the EN pin is pulled to logic HIGH or the input
power has been removed. When the battery voltage falls to
150mV below the constant voltage value, the STATUS latch
will be reset and open-drain FET is turned on to indicate a
charging condition again. An internal delay is implemented
at the STATUS pin for both EOC and recharge conditions to
prevent nuisance trips due to noise and fast load current
transitions. The delay time is approximately one clock cycle
(varies between 0.5 and 1.5 clock) of the internal oscillator,
which is programmed by the timer capacitor. The typical
charge waveforms in Figure 1 show the complete cycle
operation.
The ISL9201 has an open-drain status indication pin. The
STATUS pin requires an external pull-up resistor to function
properly. The V2P8 pin can be used as the presence of AC
adapter.
Thermal Foldback
Charger Disable
The EN pin allows the user to disable the charger. When the
charger is disabled, all internal circuits are shut down and
the quiescent current at the input pin is less than 150µA
typical.
Remote Battery Voltage Sensing
A kelvin sense pin is provided for battery terminal voltage
monitoring. Thus, the IR drop due to the connection leads
and PCB traces can be eliminated, resulting in a more
accurate battery voltage monitoring, especially when the
battery is located at a significant distance away from the
ISL9201. If remote sensing is not needed, the VSEN pin can
be connected to VBAT at the IC.
In the event where the die temperature reaches the thermal
foldback threshold (+110°C typical), the charge current is
reduced accordingly to prevent further temperature rise.
6
FN6429.1
February 22, 2007
ISL9201
Applications Information
PWR OFF
CHARGER: OFF
PCB Layout Guidance
The ISL9201 uses a thermally-enhanced DFN package that
has an exposed thermal pad at the bottom side of the
package. The layout should connect as much as possible to
copper on the exposed pad. Typically, the component layer
is more effective in dissipating heat. The thermal impedance
can be further reduced by using other layers of copper
connecting to the exposed pad through a thermal via array. A
minimum of four (4) such thermal vias are recommended.
Each thermal via is recommended to have 0.3mm diameter
and 0.7mm distance from other thermal vias.
Stability Consideration
The ISL9201 should behave like a current and thermal
limited linear regulator. The charger operation is stable with
an output ceramic decoupling capacitor in the range of 1µF
to 200µF, with or without a battery connected.
Input Bypass Capacitor
Due to the inductance of the power leads of the wall adapter
or USB source, the input capacitor type must be properly
selected to prevent high voltage transient during a hot-plug
event. A tantalum capacitor is a good choice for its high
ESR, providing damping to the voltage transient. Multi-layer
ceramic capacitors, however, have a very low ESR and
hence when chosen as input capacitor, a 1-Ω series resistor
must be used, as shown in the “Typical Applications” on
page 2, to provide adequate damping.
State Machine Diagram
The state machine diagram is shown in Figure 2. The
diagram starts with the Power-Off state. When the input
voltage rises above the POR threshold, the charger resets
itself. Then, if the charger is disabled, the charger stays in
the Charger Disabled state. If the charger is enabled, the
trickle charge starts. Anytime when VBAT is above the
preconditioning charge threshold voltage, the charger enters
the fast charge state. When VBAT reaches 4.2V, the charger
enters a constant voltage state where VBAT is regulated at
4.2V. When the charge current decays to the IMIN threshold,
the STATUS indicates an EOC condition. This condition is
latched until either the EN pin is toggled or a POR condition
has occurred at VIN.
7
STATUS: OFF
FAULT: OFF
VIN > VPOR
NOT
ENABLED
POR
CHARGER: OFF
CHARGER
DISABLED
ANYTIME
EN PIN
CHANGES TO
DISABLE
STATUS: OFF
FAULT: OFF
CHARGER: OFF
STATUS: OFF
FAULT: OFF
ENABLED
TRICKLE
CHARGE
CHARGER: ON
STATUS: ON
FAULT: OFF
VBAT DROPS
BELOW VMIN
VBAT > VMIN
FAST CHARGE
CHARGER: ON
STATUS: ON
FAULT: OFF
VBAT > VRCH
AND ICHG < IMIN
CHARGE
COMPLETE
CHARGER: ON
STATUS: OFF
FAULT: OFF
VBAT < VRCH
FIGURE 2. STATE MACHINE DIAGRAM
FN6429.1
February 22, 2007
ISL9201
Dual Flat No-Lead Plastic Package (DFN)
L10.3x3
2X
0.15 C A
10 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE
D
A
MILLIMETERS
2X
0.15 C B
SYMBOL
MIN
NOMINAL
6
INDEX
AREA
A
0.80
0.90
1.00
-
-
-
0.05
-
0.28
5,8
2.05
7,8
1.65
7,8
0.20 REF
b
0.18
0.23
D
B
1.95
0.10
0.08
C
C
SIDE VIEW
C
SEATING
PLANE
A3
3.00 BSC
6
INDEX
AREA
(DATUM A)
e
-
0.50 BSC
-
k
0.25
-
-
L
0.30
0.35
0.40
N
10
Nd
5
8
2
3
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
NX k
E2/2
N-1
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
NX b
5
(Nd-1)Xe
REF.
4. All dimensions are in millimeters. Angles are in degrees.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
NX L
e
3. Nd refers to the number of terminals on D.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
E2
8
1.60
NOTES:
D2/2
2
N
1.55
Rev. 3 6/04
D2
1
-
8
7
(DATUM B)
2.00
E
E2
A
-
3.00 BSC
D2
TOP VIEW
NOTES
A1
A3
E
MAX
0.10 M C A B
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
BOTTOM VIEW
CL
0.415
NX (b)
(A1)
0.200
5
L
NX L
e
SECTION "C-C"
NX b
C
C C
TERMINAL TIP
FOR ODD TERMINAL/SIDE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
8
FN6429.1
February 22, 2007