MN3300 Series MN3308 2048-Stage Ultra Low Voltage Operation BBD for Audio Signals ■ Overview ■ Pin Assignment The MN3308 is a 2048-stage ultra low voltage operation BBD variable delay line in audio frequency range. The device operates on +3 V supply and provides a signal delay up to 102.4 ms and is suitable for use as reverberation effect of low voltage operation audio equipment such as portable stereo, radio cassette recorder and microphone. GND 1 CP2 2 8 VD2 7 OUT ■ Features • Variable signal delay of the audio signal : 3.42 to 102.4 ms • Wide range of supply voltage : 1.8 to 7.0 V • No insertion loss : Li=0 dB typ. • Wide dynamic range : S/N=66 dB typ. • Clock frequency range : 10 to 100 kHz (1.8 V≤VDD<4.0 V) 10 to 300 kHz (4.0 V≤VDD≤7.0 V) • N-channel 2-layer silicon gate process • 8-Pin Dual-In-Line Plastic Package MN3308 IN 3 6 CP1 VDD 4 5 VD1 DIP008-P-0300 VDD CP2 1 2048-Stage BBD 8 7 5 VD2 OUT VD1 GND IN 3 2 CP1 ■ Block Diagram 4 • Reverberation and echo effects of audio equipment such as radio cassette recorder, car radio, portable radio, portable stereo, echo microphone and Karaoke machine, etc. • Sound effect of electronic musical instruments • Variable or fixed delay of analog signals 6 ■ Applications ■ Pin Descriptions Pin No. Symbol Pin Name Description 1 GND Ground pin Connected to ground. 2 CP2 Clock input 2 Basic clock pulse is applied to transfer electric charge of BBD. 3 IN Signal input pin Analog signal to be delayed is input. Most suitable DC bias should be applied to this pin. 4 VDD VDD apply pin Bias is applied to the gate of MOS transistor which is inserted in series with clock pulse input gate of the BBD transfer gate. Furthermore, voltage is supplied to step-up circuit. 5 VD1 VD1 apply pin The same phase clock pulse as CP1 is applied through capacitor. 6 CP1 Clock input 1 Clock pulse of inverted phase to CP2 is applied. 7 OUT Output pin Composed signal of 1024th and 1025th stages is output. 8 VD2 VD2 apply pin The same phase clock pulse as CP2 is applied through capacitor. 1 MN3308 MN3300 Series ■ Absolute Maximum Ratings Ta=25°C Parameter Symbol Ratings Unit VDD, VD1, VD2, VCP, VI − 0.3 to +8.0 V Output voltage VO − 0.3 to +8.0 V Operating ambient temperature Topr −20 to +60 °C Storage temperature Tstg −55 to +125 °C Pin voltage ■ Operating Conditions Ta=25°C Parameter Symbol Conditions min typ max Unit +1.8 +3.0 +7.0 V Supply voltage VDD Clock voltage "H"level VCPH VDD V Clock voltage "L"level VCPL 0 V Clock input capacitance CCP 1400 pF fCP 100(300)*1 kHz Clock frequency 10 Clock pulse width tw(CP)*3 0.5T*2 Clock rise time tr(CP)*3 500 ns Clock fall time tf(CP) *3 500 ns Clock cross point V X* 3 0.3VCPH V 0 Note) *1 : ( ) : VDD=4.0 to 5.0 V *2 : T=1/fCP (Clock period) *3 : Clock pulse waveforms CP2 tr(CP) tf(CP) 3V 90% 50% 10% tw(CP) CP1 VX T ■ Electrical Characteristics VDD=VCPH=3V, VCPL=0V, RL=56kΩ, LPF : fC=20kHz, Att=48dB/oct., Ta=25°C Parameter Symbol Conditions min typ max Unit Supply current IDD fCP=40 kHz 0.05 mA Signal delay time 1 tD1 VDD=1.8 to 4.0 V, fCP=10 to 100 kHz N* ms Signal delay time 2 tD2 VDD=4.0 to 5.0 V, fCP=10 to 300kHz 2·fCP Input signal frequency fi fCP=40 kHz, Vi=0.22 Vrms Output attenuation≤3 dB(0 dB at fi=1 kHz) Input signal amplitude υi fCP=40 kHz, fi=1 kHz, THD=2.5 % 0.30 −4 10 kHz 0.41 Vrms Li fCP=40 kHz, fi=1 kHz, Vi=0.22 Vrms 0 4 dB THD fCP=40 kHz, fi=1 kHz, Vi=0.22 Vrms 1.0 2.5 % Output noise voltage Vno fCP=100 kHz, Weighted by "A"curve 0.19 0.35 mVrms Signal to noise ratio S/N Insertion loss Total harmonic distortion 66 dB Note) * : N=BBD stages ■ Circuit Diagram 8 VD2 IN 3 1 2 3 2048 2049 7 OUT GND 1 VDD 4 CP1 6 CP2 2 2 5 VD1 MN3300 Series MN3308 ■ Typical Characteristics 4 VDD=3V fCP=40kHz fi=1kHz Ta=25°C 10 0 −10 3 −20 2 −30 1 0 THD Vi 0 1 2 3 −40 −40 4 DC input voltage VI (V) −30 −20 −10 Input signal level Vno fCP −100 6 0 VDD=3V fCP=40kHz fi=1kHz Ta=25°C 5 4 Total harmonic distortion Output signal level Vo (dBm) 3 2 1 0 −20 10 −15 Gi fi Output noise voltage Vno (dBm) −90 −60 0 fCP=100kHz −2 0 −5 −10 −4 −50 5 VDD=3V fi=1kHz fCP=40kHz Ta=25°C 5 Gi (dB) Gi (dB) Insertion gain −70 0 10 VDD=3V Ta=25°C 2 −80 −5 Gi Vi 4 VDD=3V Ta=25°C −10 Input signal level Vi (dBm) Vi (dBm) Insertion gain VO (V) 5 DC output voltage Vo Vi 20 VDD=3V fCP=40kHz Ta=25°C THD (%) VO VI 6 10kHz 40kHz 60 −6 0.1 80 100 120 140 160 180 Clock frequency fCP (kHz) 0.3 2 1 0 −1 −2 −3 −4 1 3 10 30 100 300 Clock frequency fCP (kHz) 1000 6 Total harmonic distortion THD (%) Insertion gain Gi (dB) 3 −5 10 30 −15 −20 100 −15 −10 4 3 2 1 0 1.0 0 5 10 Gi Ta VDD=3V fi=1kHz fCP=40kHz Vi=0.22Vrms Ta=25°C 5 −5 Input signal level Vi (dBm) THD VBias VDD=3V fi=1kHz Ta=25°C 4 3 Input frequency fi (kHz) Gi fCP 5 1 3 VDD=3V fi=1kHz fCP=40kHz 2 Gi (dB) 40 1 Insertion gain −40 20 −1 0 −2 −3 −4 1.2 1.4 1.6 Input bias voltage 1.8 2.0 VBias (V) 2.2 −5 −40 −20 0 20 40 60 80 100 120 Ambient temperature Ta (°C) 3 MN3308 MN3300 Series ■ Typical Characteristics (To be continued) Vi(max) Ta fi Ta 4 VDD=3V fCP=40kHz fi=1kHz THD=2.5% −3 −7 −5 −6 THD (%) fi (kHz) −2 VDD=3V fCP=40kHz Vo(fi)=Vo(1kHz)−3dB 30 Total harmonic distortion −1 Input frequency Vi(max) (dBm) Input signal level THD Ta 40 0 20 10 −7 −8 −40 −20 0 20 40 60 0 −40 −20 80 100 120 0 20 40 60 VDD=3V fi=1kHz fCP=40kHz Vi=0.22Vrms 3 2 1 0 −40 −20 80 100 120 Ambient temperature Ta (°C) Ambient temperature Ta (°C) 0 20 40 60 80 100 120 Ambient temperature Ta (°C) ■ Supply Voltage Characteristics THD VDD VBias VDD THD (%) Ta=25°C 4 Total harmonic distortion 3 2 1 0 2 4 6 fCP=40kHz fi=1kHz Vi=Vi(max)−6dB Ta=25°C 2 1 2 Vi(max) VDD 8 0 −10 Gi (dB) 10 2 0 8 4 6 fCP=40kHz fi=1kHz Vi=Vi(max)−6dB Ta=25°C −1 −2 0 2 4 8 VDD (V) S/N VDD 1 −4 6 2 Supply voltage −3 4 0 110 3 Insertion gain Vi(max) (dBm) Input signal level 6 Gi VDD fCP=40kHz fi=1kHz THD=2.5% Ta=25°C Supply voltage VDD (V) 4 4 4 2 12 Supply voltage VDD (V) 20 0 14 8 0 Supply voltage VDD (V) −20 16 10 0 8 fCP=40kHz Vo(fi)=Vo(1kHz)−3dB Ta=25°C 18 3 Signal to noise ratio S/N (dB) Input bias voltage VBias (V) 5 0 fi VDD 20 4 Input frequency fi (kHz) 6 6 Supply voltage VDD (V) 8 Ta=25°C 100 90 80 70 60 50 0 2 4 Supply voltage 6 VDD (V) 8 MN3300 Series MN3308 ■ Package Dimensions (Unit : mm) • DIP008-P-0300 9.6±0.4 5 1 4 3.45±0.30 4.8max. 0.7min. 3.3±0.2 6.4±0.2 8 2.54 0.5±0.1 1.3±0.1 0 to 15˚ 7.62±0.20 +0.20 .05 0.25 –0 SEATING PLANE 5