HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Data Sheet August 6, 2015 FN3138.17 +5V Powered RS-232 Transmitters/Receivers Features The HIN232-HIN241 family of RS-232 transmitters/receivers interface circuits meet all ElA RS-232E and V.28 specifications, and are particularly suited for those applications where ±12V is not available. They require a single +5V power supply (except HIN239) and feature onboard charge pump voltage converters which generate +10V and -10V supplies from the 5V supply. The family of devices offer a wide variety of RS-232 transmitter/receiver combinations to accommodate various applications (see “Selection Table” on page 1). • Requires Only Single +5V Power Supply - (+5V and +12V - HIN239) The drivers feature true TTL/CMOS input compatibility, slew-rate-limited output, and 300 power-off source impedance. The receivers can handle up to ±30V, and have a 3k to 7k input impedance. The receivers also feature hysteresis to greatly improve noise rejection. • Multiple Drivers - ±10V Output Swing for 5V lnput - 300 Power-Off Source Impedance - Output Current Limiting - TTL/CMOS Compatible - 30V/µs Maximum Slew Rate • Meets All RS-232E and V.28 Specifications • High Data Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . 120kbps • Onboard Voltage Doubler/Inverter • Low Power Consumption • Low Power Shutdown Function • Three-State TTL/CMOS Receiver Outputs • Multiple Receivers - ±30V Input Voltage Range - 3k to 7k Input Impedance - 0.5V Hysteresis to Improve Noise Rejection • Pb-free Available (RoHS compliant) Applications • Any System Requiring RS-232 Communication Ports - Computer - Portable, Mainframe, Laptop - Peripheral - Printers and Terminals - Instrumentation - Modems Selection Table POWER SUPPLY VOLTAGE NUMBER OF RS-232 DRIVERS NUMBER OF RS-232 RECEIVERS EXTERNAL COMPONENTS LOW POWER SHUTDOWN/TTL THREE-STATE NUMBER OF LEADS HIN232 +5V 2 2 4 Capacitors No/No 16 HIN236 +5V 4 3 4 Capacitors Yes/Yes 24 HIN237 +5V 5 3 4 Capacitors No/No 24 HIN238 +5V 4 4 4 Capacitors No/No 24 HIN239 +5V and +7.5V to 13.2V 3 5 2 Capacitors No/Yes 24 HIN240 +5V 5 5 4 Capacitors Yes/Yes 44 HIN241 +5V 4 5 4 Capacitors Yes/Yes 28 PART NUMBER 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas LLC2004, 2005, 2008, 2015. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pin Descriptions PIN VCC FUNCTION Power Supply Input 5V ±10%. V+ Internally generated positive supply (+10V nominal), HIN239 requires +7.5V to +13.2V. V- Internally generated negative supply (-10V nominal). GND Ground lead. Connect to 0V. C1+ External capacitor (+ terminal) is connected to this lead. C1- External capacitor (- terminal) is connected to this lead. C2+ External capacitor (+ terminal) is connected to this lead. C2- External capacitor (- terminal) is connected to this lead. TIN Transmitter Inputs. These leads accept TTL/CMOS levels. An internal 400kpull-up resistor to VCC is connected to each lead. TOUT RIN ROUT Transmitter Outputs. These are RS-232 levels (nominally ±10V). Receiver Inputs. These inputs accept RS-232 input levels. An internal 5kpull-down resistor to GND is connected to each input. Receiver Outputs. These are TTL/CMOS levels. EN Enable input. This is an active low input which enables the receiver outputs. With EN = 5V, the receiver outputs are placed in a high impedance state. SD Shutdown Input. With SD = 5V, the charge pump is disabled, the receiver outputs are in a high impedance state and the transmitters are shut off. NC No Connect. No connections are made to these leads. 2 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Ordering Information PART NUMBER PART MARKING TEMP. RANGE (°C) PKG. DWG. # PACKAGE HIN232CBZ* (Note) HIN232CBZ 0 to +70 16 Ld SOIC (Pb-free) M16.3 HIN232CPZ (Note) HIN232CPZ 0 to +70 16 Ld PDIP** (Pb-free) E16.3 HIN232IBZ* (Note) HIN232IBZ -40 to +85 16 Ld SOIC (Pb-free) M16.3 HIN232IPZ (Note) HIN232IPZ -40 to +85 16 Ld PDIP** (Pb-free) E16.3 HIN236CBZ (No longer available or supported recommended replacement part ICL3243E) (Note) HIN236CBZ 0 to +70 24 Ld SOIC (Pb-free) M24.3 HIN237CBZ* (No longer available or supported recommended replacement part ICL3243E) (Note) HIN237CBZ 0 to +70 24 Ld SOIC (Pb-free) M24.3 HIN238CBZ*(Note) HIN238CBZ 0 to +70 24 Ld SOIC (Pb-free) M24.3 HIN238IBZ* (Note) HIN238IBZ -40 to +85 24 Ld SOIC (Pb-free) M24.3 HIN239CBZ* (Note) HIN239CBZ 0 to +70 24 Ld SOIC (Pb-free) M24.3 HIN239CPZ (Note) HIN239CPZ 0 to +70 24 Ld PDIP** (Pb-free) E24.3 HIN240CNZ* (No longer HIN240CNZ available or supported) (Note) 0 to +70 44 Ld MQFP (Pb-free) Q44.10X10 HIN241CAZ (No longer HIN241CAZ available or supported) (Note) 0 to +70 28 Ld SSOP (Pb-free) M28.209 HIN241CBZ* (No longer HIN241CBZ available or supported) (Note) 0 to +70 28 Ld SOIC (Pb-free) M28.3 HIN241IBZ (No longer HIN241IBZ Available or supported) (Note) -40 to +85 28 Ld SOIC (Pb-free) M28.3 *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. **Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. 3 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts HIN236 (24 LD SOIC) TOP VIEW HIN232 (16 LD PDIP, SOIC) TOP VIEW 16 VCC C1+ 1 15 GND V+ 2 C1- 3 14 T1OUT C2+ 4 13 R1IN C2- 5 12 R1OUT 6 11 T1IN T2OUT 7 10 T2IN V- T3OUT 1 24 T4OUT T1OUT 2 23 R2IN T2OUT 3 22 R2OUT R1IN 4 21 SD R1OUT 5 20 EN T2IN 6 19 T4IN T1IN 7 18 T3IN GND 8 17 R3OUT VCC 9 16 R3IN 9 R2OUT R2IN 8 C1+ 10 14 C2- C1- 12 13 C2+ +5V 1µF +5V + 16 1µF 1 NOTE 1 + 3 4 NOTE 1 T1IN T2IN R1OUT + 5 11 10 VCC C1+ C1C2+ C2- +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER +5V 400k +5V 400k V+ 2 + NOTE 1 T1 14 1µF T1IN V- 6 + T2 7 12 13 9 10 VCC C1+ + +5V TO 10V 12 C1- VOLTAGE DOUBLER 13 C2+ + +10V TO -10V 14 VOLTAGE INVERTER C2+5V 400k 7 T1 6 +5V 400k T2 18 +5V 400k T3 19 +5V 400k T4 NOTE 1 T2IN T1OUT T3IN T2OUT R1IN T4IN R1OUT 9 8 R2IN 15 EN NOTE: 4 1µF 1µF T1OUT T2OUT T3OUT T4OUT R1IN 5k 23 R2IN 5k 17 20 + 24 R2 R3OUT + V- 15 1 22 5k R2 11 3 R1 R2OUT V+ 2 5 5k R1 R2OUT 15 V- V+ 11 16 5k R3 R3IN 21 SD 8 1. Either 0.1µF or 1µF capacitors may be used. 4 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts (Continued) HIN238 (24 LD PDIP, SOIC) TOP VIEW HIN237 (24 LD SOIC) TOP VIEW T3OUT 1 24 T4OUT T2OUT 1 24 T3OUT T1OUT 2 23 R2IN T1OUT 2 23 R3IN T2OUT 3 R1IN R2IN 22 R2OUT R1OUT 5 T1IN 20 T5OUT R1OUT 6 19 T3IN T1IN 7 18 T3IN R1IN 7 18 T2IN GND 8 17 R3OUT GND 8 17 R4OUT VCC 9 16 R3IN VCC 9 16 R4IN 15 V- C1+ 10 V+ 11 C1- 12 V+ 11 14 C2- 13 C2+ C1- 12 13 C2+ +5V 9 T2IN T3IN T4IN T5IN R1OUT 10 C1+ + 12 C113 C2+ + 14 C2- VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER V- 15 T1 +5V 400k 6 T2 +5V 400k T3 +5V 400k 19 T4 21 +5V 400k 3 1 24 T5 20 5 + 4 1µF 1µF T1OUT T1IN T2OUT T2IN T3OUT T3IN T4OUT T4IN T5OUT 10 C1+ + 12 C113 C2+ + 14 C2- VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER V- 15 +5V 400k 5 T1 18 +5V 400k T2 19 +5V 400k T3 21 +5V 400k T4 R2IN R3OUT 2 1 24 20 6 7 17 16 5k R3 R3IN R4OUT 4 3 5 1µF T1OUT T2OUT T3OUT T4OUT R1IN R2IN 5k 22 23 R3IN 5k 17 16 R4IN 5k R4 8 1µF 5k R3 R3OUT + + R2 5k 11 V+ R1 R2OUT 23 R2 R1OUT R1IN 5k 22 9 1µF 1µF + 2 R1 R2OUT 11 V+ +5V 400k 7 18 15 V- 14 C2- +5V T1IN 20 T4OUT 19 T4IN C1+ 10 1µF 21 T4IN 5 6 T2IN 1µF 22 R3OUT 3 R2OUT 4 21 T5IN 4 8 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 (Continued) NC NC R5IN R5OUT T3IN T4IN R4OUT 21 R2IN R4IN 22 R2OUT VCC 4 EN 23 T2IN GND 3 SD 24 T1IN R1IN 2 NC R1OUT 1 T5OUT HIN240 (44 LD MQFP) TOP VIEW HIN239 (24 LD PDIP, SOIC) TOP VIEW 44 43 42 41 40 39 38 37 36 35 34 33 2 32 1 NC V+ 5 20 T2OUT T5IN C1+ 6 19 T1OUT R3OUT 3 31 NC C1- 7 18 R3IN R3IN 4 30 V- 17 R3OUT T4OUT 5 29 C2- 16 T3IN T3OUT 6 28 C2+ T1OUT 7 27 C1- T2OUT 8 26 V+ NC 9 25 C1+ 6 NC NC NC NC NC 24 10 11 23 12 13 14 15 16 17 18 19 20 21 22 NC NC NC R2IN VCC 13 T3OUT R4IN 12 GND 14 EN R1IN R4OUT 11 R1OUT 15 NC T1IN R5IN 9 R5OUT 10 T2IN V- 8 R2OUT Pinouts FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts (Continued) +5V +7.5V TO +13.2V (NOTE) +5V 4 6 1µF + 7 (NOTE) T1IN T2IN T3IN R1OUT C1- +10V TO -10V VOLTAGE INVERTER +5V 400k 24 23 +5V 400k T2 16 +5V 400k T3 13 2 1 EN 21 T1IN T2OUT T2IN T3OUT T3IN R1IN T4IN R2IN +5V 400k 14 T2 +5V 400k T3 +5V 400k 38 T4 +5V 400k 2 T5 37 T5IN R1OUT R3IN 5k 11 R4IN 5k 9 R5IN R4OUT 3 EN T3OUT T4OUT T5OUT R1IN R2IN 5k 4 R3IN 5k 39 40 R4IN 5k 36 NOTE: For V+ > 11V, use C1 0.1µF. T2OUT 5k 3 42 T1OUT 10 R4 R5OUT 7 17 13 5k 1µF 41 R3 35 R5 1µF 30 5 16 R3OUT V- + 6 R2 12 10 R2OUT V+ 26 8 R1 18 R5 T1OUT 5k 17 14 1µF 1µF 5k 22 R4 R5OUT V- 8 20 R3 R4OUT 5 19 R2 R3OUT V+ + T1 R1 R2OUT 1µF VCC C1+ 19 25 V CC C1+ + +5V TO 10V 27 C1- VOLTAGE DOUBLER 28 C2+ +10V TO -10V + 29 VOLTAGE INVERTER C2+5V T1 400k 15 5k 43 R5IN SD 18 HIN241 (28 SOIC, SSOP) TOP VIEW 7 T3OUT 1 28 T4OUT T1OUT 2 27 R3IN T2OUT 3 26 R3OUT R2IN 4 25 SD R2OUT 5 24 EN T2IN 6 23 R4IN T1IN 7 22 R4OUT R1OUT 8 21 T4IN R1IN 9 20 T3IN GND 10 19 R5OUT VCC 11 18 R5IN C1+ 12 17 V- V+ 13 16 C2- C1- 14 15 C2+ FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts (Continued) +5V 1µF 1µF T1IN T2IN T3IN T4IN R1OUT 11 12 VCC C1+ + +5V TO 10V 14 C1- VOLTAGE DOUBLER 15 C2+ + +10V TO -10V 16 VOLTAGE INVERTER C2+5V 400k 7 T1 6 +5V 400k T2 20 +5V 400k T3 21 +5V 400k T4 EN + 1µF T1OUT T2OUT T3OUT T4OUT 9 R1IN 5k 5 4 R2IN 5k 26 27 R3IN 5k 22 23 R4IN 5k 19 24 V- 17 28 8 R4 R5OUT 1µF 1 R3 R4OUT + 3 R2 R3OUT 13 2 R1 R2OUT V+ 18 5k R5 25 R5IN SD 10 8 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Absolute Maximum Ratings Thermal Information VCC to Ground. . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) < VCC < 6V V+ to Ground (Note 2. . . . . . . . . . . . . . . . (VCC -0.3V) < V+ < 13.2V V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . -12V < V- < (GND +0.3V) V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24V Input Voltages TIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V < VIN < (V+ +0.3V) RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . .(V- -0.3V) < VTXOUT < (V+ +0.3V) ROUT . . . . . . . . . . . . . . . . . (GND -0.3V) < VRXOUT < (V+ +0.3V) Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Thermal Resistance (Typical, Note 3) JC (°C/W) 16 Ld PDIP Package* 90 24 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . 70 16 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 100 24 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75 28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 70 28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 95 44 Ld MQFP Package . . . . . . . . . . . . . . . . . . . . . . . 80 Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. Operating Conditions Temperature Range HIN2xxcx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C HIN2xxIx. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 2. Only HIN239. For V+ > 11V, C1 must be 0.1µF. 3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications Test Conditions: VCC = +5V ±10%, TA = Operating Temperature Range PARAMETER MIN (Note 5) TYP MAX (Note 5) UNITS HIN232 - 5 10 mA HIN236-HIN238, HIN240-HIN241 - 7 15 mA HIN239 - 0.4 1 mA HIN239 - 5.0 15 mA - 1 10 µA - - 0.8 V TEST CONDITIONS SUPPLY CURRENTS No Load, TA = +25°C Power Supply Current, ICC V+ Power Supply Current, ICC No Load, TA = +25°C No Load, TA = +25°C Shutdown Supply Current, ICC(SD) TA = +25°C LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS Input Logic Low, VlL TIN, EN, Shutdown Input Logic High, VlH TIN 2.0 - - V EN, Shutdown 2.4 - - V Transmitter Input Pull-up Current, IP TIN = 0V - 15 200 µA TTL/CMOS Receiver Output Voltage Low, VOL IOUT = 1.6mA - 0.1 0.4 V TTL/CMOS Receiver Output Voltage High, VOH IOUT = -1.0mA 3.5 4.6 - V -30 - +30 V RECEIVER INPUTS RS-232 Input Voltage Range VIN Receiver Input Impedance RIN VIN = ±3V 3.0 5.0 7.0 k Receiver Input Low Threshold, VlN (H-L) VCC = 5V, TA = +25°C 0.8 1.2 - V Receiver Input High Threshold, VIN (L-H) VCC = 5V, TA = +25°C - 1.7 2.4 V 0.2 0.5 1.0 V Receiver Input Hysteresis VHYST 9 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Electrical Specifications Test Conditions: VCC = +5V ±10%, TA = Operating Temperature Range (Continued) PARAMETER TEST CONDITIONS MIN (Note 5) TYP MAX (Note 5) UNITS 120 - - kbps TIMING CHARACTERISTICS Baud Rate (1 Transmitter Switching) RL = 3k Output Enable Time, tEN HIN236, HIN239, HIN240, HIN241 - 400 - ns Output Disable Time, tDIS HIN236, HIN239, HIN240, HIN241 - 250 - ns Propagation Delay, tPD RS-232 to TTL - 0.5 - µs Instantaneous Slew Rate SR CL = 10pF, RL = 3k, TA = +25°C (Note 4) - - 30 V/µs Transition Region Slew Rate, SRT RL = 3k, CL = 2500pF Measured from +3V to -3V or -3V to +3V, 1 Transmitter Switching - 3 - V/µs TRANSMITTER OUTPUTS Output Voltage Swing, TOUT Transmitter Outputs, 3k to Ground ±5 ±9 ±10 V Output Resistance, TOUT VCC = V+ = V- = 0V, VOUT = 2V 300 - - RS-232 Output Short Circuit Current, ISC TOUT shorted to GND - ±10 - mA NOTE: 4. Limits established by characterization and are not production tested. 5. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. VOLTAGE DOUBLER C1+ S1 VOLTAGE INVERTER S2 V+ = 2VCC VCC + GND C1- S3 + C1 S4 S5 C2+ GND + C3 VCC S6 GND S7 C2- + C2 S8 C4 V- = -(V+) RC OSCILLATOR FIGURE 1. CHARGE PUMP Detailed Description The HIN232 thru HIN241 family of RS-232 transmitters/receivers are powered by a single +5V power supply (except HIN239), feature low power consumption, and meet all ElA RS-232C and V.28 specifications. The circuit is divided into three sections: The charge pump, transmitter, and receiver. Charge Pump An equivalent circuit of the charge pump is illustrated in Figure 1. The charge pump contains two sections: the voltage doubler and the voltage inverter. Each section is driven by a two-phase, internally generated clock to generate +10V and -10V. The nominal clock frequency is 16kHz. During phase one of the clock, capacitor C1 is charged to VCC . During phase two, the voltage on C1 is added to VCC , producing a signal across C3 equal to twice VCC . During phase one, C2 is also charged to 2VCC , and then during phase two, it is 10 inverted with respect to ground to produce a signal across C4 equal to -2VCC . The charge pump accepts input voltages up to 5.5V. The output impedance of the voltage doubler section (V+) is approximately 200, and the output impedance of the voltage inverter section (V-) is approximately 450. A typical application uses 1µF capacitors for C1-C4, however, the value is not critical. Increasing the values of C1 and C2 will lower the output impedance of the voltage doubler and inverter, increasing the values of the reservoir capacitors, C3 and C4, lowers the ripple on the V+ and V- supplies. During shutdown mode (HIN236, HIN240 and HIN241), SHUTDOWN control line set to logic “1”, the charge pump is turned off, V+ is pulled down to VCC , V- is pulled up to GND, and the supply current is reduced to less than 10µA. The transmitter outputs are disabled and the receiver outputs are placed in the high impedance state. FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Transmitters Receivers The transmitters are TTL/CMOS compatible inverters which translate the inputs to RS-232 outputs. The input logic threshold is about 26% of VCC , or 1.3V for VCC = 5V. A logic 1 at the input results in a voltage of between -5V and V- at the output, and a logic 0 results in a voltage between +5V and (V+ -0.6V). Each transmitter input has an internal 400k pullup resistor so any unused input can be left unconnected and its output remains in its low state. The output voltage swing meets the RS-232C specifications of ±5V minimum with the worst case conditions of: all transmitters driving 3k minimum load impedance, VCC = 4.5V, and maximum allowable operating temperature. The transmitters have an internally limited output slew rate which is less than 30V/µs. The outputs are short circuit protected and can be shorted to ground indefinitely. The powered down output impedance is a minimum of 300 with ±2V applied to the outputs and VCC = 0V. The receiver inputs accept up to ±30V while presenting the required 3k to 7k input impedance even if the power is off (VCC = 0V). The receivers have a typical input threshold of 1.3V which is within the ±3V limits, known as the transition region, of the RS-232 specifications. The receiver output is 0V to VCC . The output will be low whenever the input is greater than 2.4V and high whenever the input is floating or driven between +0.8V and -30V. The receivers feature 0.5V hysteresis to improve noise rejection. The receiver Enable line EN, when set to logic “1”, (HIN236, HIN239, HIN240, and HIN241) disables the receiver outputs, placing them in the high impedance mode. The receiver outputs are also placed in the high impedance state when in shutdown mode. V+ VCC VCC 400k 300 RXIN TXIN TOUT GND < TXIN < VCC V- < VTOUT < V+ -30V < RXIN < +30V ROUT 5k GND < VROUT < VCC GND V- FIGURE 3. RECEIVER FIGURE 2. TRANSMITTER TIN OR RIN TOUT OR ROUT VOL VOL tPHL AVERAGE PROPAGATION DELAY = tPLH tPHL + tPLH 2 FIGURE 4. PROPAGATION DELAY DEFINITION 11 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Typical Performance Curves 1µF 10 SUPPLY VOLTAGE (|V|) V- SUPPLY VOLTAGE TA = +25°C 12 12 0.47µF 8 0.10µF 6 4 TRANSMITTER OUTPUTS OPEN CIRCUIT 10 V+ (VCC = 5V) 8 6 V+ (VCC = 4.5V) V- (VCC = 4.5V) 4 V- (VCC = 5V) 2 2 0 0 3.0 4.0 3.5 4.5 VCC 5.0 5.5 6.0 0 5 10 15 20 25 30 35 |ILOAD| (mA) FIGURE 5. V- SUPPLY VOLTAGE vs VCC , VARYING CAPACITORS FIGURE 6. V+, V- OUTPUT VOLTAGE vs LOAD (HIN232) Test Circuits (HIN232) +4.5V TO +5.5V INPUT 1µF C1 1 C1+ - 1µF C3 2 V+ + + - 1µF + C2 - - + 3k 1µF C4 1 C1+ VCC 16 2 V+ GND 15 3k 3 C1- T1OUT 14 4 C2+ R1IN 13 RS-232 30V INPUT 5 C2- R1OUT 12 TTL/CMOS OUTPUT T1 OUTPUT 6 V- T1IN 11 TTL/CMOS INPUT 7 T2OUT T2IN 10 TTL/CMOS INPUT 8 R2IN R2OUT 9 TTL/CMOS OUTPUT T2 OUTPUT 3 C1- VCC 16 GND 15 T1OUT 14 4 C2+ R1IN 13 5 C2- R1OUT 12 6 V- T1IN 11 7 T2OUT T2IN 10 8 R2IN R2OUT 9 ROUT = VIN/1 T2OUT T1OUT VIN = 2V RS-232 30V INPUT FIGURE 7. GENERAL TEST CIRCUIT 12 A FIGURE 8. POWER-OFF SOURCE RESISTANCE CONFIGURATION FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Applications +5V The HIN2xx may be used for all RS-232 data terminal and communication links. It is particularly useful in applications where 12V power supplies are not available for conventional RS-232 interface circuits. The applications presented represent typical interface configurations. C1 + 1µF C2 + 1µF - A simple duplex RS-232 port with CTS/RTS handshaking is illustrated in Figure 9. Fixed output signals such as DTR (data terminal ready) and DSRS (data signaling rate select) is generated by driving them through a 5k resistor connected to V+. TD TD TTL/CMOS INPUTS AND OUTPUTS RTS RD 9 T1 11 - RS-232 INPUTS AND OUTPUTS + T1 14 T2 7 13 R1 8 TD (2) TRANSMIT DATA RTS (4) REQUEST TO SEND RD (3) RECEIVE DATA CTS (5) CLEAR TO SEND SIGNAL GROUND (7) + C2 1µF 14 T2 TD (2) TRANSMIT DATA 7 RTS (4) REQUEST TO SEND 13 R2 5 - 5 12 CTS 6 FIGURE 9. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS HANDSHAKING 4 10 HIN232 4 15 HIN232 11 3 DTR (20) DATA TERMINAL READY DSRS (24) DATA SIGNALING RATE SELECT 2 TTL/CMOS RTS INPUTS AND 12 RD OUTPUTS R2 9 CTS 1 3 16 1 10 In applications requiring four RS-232 inputs and outputs (Figure 10), note that each circuit requires two charge pump capacitors (C1 and C2) but can share common reservoir capacitors (C3 and C4). The benefit of sharing common reservoir capacitors is the elimination of two capacitors and the reduction of the charge pump source impedance which effectively increases the output swing of the transmitters. C1 + 1µF - + R1 RD (3) RECEIVE DATA 8 CTS (5) CLEAR TO SEND 15 16 2 - C3 + + C4 6 V- V+ 2µF 6 2 - 2µF 16 +5V RS-232 INPUTS AND OUTPUTS HIN232 C1 + 1µF DTR TTL/CMOS INPUTS AND OUTPUTS DSRS DCD R1 1 4 3 5 T1 11 14 T2 10 12 9 7 13 R2 R1 15 8 + C2 1µF - DTR (20) DATA TERMINAL READY DSRS (24) DATA SIGNALING RATE SELECT DCD (8) DATA CARRIER DETECT R1 (22) RING INDICATOR SIGNAL GROUND (7) FIGURE 10. COMBINING TWO HIN232s FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS 13 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Die Characteristics SUBSTRATE POTENTIAL TRANSISTOR COUNT V+ 238 Metallization Mask Layout HIN240 T2OUT T1OUT T3OUT T4OUT R3OUT R3IN T5IN R2IN SHUTDOWN R2OUT EN T2IN T5OUT T1IN R4IN R1OUT R4OUT R1IN T4IN GND T3IN R5OUT VCC R5IN C1+ 14 V+ C1- C2+ C2- V- FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION August 6, 2015 FN3138.17 CHANGE Added Rev History beginning with Rev 17. Added About Intersil Verbiage Updated Ordering Information Table on page 3. Updated POD M24.3 to most current version change is as follows: Updated to new POD standard by removing table listing dimensions and putting dimensions on drawing. Added Land Pattern. Updated POD M28.3 to most current version change is as follows: Added land pattern About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support 15 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Dual-In-Line Plastic Packages (PDIP) N E16.3 (JEDEC MS-001-BB ISSUE D) E1 INDEX AREA 1 2 3 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE N/2 INCHES -B- SYMBOL -AE D BASE PLANE -C- SEATING PLANE A2 A L D1 e B1 D1 eA A1 eC B 0.010 (0.25) M C L C A B S C eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. MILLIMETERS MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - B1 0.045 0.070 1.15 1.77 8, 10 C 0.008 0.014 0.204 0.355 - D 0.735 0.775 18.66 19.68 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2.54 BSC - 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. eA 0.300 BSC 7.62 BSC 6 eB - 0.430 - 10.92 7 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. L 0.115 0.150 2.93 3.81 4 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . N 16 16 9 Rev. 0 12/93 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). 16 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Dual-In-Line Plastic Packages (PDIP) N E24.3 (JEDEC MS-001-AF ISSUE D) E1 INDEX AREA 1 2 3 24 LEAD NARROW BODY DUAL-IN-LINE PLASTIC PACKAGE N/2 INCHES -B-AD E BASE PLANE -C- SEATING PLANE A2 A L D1 e B1 D1 eA A1 eC B 0.010 (0.25) M C L C A B S C eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - B1 0.045 0.070 1.15 1.77 8 C 0.008 0.014 D 1.230 1.280 31.24 0.204 0.355 32.51 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC eA 0.300 BSC 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. eB - L 0.115 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . N 0.430 0.150 24 2.54 BSC 7.62 BSC 2.93 24 6 10.92 7 3.81 4 9 Rev. 0 12/93 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). 17 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Small Outline Plastic Packages (SOIC) M16.3 (JEDEC MS-013-AA ISSUE C) N INDEX AREA 16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE H 0.25(0.010) M B M INCHES E -B- 1 2 3 L SEATING PLANE -A- A D h x 45° -C- e A1 B 0.25(0.010) M C 0.10(0.004) C A M SYMBOL MIN MAX MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.3977 0.4133 10.10 10.50 3 E 0.2914 0.2992 7.40 7.60 4 e B S 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 0.050 BSC 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 N NOTES: MILLIMETERS 16 0° 16 8° 0° 7 8° Rev. 1 6/05 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 18 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Package Outline Drawing M24.3 24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE (SOIC) Rev 2, 3/11 24 INDEX AREA 7.60 (0.299) 7.40 (0.291) 10.65 (0.419) 10.00 (0.394) DETAIL "A" 1 2 3 TOP VIEW 1.27 (0.050) 0.40 (0.016) SEATING PLANE 2.65 (0.104) 2.35 (0.093) 15.60 (0.614) 15.20 (0.598) 0.75 (0.029) x 45° 0.25 (0.010) 0.30 (0.012) 0.10 (0.004) 1.27 (0.050) 0.51 (0.020) 0.33 (0.013) 8° 0° 0.32 (0.012) 0.23 (0.009) SIDE VIEW “B” SIDE VIEW “A” 1.981 (0.078) 9.373 (0.369) 1.27 (0.050) NOTES: 1. Dimensioning and tolerancing per ANSI Y14.5M-1982. 2. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 3. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 4. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 5. Terminal numbers are shown for reference only. 6. The lead width as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 7. Controlling dimension: MILLIMETER. Converted inch dimensions in ( ) are not necessarily exact. 8. This outline conforms to JEDEC publication MS-013-AD ISSUE C. 0.533 (0.021) TYPICAL RECOMMENDED LAND PATTERN 19 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Small Outline Plastic Packages (SOIC) M28.3 (JEDEC MS-013-AE ISSUE C) N 28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M B M INCHES E SYMBOL -B- 1 2 3 L SEATING PLANE -A- A D h x 45o a e A1 B C 0.10(0.004) 0.25(0.010) M C A M B S MAX MILLIMETERS MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.6969 0.7125 17.70 18.10 3 E 0.2914 0.2992 7.40 7.60 4 e -C- MIN 0.05 BSC h 0.01 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 10.00 - 0.394 N 0.419 1.27 BSC H 28 0o 10.65 - 28 8o 0o 7 8o Rev. 1, 1/13 NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. TYPICAL RECOMMENDED LAND PATTERN (1.50mm) 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. (9.38mm) 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) (1.27mm TYP) (0.51mm TYP) 20 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Shrink Small Outline Plastic Packages (SSOP) M28.209 (JEDEC MO-150-AH ISSUE B) N INDEX AREA 28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE H 0.25(0.010) M 2 GAUGE PLANE 3 0.25 0.010 SEATING PLANE -A- INCHES E -B- 1 B M A D -C- e C 0.10(0.004) C A M SYMBOL MIN MAX MIN MAX NOTES A - 0.078 - 2.00 - A1 0.002 - 0.05 - - A2 0.065 0.072 1.65 1.85 - B 0.009 0.014 0.22 0.38 9 C 0.004 0.009 0.09 0.25 - D 0.390 0.413 9.90 10.50 3 E 0.197 0.220 5.00 5.60 4 e A2 A1 B 0.25(0.010) M L B S NOTES: 0.026 BSC H 0.292 L 0.022 N 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. MILLIMETERS 0.65 BSC 0.322 7.40 0.037 0.55 28 0° - 0.95 6 28 8° 0° - 8.20 7 8° Rev. 2 6/05 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 21 FN3138.17 August 6, 2015 HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Metric Plastic Quad Flatpack Packages (MQFP) D Q44.10x10 (JEDEC MS-022AB ISSUE B) 44 LEAD METRIC PLASTIC QUAD FLATPACK PACKAGE D1 -D- INCHES SYMBOL -A- -B- E E1 e PIN 1 SEATING A PLANE -H- 0.076 0.003 -C- 12o-16o 0.40 0.016 MIN 0.20 M 0.008 C A-B S 0o MIN D S b A2 A1 0o-7o L b1 MILLIMETERS MIN MAX NOTES A - 0.096 - 2.45 - A1 0.004 0.010 0.10 0.25 - A2 0.077 0.083 1.95 2.10 - b 0.012 0.018 0.30 0.45 6 b1 0.012 0.016 0.30 0.40 - D 0.515 0.524 13.08 13.32 3 D1 0.389 0.399 9.88 10.12 4, 5 E 0.516 0.523 13.10 13.30 3 E1 0.390 0.398 9.90 10.10 4, 5 L 0.029 0.040 0.73 1.03 - N 44 44 7 e 0.032 BSC 0.80 BSC Rev. 2 4/99 NOTES: 1. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 2. All dimensions and tolerances per ANSI Y14.5M-1982. 3. Dimensions D and E to be determined at seating plane -C- . 4. Dimensions D1 and E1 to be determined at datum plane -H- . 6. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total. BASE METAL WITH PLATING MAX 5. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25mm (0.010 inch) per side. 0.13/0.17 0.005/0.007 12o-16o MIN 7. “N” is the number of terminal positions. 0.13/0.23 0.005/0.009 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 22 FN3138.17 August 6, 2015