Si1469DH Vishay Siliconix P-Channel 20 V (D-S) MOSFET FEATURES PRODUCT SUMMARY VDS (V) RDS(on) (Ω) ID (A)c 0.080 at VGS = - 10 V - 2.7 - 20 0.100 at VGS = - 4.5 V - 2.7 0.155 at VGS = - 2.5 V - 2.7 Qg (Typ.) 5.5 nC • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Power MOSFET • Compliant to RoHS Directive 2002/95/EC APPLICATIONS SOT-363 SC-70 (6-LEADS) • Load Switch for Portable Devices 1 6 D D 2 5 D Marking Code BL XX G 3 4 S YY D Lot Traceability and Date Code G Part # Code S Top View D Ordering Information: Si1469DH-T1-E3 (Lead (Pb)-free) Si1469DH-T1-GE3 (Lead (Pb)-free and Halogen-free) P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted Parameter Symbol Limit Drain-Source Voltage VDS - 20 Gate-Source Voltage VGS ± 12 TC = 70 °C TA = 25 °C - 2.7c ID - 3.2a, b - 2.6a, b TA = 70 °C IDM Pulsed Drain Current (10 µs Pulse Width) Continuous Source-Drain Diode Currenta, b TC = 25 °C TA = 25 °C Maximum Power Dissipationa, b TA = 25 °C -8 IS - 1.25a, b 2.78 1.78 PD Soldering Recommendations (Peak W 1.5a, b 1a, b TA = 70 °C TJ, Tstg Operating Junction and Storage Temperature Range A - 2.3 TC = 25 °C TC = 70 °C V - 2.7c TC = 25 °C Continuous Drain Current (TJ = 150 °C)a, b Unit - 55 to 150 Temperature)c, d °C 260 THERMAL RESISTANCE RATINGS Parameter Symbol Typical Maximum Maximum Junction-to-Ambienta, d t≤5s RthJA 60 80 Maximum Junction-to-Foot (Drain) Steady State RthJF 34 45 Unit °C/W Notes: a. Surface mounted on 1" x 1" FR4 board. b. t = 5 s. c. Package limited. d. Maximum under steady state conditions is 125 °C/W. Document Number: 74441 S10-0646-Rev. C, 22-Mar-10 www.vishay.com 1 Si1469DH Vishay Siliconix SPECIFICATIONS TJ = 25 °C, unless otherwise noted Parameter Symbol Test Conditions Min. VDS VGS = 0 V, ID = - 250 µA - 20 Typ. Max. Unit Static Drain-Source Breakdown Voltage VDS Temperature Coefficient ΔVDS/TJ VGS(th) Temperature Coefficient ΔVGS(th)/TJ Gate-Source Threshold Voltage ID = - 250 µA VGS(th) VDS = VGS, ID = - 250 µA Gate-Source Leakage IGSS VDS = 0 V, VGS = ± 12 V Zero Gate Voltage Drain Current IDSS On-State Drain Currenta ID(on) Drain-Source On-State Resistancea Forward Transconductancea gfs mV/°C - 2.4 - 0.6 - 1.5 V - 100 nA VDS = - 20 V, VGS = 0 V -1 VDS = - 20 V, VGS = 0 V, TJ = 55 °C - 10 VDS ≤ 5 V, VGS = - 4.5 V RDS(on) V - 21 -3 µA A VGS = - 10 V, ID = - 2.0 A 0.065 0.080 VGS = - 4.5 V, ID = - 1.8 A 0.081 0.100 VGS = - 2.5 V, ID = - 1.5 A 0.126 0.155 VDS = - 10 V, ID = - 2.0 A 6 Ω S Dynamicb Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Gate Resistance Rg Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time 470 VDS = - 10 V, VGS = 0 V, f = 1 MHz pF 105 80 5.5 VDS = - 10 V, VGS = - 4.5 V, ID = - 2.5 A 8.5 0.8 nC 1.7 f = 1 MHz td(on) VDD = - 10 V, RL = 5 Ω ID ≅ - 2 A, VGEN = - 4.5 V, Rg = 1 Ω tr td(off) Ω 10 27 41 48 72 27 41 tf 15 23 td(on) 5 10 20 30 VDD = - 10 V, RL = 5 Ω ID ≅ - 2 A, VGEN = - 10 V, Rg = 1 Ω tr td(off) tf 22 33 9 18 ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current TC = 25 °C IS Pulse Diode Forward Current ISM Body Diode Voltage VSD - 1.6 - 6.5 IS = - 2 A, VGS = 0 V - 0.83 - 1.2 A V Body Diode Reverse Recovery Time trr 20 30 ns Body Diode Reverse Recovery Charge Qrr 8 15 nC Reverse Recovery Fall Time ta Reverse Recovery Rise Time tb IF = - 2.0 A, dI/dt = 100 A/µs, TJ = 25 °C 7 13 ns Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com 2 Document Number: 74441 S10-0646-Rev. C, 22-Mar-10 Si1469DH Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 10 2.5 VGS = 10 V thru 3 V 2.0 I D - Drain Current (A) ID - Drain Current (A) 8 6 4 2V 2 1.5 TC = 125 °C 1.0 0.5 TC = 25 °C TC = - 55 °C 0 0.0 0.6 1.2 1.8 2.4 0.0 0.0 3.0 0.5 VDS - Drain-to-Source Voltage (V) 1.5 2.0 2.5 VGS - Gate-to-Source Voltage (V) Output Characteristics Transfer Characteristics 0.20 800 0.16 640 VGS = 2.5 V C - Capacitance (pF) RDS(on) - On-Resistance ( ) 1.0 0.12 VGS = 4.5 V 0.08 VGS = 10 V Ciss 480 320 Coss 160 0.04 Crss 0.00 0.0 0 1.4 2.8 4.2 5.6 7.0 0 8 12 16 ID - Drain Current (A) VDS - Drain-to-Source Voltage (V) On-Resistance vs. Drain Current and Gate Voltage Capacitance 10 20 1.6 ID = 2.5 A ID = 2 A 8 VGS = 2.5 V 1.4 VDS = 5 V R DS(on) - On-Resistance (Normalized) VGS - Gate-to-Source Voltage (V) 4 VDS = 10 V 6 VDS = 15 V 4 2 1.2 VGS = 10 V 1.0 0.8 0 0 3 6 9 Qg - Total Gate Charge (nC) Gate Charge Document Number: 74441 S10-0646-Rev. C, 22-Mar-10 12 15 0.6 - 50 - 25 0 25 50 75 100 125 150 TJ - Junction Temperature (°C) On-Resistance vs. Junction Temperature www.vishay.com 3 Si1469DH Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 0.5 10 R DS(on) - On-Resistance ( ) ID = 2 A I S - Source Current (A) TJ = 150 °C 1 TJ = 25 °C 0.1 0.4 0.3 0.2 125 °C 0.1 25 °C 0.0 0.01 0.0 0.3 0.6 0.9 1.2 0 1.5 4 6 8 VSD - Source-to-Drain Voltage (V) VGS - Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage 0.4 10 30 ID = 5 mA 0.3 24 0.2 Power (W) VGS(th) Variance (V) 2 ID = 250 µA 0.1 18 12 0.0 6 - 0.1 - 0.2 - 50 0 - 25 0 25 50 75 100 125 150 0.001 0.01 TJ - Temperature (°C) 0.1 1 10 Time (s) Single Pulse Power, Junction-to-Ambient Threshold Voltage 10 I D - Drain Current (A) Limited by R DS(on)* 1 1 ms 10 ms 0.1 100 ms 1s 10 s DC TC = 25 °C Single Pulse 0.01 0.01 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) * VGS minimum VGS at which RDS(on) is specified Safe Operating Area, Junction-to-Ambient www.vishay.com 4 Document Number: 74441 S10-0646-Rev. C, 22-Mar-10 Si1469DH Vishay Siliconix 5 3.5 4 2.8 Power Dissipation (W) I D - Drain Current (A) TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted Package Limited 3 2 2.1 1.4 1 0.7 0 0.0 0 25 50 75 100 125 150 0 25 50 75 100 125 150 TC - Case Temperature (°C) TC - Case Temperature (°C) Power Derating, Junction-to-Foot Current Derating* 1.20 Power Dissipation (W) 0.96 0.72 0.48 0.24 0.00 0 25 50 75 100 125 150 TA - Ambient Temperature (°C) Power Derating, Junction-to-Ambient * The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. Document Number: 74441 S10-0646-Rev. C, 22-Mar-10 www.vishay.com 5 Si1469DH Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 Notes: 0.1 PDM 0.1 t1 0.05 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = RthJA = 125 °C/W 0.02 3. TJM - T A = PDMZthJA(t) Single Pulse 4. Surface Mounted 0.01 10-4 10-3 10-2 10-1 1 Square Wave Pulse Duration (s) 100 10 1000 Normalized Thermal Transient Impedance, Junction-to-Ambient Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10-4 10-3 10-2 10-1 Square Wave Pulse Duration (s) 1 10 Normalized Thermal Transient Impedance, Junction-to-Foot Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?74441. www.vishay.com 6 Document Number: 74441 S10-0646-Rev. C, 22-Mar-10 Package Information Vishay Siliconix SCĆ70: 6ĆLEADS MILLIMETERS 6 5 Dim A A1 A2 b c D E E1 e e1 L 4 E1 E 1 2 3 -B- e b e1 D -Ac A2 A L A1 Document Number: 71154 06-Jul-01 INCHES Min Nom Max Min Nom Max 0.90 – 1.10 0.035 – 0.043 – – 0.10 – – 0.004 0.80 – 1.00 0.031 – 0.039 0.15 – 0.30 0.006 – 0.012 0.10 – 0.25 0.004 – 0.010 1.80 2.00 2.20 0.071 0.079 0.087 1.80 2.10 2.40 0.071 0.083 0.094 1.15 1.25 1.35 0.045 0.049 0.053 0.65BSC 0.026BSC 1.20 1.30 1.40 0.047 0.051 0.055 0.10 0.20 0.30 0.004 0.008 0.012 7_Nom 7_Nom ECN: S-03946—Rev. B, 09-Jul-01 DWG: 5550 www.vishay.com 1 AN815 Vishay Siliconix Single-Channel LITTLE FOOTR SC-70 6-Pin MOSFET Copper Leadframe Version Recommended Pad Pattern and Thermal Performance INTRODUCTION EVALUATION BOARDS SINGLE SC70-6 The new single 6-pin SC-70 package with a copper leadframe enables improved on-resistance values and enhanced thermal performance as compared to the existing 3-pin and 6-pin packages with Alloy 42 leadframes. These devices are intended for small to medium load applications where a miniaturized package is required. Devices in this package come in a range of on-resistance values, in n-channel and p-channel versions. This technical note discusses pin-outs, package outlines, pad patterns, evaluation board layout, and thermal performance for the single-channel version. The evaluation board (EVB) measures 0.6 inches by 0.5 inches. The copper pad traces are the same as in Figure 2. The board allows examination from the outer pins to 6-pin DIP connections, permitting test sockets to be used in evaluation testing. See Figure 3. 52 (mil) BASIC PAD PATTERNS See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/doc?72286) for the basic pad layout and dimensions. These pad patterns are sufficient for the low to medium power applications for which this package is intended. Increasing the drain pad pattern yields a reduction in thermal resistance and is a preferred footprint. The availability of four drain leads rather than the traditional single drain lead allows a better thermal path from the package to the PCB and external environment. 96 (mil) 6 5 4 1 2 3 71 (mil) 26 (mil) 13 (mil) 0, 0 (mil) 18 (mil) 26 (mil) PIN-OUT 16 (mil) Figure 1 shows the pin-out description and Pin 1 identification.The pin-out of this device allows the use of four pins as drain leads, which helps to reduce on-resistance and junction-to-ambient thermal resistance. SOT-363 SC-70 (6-LEADS) D 1 6 D D 2 5 D G 3 4 S FIGURE 2. SC-70 (6 leads) Single The thermal performance of the single 6-pin SC-70 has been measured on the EVB, comparing both the copper and Alloy 42 leadframes. This test was first conducted on the traditional Alloy 42 leadframe and was then repeated using the 1-inch2 PCB with dual-side copper coating. Top View FIGURE 1. For package dimensions see outline drawing SC-70 (6-Leads) (http://www.vishay.com/doc?71154) Document Number: 71334 12-Dec-03 www.vishay.com 1 AN815 Vishay Siliconix Front of Board SC70-6 Back of Board SC70-6 vishay.com FIGURE 3. THERMAL PERFORMANCE Junction-to-Foot Thermal Resistance (Package Performance) COOPER LEADFRAME Room Ambient 25 _C The junction to foot thermal resistance is a useful method of comparing different packages thermal performance. A helpful way of presenting the thermal performance of the 6-Pin SC-70 copper leadframe device is to compare it to the traditional Alloy 42 version. Thermal performance for the 6-pin SC-70 measured as junction-to-foot thermal resistance, where the “foot” is the drain lead of the device at the bottom where it meets the PCB. The junction-to-foot thermal resistance is typically 40_C/W in the copper leadframe and 163_C/W in the Alloy 42 leadframe — a four-fold improvement. This improved performance is obtained by the enhanced thermal conductivity of copper over Alloy 42. The typical RqJA for the single 6-pin SC-70 with copper leadframe is 103_C/W steady-state, compared with 212_C/W for the Alloy 42 version. The figures are based on the 1-inch2 FR4 test board. The following example shows how the thermal resistance impacts power dissipation for the two different leadframes at varying ambient temperatures. ALLOY 42 LEADFRAME PD + Rq JA Elevated Ambient 60 _C PD + T J(max) * T A Rq JA o o P D + 150 Co* 25 C 212 CńW o o P D + 150 Co* 25 C 212 CńW P D + 590 mW P D + 425 mW www.vishay.com 2 T J(max) * T A T J(max) * T A Rq JA PD + T J(max) * T A Rq JA o o P D + 150 Co* 25 C 124 CńW o o P D + 150 Co* 60 C 124 CńW P D + 1.01 W P D + 726 mW As can be seen from the calculations above, the compact 6-pin SC-70 copper leadframe LITTLE FOOT power MOSFET can handle up to 1 W under the stated conditions. Testing To further aid comparison of copper and Alloy 42 leadframes, Figure 5 illustrates single-channel 6-pin SC-70 thermal performance on two different board sizes and two different pad patterns. The measured steady-state values of RqJA for the two leadframes are as follows: LITTLE FOOT 6-PIN SC-70 Power Dissipation Room Ambient 25 _C PD + Elevated Ambient 60 _C 1) Minimum recommended pad pattern on the EVB board V (see Figure 3. 1-inch2 2) Industry standard PCB with maximum copper both sides. Alloy 42 Copper 329.7_C/W 208.5_C/W 211.8_C/W 103.5_C/W The results indicate that designers can reduce thermal resistance (RqJA) by 36% simply by using the copper leadframe device rather than the Alloy 42 version. In this example, a 121_C/W reduction was achieved without an increase in board area. If increasing in board size is feasible, a further 105_C/W reduction could be obtained by utilizing a 1-inch2 square PCB area. The copper leadframe versions have the following suffix: Single: Si14xxEDH Dual: Si19xxEDH Complementary: Si15xxEDH Document Number: 71334 12-Dec-03 AN815 400 250 320 200 240 Thermal Resistance (C/W) Thermal Resistance (C/W) Vishay Siliconix Alloy 42 160 Copper 80 150 Alloy 42 100 50 Copper 0 0 10-5 10-4 10-3 10-2 10-1 1 10 100 1000 10-5 Leadframe Comparison on EVB Document Number: 71334 12-Dec-03 10-3 10-2 10-1 1 10 100 1000 Time (Secs) Time (Secs) FIGURE 4. 10-4 FIGURE 5. Leadframe Comparison on Alloy 42 1-inch2 PCB www.vishay.com 3 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SC-70: 6-Lead 0.067 0.026 (0.648) 0.045 (1.143) 0.096 (2.438) (1.702) 0.016 0.026 0.010 (0.406) (0.648) (0.241) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index APPLICATION NOTE Return to Index www.vishay.com 18 Document Number: 72602 Revision: 21-Jan-08 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Material Category Policy Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant. Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000