ISL6436 TM Data Sheet August 2001 File Number 9023 USB Dual Port Power Supply Controller Features The ISL6436 is a USB dual port power controller, fully independent overcurrent (OC) fault protection IC. Operational over the +2.5V to +5.5V range, this device features internal current monitoring, accurate current limiting, integrated power switches and current limited delay to latch-off for system protection. • 80mΩ Integrated Power N-channel MOSFET Switches • Accurate Current Sensing and 1A Current Limiting • 12ms Fault Delay to Latch-Off, No Thermal Dependency • 2.5V to 5.5V Operating Range • Disabled Output Internally Pulled Low The ISL6436 current sense and limiting circuitry sets the current limit to a nominal 1A, making this device well suited for the USB port power management application. The ISL6436 provides OC fault notification, accurate current limiting and a consistent timed latch-off thus isolating and protecting the voltage bus in the presence of an OC event or short circuit. The 12ms time to latch-off is independent of the adjoining switch’s electrical or thermal condition and the OC response time is inversely related to the OC magnitude. Each ISL6436 incorporates in a single 8 lead SOIC package two 80mΩ N-channel MOSFET power switches for power control. Each switch is driven by a constant current source giving a controlled ramp up of the output voltage. This provides a soft start turn-on eliminating bus voltage drooping caused by inrush current while charging heavy load capacitances. Independent enabling inputs and fault reporting outputs for each channel are compatible with 3V and 5V logic to allow external control and monitoring. The ISL6436 undervoltage lockout feature prevents turn-on of the outputs unless the correct ENABLE state and VIN > 2.5V are present. During initial turn-on the ISL6436 prevents fault reporting by blanking the fault signal. Rising and falling outputs are current limited voltage ramps so that both the inrush current and voltage slew rate are limited, independent of load. This reduces supply droop due to surge and eliminates the need for external EMI filters. During operation, once an OC condition is detected the appropriate output is current limited for 12ms to allow transient conditions to pass. If still in current limit after the current limit period has elapsed, the output is then latched off and the fault is reported by pulling the corresponding FAULT low. The FAULT signal is latched low until reset by the ENABLE signal being de-asserted at which time the FAULT signal will clear. 1 • Undervoltage Lockout • Controlled Turn-on Ramp Time • Channel Independent Fault Output Signals • Compatible with 3.3V and 5V Logic Families • Channel Independent Logic Level Enable High Inputs (ISL6436H) or Enable Low Inputs (ISL6436L) Applications • USB Port Power Management • Electronic Circuit Limiting and Breaker Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE PKG. NO. ISL6436LIB -40 to 85 8 Lead SOIC ISL6436LIB-T -40 to 85 8 Lead SOIC Tape and Reel ISL6436HIB -40 to 85 8 Lead SOIC ISL6436HIB-T -40 to 85 8 Lead SOIC Tape and Reel ISL6436EVAL1 M8.15 M8.15 Evaluation Platform ISL6436USBEVAL1 USB Dual Port Evaluation Platform Pinout ISL6436 (SOIC) TOP VIEW GND 1 8 FAULT_1 VIN 2 7 OUT_1 ENABLE_1 3 6 OUT_2 ENABLE_2 4 5 FAULT_2 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2001, All Rights Reserved ISL6436 Typical Application: Dual USB Port Power D+ D- U S B USB PORT 1 V+ OUT_1 ENABLE_1 FAULT_1 C O N T R O L L E R +5V VIN GND ISL6436L FAULT_2 ENABLE_2 OUT_2 V+ USB PORT_2 D+ D- Simplified Block Diagram CHANNEL 1 LIKE CHANNEL 2 GND FAULT_1 VIN OUT_1 Q-PUMP POR EN_1 EN_2 2 CURRENT AND TEMP. MONITORING, GATE AND OUTPUT CONTROL LOGIC OUT_2 FAULT_2 ISL6436 Pin Descriptions PIN NO. DESIGNATOR FUNCTION DESCRIPTION 1 GND IC Reference 2 VIN Chip bias, Controlled Supply Input, Undervoltage lock-out VIN provides chip bias voltage. At VIN < 2.5V chip functionality is disabled, FAULT latch is cleared and floating and OUT is held low. 3, 4 ENABLE_1, 2 / ENABLE_1,2 Channel Enable / Enable Not Inputs Enables / Disables switch. 5, 8 FAULT_2, 1 Channel 2, 1 Over Current Fault Not Indicator Channel overcurrent fault indicator. FAULT floats and is disabled until VIN >2.5V. This output is pulled low after the OC timeout period has expired and stays latched until ENABLE is deasserted. 6, 7 OUT_2, 1 Channel 2,1 Controlled Channel voltage output, connect to load to protect. Upon an OC condition IOUT is Supply Output current limited to 1A. Current limit response time is within 200µS. This output will remain in current limit for a nominal 12ms before being latched off. 3 ISL6436 Absolute Maximum Ratings Thermal Information Supply Voltage (VIN to GND). . . . . . . . . . . . . . . . . . . . . . . . . . . 6.0V EN, FAULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.3V to VIN 0.3V Output Current . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protected ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . . 3kV Thermal Resistance (Typical, Note 1) θJA (oC/W) 8 Lead SOIC Package . . . . . . . . . . . . . . . . . . . . . . . 116 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SSOP - Lead Tips Only) Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC Supply Voltage Range (Typical). . . . . . . . . . . . . . . . . . 2.7V to 5.5V CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Supply Voltages = 5V, TA = TJ = -40 to 85oC, Unless Otherwise Specified Electrical Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS POWER SWITCH ISL6436 On Resistance at 2.7V rDS(ON)_27 ISL6436 On Resistance at 3.3V rDS(ON)_33 ISL6436 On Resistance at 5.0V rDS(ON)_50 Disabled Output Voltage VOUT_DIS Vout Rising Rate t_vout_rt VIN = 2.7V, IOUT = 0.7A, TA = TJ = 25oC - 90 105 mΩ TA = TJ = 85oC - 115 130 mΩ VIN = 3.3V, IOUT = 0.7A, TA = TJ = 25oC - 80 100 mΩ TA = TJ = 85oC - 115 130 mΩ VIN = 5V, IOUT = 0.7A TA = TJ = 25oC - 80 95 mΩ TA = TJ = 85oC - 115 130 mΩ VIN = 5V, Switch Disabled, 50µA Load - 300 450 mV RL = 10Ω, CL = 0.1µF, 10%-90% - 10 - V/ms Slow Vout Turn-off Rate t_svout_offt RL = 10Ω, CL = 0.1µF, 90%-10% - 10 - V/ms Fast Vout Turn-off Rate t_fvout_offt RL = 1Ω, CL = 0.1µF, 90%-10% - 4 - V/µs CURRENT CONTROL Current Limit, VIN = 3.3V - 5V Ilim 0.75 1 1.25 A OC Regulation Settling Time tsettIlim RL = 5Ω, CL = 0.1µF to Within 10% of CR VOUT = 0.8V - 2 - ms tsettIlim_sev RL< 1Ω, CL = 0.1µF to Within 10% of CR - 100 - µs tOC_loff ISL6436X, TJ = 25oC - 10 - ms Fault Output Voltage Vfault_hi Fault IOUT = 10mA - - 0.4 V ENABLE High Threshold Ven_vih VIN = 5.5V 2.0 - - V ENABLE Low Threshold at 2.7V Ven_vil VIN = 2.7V - - 0.6 V ENABLE Low Threshold at 5.5V Ven_vil VIN = 5.5V Severe OC Regulation Settling Time Over Current Latch-off Time I/O PARAMETERS - - 0.8 V -0.5 - 0.5 µA Switches Closed, OUTPUT = OPEN, TJ >0oC - 120 200 µA Switches Open, OUTPUT = OPEN - 1 5 µA 1.7 2.25 2.5 V Ien_i ENABLE = 0V to 5V, VIN = 5V, TJ >25oC Enabled VIN Current IVDD Disabled VIN Current IVDD ENABLE Input Current BIAS PARAMETERS VIN Rising, Switch Enabled Undervoltage Lockout Threshold VUVLO UV Hysteresis UVHYS 50 100 - mV Temp_dis - 150 - oC Overtemperature Disable Introduction The ISL6436 is a fully independent dual channel overcurrent (OC) fault protection IC for the +2.5V to +5.5V environment. Each ISL6436 incorporates in a single 8 lead SOIC package two 80mΩ N-channel MOSFET power switches for power control. Independent enabling inputs and fault reporting outputs compatible with 3V and 5V logic allows for external control and 4 monitoring. This device features internal current monitoring, accurate current limiting, integrated power switches and current limited timed delay to latch-off for system protection. See Figure 1 for typical operational waveforms including both under and over current situations. Key Feature Description and Operation ISL6436 UV Lock Out The ISL6436 undervoltage lockout feature prevents functionality of the device unless the correct ENABLE state and VIN > 2.5V are present. Soft Start A constant 500nA current source ramps up the switch’s gate causing a voltage follower effect on the output voltage. This provides a soft start turn-on eliminating bus voltage drooping caused by in-rush current charging heavy load capacitances. Rising and falling outputs are current limited voltage ramps so that both the inrush current and voltage slew rate are limited, independent of load. This reduces supply droop due to surge and also eliminates the need for EMI filters necessary on other IC products. Fault Blanking On Start-Up During initial turn-on the ISL6436 prevents nuisance faults being reported to the system controller by blanking the fault signal for 12ms. This blanking eliminates the need for external RC filters necessary for other vendor products that assert a fault signal upon initial turn-on into a temporary high current condition. See Figures 10 through 12 for waveform examples. If, after the ISL6436 has latched off, and the fault has asserted and, the enable is not deasserted but the OC condition still exists, the ISL6436 unlike other IC devices does not send to the controller a continuous string of fault pulses. The ISL6436’s single fault signal is sent at the time of latch-off unlike other devices. Slow And Fast Shutdown The ISL6436 has two shutdown modes. When turned off with a load current less than the current regulation (CR) level the ISL6436 shuts down in a controlled manner using a 500nA constant current source controlled ramp. When latched off due to CR and the timer has expired, the ISL6436 quickly pulls down the output thereby quickly removing the faulted load from the voltage bus. See Figures 8 and 9 for waveforms of each mode. Active Output Pulldown Another unique ISL6436 feature is the active pull down on the outputs to 300mV above GND when the device is disabled. Competitors’ parts’ switch leakage causes the output voltage to drift up to VIN voltage even when the part is supposed to be disabled. Current Regulation The ISL6436 has integrated current sensing on the power MOSFET that allows for rapid control of OC events. Once an OC is detected the ISL6436 goes into its current regulation (CR) control mode. The ISL6436 CR level is set to a nominal 1A. This current regulation is ±25% over the full operating temperature and voltage bias range. See Figures 4 and 5 for illustrative curves. The speed of this control is inversely related to the magnitude of the OC fault. Thus a hard over current is more quickly controlled than a marginal OC condition. See Figure 6 for waveforms illustrating this and Figure 7 for an accompanying graph. Over Temperature Shutdown Although the ISL6436 has a thermal shutdown feature, because of the 12ms timed shutdown this will only be invoked in extremely high ambient temperatures. ON FAULT OFF ENABLE LATCH-OFF SET RESET BY ENABLE CURRENT REGULATION SETTLING TIME (1.4ms) VOUT OVER CURRENT 1A CURRENT LIMIT IOUT 12ms CURRENT REGULATION PERIOD FIGURE 1. TYPICAL OPERATIONAL WAVEFORMS Latch-Off Time Delay The primary function of any OC protection device is to quickly isolate the voltage bus from a faulty load. Unlike many other IC products that sense the IC thermal condition (the monitored IC junction temperature depends on a number of factors the most important of which are power dissipation of the faulted and adjacent switches and package temp) to isolate a faulty load, the ISL6436 uses an internal 12ms timer that starts upon OC detection. Once an OC condition is detected the appropriate output is current limited for a maximum of 12ms to allow transient conditions to pass before latch-off. This time to latch-off is independent of device thermal or adjacent switch condition. See Figure 18 for waveforms illustrating independent latch-off. 5 ISL6436 Typical Performance Curves ENABLE SWITCH ON RESISTANCE (mΩ) 120 110 100 10µF VIN = 2.7V 90 CL = 0.1µF VIN = 5V 80 70 60 CL = 100µF VIN = 3.3V OUTPUT 50 40 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TEMPERATURE (oC) TIME (400µs /DIV.) FIGURE 2. SWITCH ON RESISTANCE AT 0.7A FIGURE 3. VOUT SOFT START vs CLOAD, Rl =10Ω 3.1 1200 1200 -40oC -40oC 1100 1000 IOUT (mA) IOUT (mA) 1100 25oC 25oC 1000 85oC 900 900 85oC 800 800 1.25 1.5 1.75 2.0 2.25 VOUT (V) 2.5 2.75 3.0 1.3 1.5 2.0 2.5 3.0 3.5 4.0 4.5 4.8 VOUT (V) FIGURE 4. CURRENT REGULATION vs VOUT (VIN = 3.3V) FIGURE 5. CURRENT REGULATION vs VOUT (VIN = 5.0V) CURRENT REGULATED LEVEL NOMINAL CURRENT 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 TIME (200µs/DIV.) FIGURE 6. OC TO CR SETTLING TIME WAVEFORMS 6 TIME TO CURRENT REGULATION (ms) OUTPUT CURRENT (1A/DIV.) 1.6 1 2 3 4 5 6 7 8 9 FAULT CURRENT (A) FIGURE 7. CR SETTLING TIME vs FAULT CURRENT 10 ISL6436 Typical Performance Curves (Continued) ENABLE CL = 10µF CL = 10µF CL = 100µF CL = 100µF CL = 0.1µF VOUT VOUT CL = 0.1µF VOUT VOLTAGE (1V/DIV.) VOUT TIME (400µs /DIV.) VOUT VOLTAGE (1V/ DIV.) FIGURE 8. SLOW TURN -OFF vs C LOAD, Rl = 10Ω TIME (400µs /DIV.) FIGURE 9. FAST TURN-OFF vs CLOAD ENABLE FAULT ENABLE FAULT VOUT VOUT VOUT (1V/ DIV.) TIME (2ms /DIV.) FIGURE 10. ISL6436L TURN-ON INTO 1.5A OCS VOLTAGE (2V/DIV.) TIME (2ms /DIV.) FIGURE 11. ISL6436L TURN-ON INTO 1.5A MOMENTARY OC ENABLE VDD = 5.08V FAULT ISL6436 = 5.04 VOUT PPTC = 4.98 VOUT VOUT TIME (2ms /DIV.) FIGURE 12. VENDOR IC TURN-ON INTO MOMENTARY OC 7 VOUT (100mV/ DIV.) FIGURE 13. ISL6436 vs PPTC INTO 500mA LOAD ISL6436 Typical Performance Curves (Continued) PPTC PPTC 8s ISL6436 0.012s ISL6436 VOUT (1V/ DIV.) TIME (10ms/DIV.) FIGURE 14. ISL6436 vs PPTC PLUGGED ONTO 1.5A LOAD ENABLE VOUT (1V/DIV.) TIME (1s/DIV.) FIGURE 15. ISL6436 vs PPTC WITH EXTENDED 1.5A LOAD ENABLE ISL6436 COMP IC COMP IC ISL6436 VOUT (1V/ DIV.) TIME (1ms/DIV.) FIGURE 16. COMPARATIVE TURN-ON WAVEFORMS, Rl = 10Ω VOUT (1V/ DIV.) FIGURE 17. COMPARATIVE TURN-OFF WAVEFORMS VIN OUT 1 VOUT 2 = 3.7V IN CURRENT REGULATION OUT 2 VOLTAGE (1V/ DIV.) TIME (100µs/ DIV.) FIGURE 18. SWITCH FAULT INDEPENDENCE 8 TIME (2ms/ DIV.) ISL6436 Using the ISL6436EVAL1 Platform General and Biasing Information The ISL6436EVAL1 platform, Figure 19, allows evaluation of the ISL6436 dual power supply control IC and comparison against a suitably sized PPTC component. The evaluation platform is biased and monitored through numerous test points (TP#). See Table 1 for test point assignments and descriptions. TABLE 1. ISL6436EVAL1 TEST POINT ASSIGNMENTS TP # DESCRIPTION TP1 Eval Board and IC GND TP2 Eval Bd +5V Bias TP3 Enable Switch 1 TP4 Enable Switch 2 TP5 Switch 2 Fault TP6 Switch Out 2 TP7 Switch Out 1 TP8 Switch 1 Fault TP9 IC VIN Pin TP10 PPTC Load Side TP11 Invoke Overcurrent isolation evaluation in the presence of an OC condition can be evaluated. See Figure 18. The primary function of any OC protection device is to quickly isolate the voltage bus from a faulty load. Unlike the PPTC and other vendor available IC products, the ISL6436 internal timer that starts upon OC detection provides consistent protection that is not temperature dependent. See Figures 14 and 15 for a comparison of the time to protection offered by the ISL6436 vs the PPTC. Figure 14 illustrates the ISL6436 timed latch-off of 12mS with a 1.5A load and Figure 15 shows the 8s latch-off of the PPTC at approximately its trip current rating of 1.5A. Using the ISL6436USBEVAL1 Platform General and Biasing Information The ISL6436USBEVAL1 platform, Figure 20 allows evaluation of the ISL6436 dual power supply control IC in an USB environment. The evaluation platform is biased and monitored through numerous test points (TP#), see Table 2 for test point assignments and descriptions. TABLE 2. ISL6436USBEVAL1 TEST POINT ASSIGNMENTS Upon proper bias the PPTC, F1 has a nominal 500mA load current passing through it which is the hold current rating for that particular device. Removal of the PPTC is necessary to isolate the ISL6436 as the PPTC load current is common to the ISL6436EVAL1 bias connections. By enabling either or both of the ISL6436L switches by signaling TP3 and / or TP4 low (<0.6V) these switches are also loaded with a nominal 500mA current. See Figures 3 and 8 for typical ISL6436 turn-on and off waveforms. Provided test points enable the evaluation of voltage loss across the PPTC (TP9 - TP10) and the ISL6436 enabled switches (TP9 - TP6 and TP7). Expect to see 50% - 300% greater voltage loss across typical PPTCs devices than the ISL6436. See Figure 13 for a voltage loss comparison across ISL6436 and PPTC device. An overcurrent (OC) condition can be invoked on both the ISL6436 and the PPTC by driving TP11 to +6V, causing SW1 to close and a nominal 1.5A load is imposed. This represents a current over load to the ISL6436 and is thus quickly current regulated to the 1A limit. If the OC duration extends beyond the nominal 12ms of the internal ISL6436L timer then the output is latched off and the fault output is asserted by being pulled low turning on the appropriate FAULT LED, see Figure 10. (Please note: the labeling for FAULT-1 and FAULT-2 is reversed). The eval board is designed to only invoke an OC condition on channel 2 (TP4) so that a channel to channel 9 TP # DESCRIPTION TP1 Eval Board and IC GND TP2 Eval Bd +5V Bias TP3 Enable Switch 1 TP4 Enable Switch 2 TP5 Switch 1 Fault TP8 Switch 2 Fault Upon proper bias the ISL6436L is held off through pull up resistors on the enable pins and is enabled by signaling either or both of the ISL6436L switches TP3, and / or TP4 low (<0.6V). The USB connector is provided so that either test loads or USB peripherals can be powered. In addition, differential signalling (D+ and D-) access points are provided for each output port so that I/O activity can also be conducted in a prototype environment. ISL6436 C2 ISL6436EVAL1 D2 R1 D3 R6 R8 C3 C1 FAULT_OUT1 8 1 TP2 (VIN) 2 VIN R4 OUT1 7 ISL6436 TP3 3 EN1 OUT2 6 TP4 4 EN2 FAULT_OUT2 5 R2 D4 R7 R9 SW1 D1 C4 R5 R3 F1 D5 R10 FIGURE 19. ISL6436EVAL1 BOARD SCHEMATIC AND PHOTOGRAPH TABLE 3. ISL6436EVAL1 BOARD COMPONENT LISTING COMPONENT DESIGNATOR DUT1 COMPONENT FUNCTION COMPONENT DESCRIPTION ISL6436 Intersil, ISL6436LIB 3.3V Aux HotPlug Controller R1 - R3 500mA Nominal Load Resistors YAGEO, 10Ω, 5%, 5W, 10W-5-ND R4 - R5 1.5A Current Over Load Resistors YAGEO, 5Ω, 5%, 5W, 5W-5-ND R6 - R10 LED Current Limiting Resistor 470Ω, 0805 Decoupling Capacitor 0.1µF, 0805 C2 - C4 Load Capacitor 10µF 16V Electrolytic, Radial Lead D1 - D5 Indicating LEDs 0805, SMD LEDs Red F1 PPTC (Polymer Positive Temperature Coefficient) Raychem, Poly Switch, RXE075 or Equivalent SW1(Q1) Current Over Load Invoking Switch Access TP11 Intersil, ITF86110DK8T, 7.5A, 30V, 0.025Ω, Dual N-channel, Logic Level Power MOSFET C1 10 ISL6436 ISL6436USBEVAL1 C1 1 VIN 2 FAULT_OUT 8 OUT 7 VIN R1 ISL6436 3 EN OUT 6 4 EN FAULT_OUT 5 R2 C3 C2 L1 L3 1 23 4 1 23 4 L2 L4 CON1 FIGURE 20. ISL6436USBEVAL BOARD TABLE 4. COMPONENT DESIGNATOR COMPONENT NAME COMPONENT DESCRIPTION ISL6436USBEVAL1 DUT1 ISL6436L Intersil, ISL6436L 5V USB HotPlug Controller C1 Chip Decoupling Capacitor 0.1µF, 0805 C2 - C3 V+ Decoupling Capacitors 100µF 16V Electrolytic, Radial Lead L1 - L4 V+ And GND Stability Inductors 220nH, 0805 (OPTIONAL FOR IMPLEMENTATION) CON1 Dual Stacked USB Type A Connector ASSMANN, AU-Y1008 or Equivalent Pull-Up Resistors 1.2Ωk, 0805 R1 - R2 11 ISL6436 Small Outline Plastic Packages (SOIC) M8.15 (JEDEC MS-012-AA ISSUE C) N INDEX AREA 0.25(0.010) M H 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE B M E INCHES -B- 1 2 SYMBOL 3 L SEATING PLANE -A- h x 45o A D -C- µα e A1 B 0.25(0.010) M C C A M B S MAX MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.1890 0.1968 4.80 5.00 3 E 0.1497 0.1574 3.80 4.00 4 e 0.10(0.004) 0.050 BSC 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 1.27 BSC H 0.2284 0.2440 5.80 h 0.0099 0.0196 L 0.016 0.050 8o 0o N NOTES: MILLIMETERS MIN α - 0.25 0.50 5 0.40 1.27 6 8 0o - 6.20 8 7 8o Rev. 0 12/93 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. 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