HS-2520RH TM Data Sheet July 2001 Radiation Hardened Uncompensated, High Slew Rate Operational Amplifier File Number 3599.3 Features • Electrically Screened to SMD # 5962-95685 The HS-2520RH is a radiation hardened monolithic operational amplifier which delivers an unsurpassed combination of specifications for slew rate, bandwidth and settling time. This dielectrically isolated amplifier is designed for closed loop gains of 3 or greater without external compensation. In addition, this high performance component also provides low offset current and high input impedance. The 100V/µs (Min) slew rate and fast settling time of this amplifier makes it an ideal component for pulse amplification and data acquisition designs. To insure compliance with slew rate and transient response specifications, all devices are 100% tested for AC performance characteristics over full temperature. This device is a valuable component for RF and video circuitry requiring wideband operation. For accurate signal conditioning designs, the HS-2520RH superior dynamic specifications are complemented by 25nA (Max) offset current and offset voltage trim capability. Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed here must be used when ordering. Detailed Electrical Specifications for these devices are contained in SMD 5962-95685. A “hot-link” is provided on our homepage for downloading. www.intersil.com/spacedefense/space.asp • QML Qualified per MIL-PRF-38535 Requirements • High Slew Rate . . . . . . . . . . .100V/µs Min, 120V/µs (Typ) • Wide Power Bandwidth . . . . . . . . . . . . . . . . 1.5MHz (Min) • Wide Gain Bandwidth . . . . . . . 10MHz Min, 20MHz (Typ) • High Input Impedance . . . . . . . . 50MΩ Min, 100MΩ (Typ) • Low Offset Current . . . . . . . . . . . . . 25nA Min, 10nA (Typ) • Fast Settling (0.1% of 10V Step) . . . . . . . . . . 200ns (Typ) • Low Quiescent Supply Current . . . . . . . . . . . . 6mA (Max) • Gamma Dose . . . . . . . . . . . . . . . . . . . . . . 1 x 104RAD(Si) Applications • Data Acquisition Systems • RF Amplifiers • Video Amplifiers • Signal Generators • Pulse Amplifiers Ordering Information INTERNAL MKT. NUMBER ORDERING NUMBER TEMP. RANGE (oC) HS0-2520RH-Q HS0-2520RH-Q 25 5962D9568501VGA HS2-2520RH-Q -55 to 125 5962D9568501VPA HS7-2520RH-Q -55 to 125 5962D9568501VPC HS7B-2520RH-Q -55 to 125 Pinouts HS7-2520RH (CERDIP) GDIP1-T8 OR HS7B-2520RH (SBDIP) CDIP2-T8 TOP VIEW HS2-2520RH (CAN) MACY1-X8 TOP VIEW COMP BAL 1 -IN 2 +IN 3 V- 8 + 4 COMP 7 V+ 6 OUT 5 8 BAL IN- 1 7 - 2 V+ 6 + OUT BAL IN+ 5 3 BAL 4 V- 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2001, All Rights Reserved HS-2520RH Timing Waveforms VIN VOUT + - 50 1.33K 50pF 667 FIGURE 1. SIMPLIFIED TEST CIRCUIT +1.67V +67mV INPUT 0V INPUT -67mV 0V -1.67V +5V OVERSHOOT 75% +200mV 90% OUTPUT 10% ∆V OUTPUT 25% -5V ∆T SLEW RATE = ∆V/∆T 0V RISE TIME FIGURE 2. SLEW RATE WAVEFORM FIGURE 3. TRANSIENT RESPONSE WAVEFORM NOTE: Measured on both positive and negative transitions. Capacitance at Compensation pin should be minimized. Typical Performance Curves TA = 25oC, VSUPPLY = ±15V, Unless Otherwise Specified 120 100 VS = ±15 EQUIVALENT INPUT NOISE (µV) CURRENT (nA) 100 BIAS CURRENT 80 60 40 20 OFFSET CURRENT 0 -20 -50 -55 -25 0 25 50 75 100 TEMPERATURE (oC) FIGURE 4. INPUT BIAS AND OFFSET CURRENT vs TEMPERATURE 2 125 10K SOURCE RESISTANCE 10 0 SOURCE RESISTANCE 1.0 THERMAL NOISE OF 10K RESISTOR 0.1 100Hz 1kHz 10kHz 100kHz 1MHz UPPER 3dB FREQUENCY, LOWER 3dB FREQUENCY (10Hz) FIGURE 5. EQUIVALENT INPUT NOISE vs BANDWIDTH HS-2520RH Typical Performance Curves TA = 25oC, VSUPPLY = ±15V, Unless Otherwise Specified (Continued) 120 VS = ±15 OPEN LOOP VOLTAGE GAIN (dB) NORMALIZED PARAMETERS REFFERED TO VALUES AT ±25oC 1.3 1.2 1.1 SLEW RATE BANDWIDTH 1.0 SLEW RATE BANDWIDTH 0.9 0.8 -50 -55 -25 0 25 50 75 100 PHASE 60 40 GAIN 20 0 10 125 100 1K TEMPERATURE (oC) 10K 100K 1M 10M 100M FREQUENCY (Hz) FIGURE 6. NORMALIZED AC PARAMETERS vs TEMPERATURE FIGURE 7. OPEN-LOOP FREQUENCY AND PHASE RESPONSE 120 OPEN LOOP VOLTAGE GAIN (dB) 1.1 NORMALIZED PARAMETERS REFERRED TO VALUES AT ±15V 80 -20 0.7 SLEW RATE BANDWIDTH 1.0 BANDWIDTH SLEW RATE 0.9 100 0pF 80 30pF 60 40 100pF 20 300pF 0 1000pF -20 0.8 ±10 ±15 SUPPLY VOLTAGE 10 ±20 35 PEAK-TO-PEAK VOLTAGE SWING VS = ±20 86 VS = ±15 85 VS = ±10 1K 10K 100K 1M 10 FIGURE 9. OPEN-LOOP FREQUENCY RESPONSE FOR VARIOUS VALUES OF CAPACITORS FROM BANDWIDTH CONTROL PIN TO GROUND 88 87 100 FREQUENCY (Hz) FIGURE 8. NORMALIZED AC PARAMETERS vs SUPPLY VOLTAGE AT 25oC GAIN (dB) 100 84 83 82 VS = ±20 30 25 VS = ±15 20 15 VS = ±10 10 5 0 -50 -55 -25 0 25 50 75 100 125 TEMPERATURE (oC) FIGURE 10. OPEN-LOOP VOLTAGE GAIN vs TEMPERATURE 3 10K 100K 1MEG 10MEG FREQUENCY (Hz) FIGURE 11. OUTPUT VOLTAGE SWING vs FREQUENCY AT 25oC 10M HS-2520RH Typical Performance Curves TA = 25oC, VSUPPLY = ±15V, Unless Otherwise Specified (Continued) 4.8 RL = 2kΩ CL = 50pF CURRENT (nA) 4.6 4.4 VS = ±20 UPPER TRACE: INPUT; 1.67V/DIV 10 LOWER TRACE: OUTPUT; 5V/DIV VS = ±15 4.2 VS = ±10 4.0 3.8 TA = 25oC VS = +15V 3.6 -25 0 25 50 75 100 125 TEMPERATURE (oC) HORIZONTAL = 100ns/DIV FIGURE 12. POWER SUPPLY CURRENT vs TEMPERATURE FIGURE 13. VOLTAGE FOLLOWER PULSE RESPONSE 1000 INPUT NOISE VOLTAGE (nV√Hz) 120 POWER SUPPLY REJECTION RATIO (dB) 100 80 60 NEGATIVE SUPPLY POSITIVE SUPPLY 40 20 0 100kHz 10 INPUT NOISE CURRENT 10 100 INPUT NOISE VOLTAGE 10 1 1 1kHz 10kHz 100kHz 1MHz 0.1 1 10 100 1K 10K 100K FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 14. POWER SUPPLY REJECTION RATIO vs FREQUENCY FIGURE 15. INPUT NOISE DENSITY vs FREQUENCY Suggested VOS Adjustment V+ 20kΩ RT IN BAL OUT V- NOTE: Tested offset adjustment range is | VOS +1mV | minimum referred to output. Typical range is +20mV to -18mV with RT = 20kΩ. 4 INPUT NOISE CURRENT (pA√Hz) -50 -55 HS-2520RH Burn-In Circuits HS7-2520 CERDIP HS2-2520 METAL CAN V+ C3 C1 8 1 2 R1 3 1 6 7 V+ 7 + 4 VD2 8 C1 - 2 D1 6 + C3 5 5 3 C2 4 R1 C2 D2 V- NOTES: NOTES: 1. R1 = 1MΩ, ±5%, 1/4W (Min) 6. R1 = 1MΩ, ±5%, 1/4W (Min) 2. C1 = C2 = 0.01µF/Socket (Min) or 0.1µF/Row (Min) 7. C1 = C2 = 0.01µF/Socket (Min) or 0.1µF/Row (Min) 3. C3 = 0.01µF (±10%)/Socket 8. C3 = 0.01µF (±10%)/Socket 4. D1 = D2 = 1N4002 or equivalent (per board) 9. D1 = D2 = 1N4002 or equivalent (per board) 5. |(V+) - (V-)| = 31V 10. |(V+) - (V-)| = 31V Irradiation Circuits IRRADIATION CIRCUIT C 1 BAL COMP 8 V+ 1MΩ -5% (1/4W MIN) V2 VC NOTES: 11. V1 = +15V ±10% 12. V2 = -15V ±10% 13. C = 0.1µF ±10% 5 2 -IN V1 7 3 +IN OUT 6 4 BAL 5 C D1 HS-2520RH Schematic Diagram OFFSET OFFSET V+ R21 200 Q30 R2B 200 R2A 1.8K R2B 1.8K R20 200 R12 2K R11 4K Q29 Q28 R2A 200 Q15 R13 2K Q3A Q3B R16 960 Q4A Q4B R17 30 Q13B Q27 BW CONTROL Q12A Q23 C1 1pF Q16 R9 1.1K Q8 OUTPUT R18 30 Q11B Q12B Q13A R15 11.13K Q1A +INPUT Q2A Q17 Q1B R1A 1.68K R1B 1.68K Q11A Q7 Q2B Q24 Q21A R6A 3K Q31 Q25 Q21B Q22 Q6 Q9 R6B 3K Q5B Q5A Q26 Q10 Q14 Q18 Q19 R3A 1.48K R3B 1.48K R19 1.48K R10 740 Q20 V-INPUT 6 HS-2520RH Die Characteristics DIE DIMENSIONS: ASSEMBLY RELATED INFORMATION: 67 mils x 57 mils x 19 mils (1700µm x 1440µm x 483µm) INTERFACE MATERIALS: Substrate Potential (Powered Up): Unbiased ADDITIONAL INFORMATION: Glassivation: Type: Nitride (Si3N4) over Silox (Si02, 5% Phos.) Silox Thickness: 12kÅ ±2kÅ Nitride Thickness: 3.5kÅ ±1.5kÅ Worst Case Current Density: 0.26 x 105 A/cm 2 Transistor Count: Top Metallization: 40 Type: Al, 1% Cu Thickness: 16kÅ ±2kÅ Substrate: Bipolar Dielectric Isolation Backside Finish: Silicon Metallization Mask Layout HS-2520RH All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 7