5 4 3 2 1 XO3L Breakout Board Revision B May, 2014 D D LEDS(1-4) PMOD RGB LED Header I/Os FPGA LCMXO3L-6900C-6BG256C U7 I/Os SMA OUTPUT C BANK 0 & 5 BANK 2 & 3 Header SMA INPUT BANK 1 I/Os C BANK 4 I/Os SPI FLASH Optional I2C Configuration PMOD USB to JTAG USB CONNECTOR USB to I2C Optional JTAG Configuration I/Os FPGA LCMXO3L-2100E-6UWG49CTR U9 I/Os MIPI_OUTPUT B MIPI_INPUT B A A Lattice Semiconductor Applications Email: [email protected] Title Block Diagram Size C Date: 5 4 3 2 Project MachXO3L DSI Breakout Board May, 2014 Sheet 1 Schematic Rev B Board Rev 1 of 7 B 5 4 3 2 1 D D 3.3V FB4 3.3V C7 C8 C9 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF FB_60ohm PART_NUMBER = HI0603P600R-10 Manufacturer = Laird-signal 3.3V 1 C6 C1 C2 4.7uF 0.1uF Optional JTAG Header when VCCIO is 2.5V R211 R212 R213 4.7K 4.7K 4.7K VCCIO 2 C5 VCCIO J1 FB5 2 1 FB_60ohm PART_NUMBER = HI0603P600R-10 Manufacturer = Laird-signal C3 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 header_1x8 DNI C4 4.7uF 0.1uF 3.3V FTDI_TDO FTDI_TDI [Pg7] [Pg5] FTDI_TMS [Pg5,7] FTDI_TCK [Pg5,7] R220 49 [Pg3] [Pg3] C10 C11 10uF 0.1uF DM DP 7 8 R218 1K 14 R221 12K 6 VCCIO VCCIO VCCIO VCCIO 4 9 VPHY VPLL 50 C VCORE VCORE VCORE 12 37 64 U1 FT2232HL 3.3V 20 31 42 56 1K TP6 ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 VREGIN VREGOUT DM DP ACBUS0 ACBUS1 ACBUS2 ACBUS3 ACBUS4 ACBUS5 ACBUS6 ACBUS7 RESET# 3.3V 3.3V R16 10K R17 10K R18 10K 63 62 61 U2 C12 0.1uF 8 7 6 5 VCC NU ORG VSS CS CLK DI DO 1 2 3 4 2 R219 1K REF EECS EECLK EEDATA BDBUS0 BDBUS1 BDBUS2 BDBUS3 BDBUS4 BDBUS5 BDBUS6 BDBUS7 OSCI X1 93LC56-SO8 1 2 C13 18pF 1 3 G1 G2 12MHZ 3 3 OSCO 4 C14 18pF 13 TEST FTDI High-Speed USB 10 26 27 28 29 30 32 33 34 0 0 0 0 R5 R6 R7 R8 0 0 0 R203 R204 R205 DNI DNI DNI R11 R12 R13 C VCCIO R216 R217 1K 1K 38 39 40 41 43 44 45 46 48 52 53 54 55 57 58 59 DNL DNL DNL SCL_2 SDA_2 [Pg7] [Pg7] SCL_1 SDA_1 [Pg5] [Pg5] Optional I2C Configuration 60 36 GND GND GND GND GND GND GND GND B PWREN# SUSPEND# 1 5 11 15 25 35 47 51 AGND FT2232H BCBUS0 BCBUS1 BCBUS2 BCBUS3 BCBUS4 BCBUS5 BCBUS6 BCBUS7 16 17 18 19 21 22 23 24 J50 XO3L_2100E_TDO FTDI_TDO B 1 4 XO3L_6900C_TDI 2 5 FTDI_TDI 6 XO3L_6900C_TDO 3 XO3L_2100E_TDI Value = 3X2_HEADER DEFAULT_OPTION = 1&4 and 3&6 A A Lattice Semiconductor Applications Email: [email protected] Title USB to JTAG Size C Date: 5 4 3 2 Project MachXO3L DSI Breakout Board May, 2014 Sheet 1 Schematic Rev B Board Rev 2 of 7 B 5 4 3 2 1 Test Points TP1 12V 1 D D TP_LOOP_RED TP3 5V 1 TP_LOOP_RED TP5 1 TP_LOOP_BLACK 12V Power Options 1) External 12V DC Supply 2) Signet Main Board Connector 5V Power Options 1) Regulated 5V Supply 2) USB 5V 5V_Reg 12V DC JACK PWR Jack_12V MIPI_VCC_12V_IN D1 5V VBUS_5V Current Sense TP 5V Rail 5V 1 2 3 U5 3.31V 3.3V TP33H TP33L 3.3V Rail R36 J2 18 17 14 13 R30 RB496EA D2 1K 12V 1 RB496EA D3 Green C16 C27 R39 R40 20 10uF 1M 1M 11 L1 C 0.1uF J3 1 2 3 4 5 OUT1_2 BYP1 SHDN2 ADJ1 12 R31 0 C17 0.1uF DM DP [Pg2] [Pg2] R37 2 C29 R38 10uF 127 0.1 0.1 OHM 1/2W 1% 0805 357K R41 C30 C26 22uF 0.1uF 210K C 1 TP12H TP12L 1.2V R42 PWRGD1 1.2V Rail 7 OUT2_1 PWRGD2 8 OUT2_2 C40 C38 R43 4.7uF 127 0.1 0.1 OHM 1/2W 1% 0805 C39 0.01uF 21 THERMPAD 9 BYP2 GND4 GND2 GND1 GND3 6 5 15 16 22uF 10 ADJ2 USB Power U11 C25 0.01uF SHDN1 SKT_MINIUSB_B_RA 12V 4 1.22V 19 VCC DD+ ID GND 3 OUT1_1 2 600 Ohm 500 mA IN1_1 IN1_2 IN2_1 IN2_2 LT3030EFE#TRPBF 5V_Reg LT3680 4 C20 10uF 5 9 VIN BD R229 15K B 7 R230 34K 6 BOOST 8 R232 100K 5V PG 0.47uF SW SYNC Current Sense TP 2 3.3V C128 EPAD C127 680pF VCCIO Select - 3.3V Default - 2.5V Optional 536K VC RT C129 47uF R231 FB 10 1 RUN_SS 2.5V U6 2.5V TP25H TP25L 2.5V Rail R44 L3 R32 3 0 4.7uH 18 17 14 13 R33 DNI 11 LT3680 Manufacturer = Linear PART_NUMBER = LT3680EDD#PBF 2.51V VCCIO D12 Manufacturer = ON Semi PART_NUMBER = MBRA340T3G C45 10uF R46 1M R47 1M 20 11 IN1_1 IN1_2 IN2_1 IN2_2 OUT1_1 OUT1_2 3 4 C44 R48 BYP1 SHDN2 ADJ1 2 255K R49 0.1 R45 0.1 OHM 1/2W 1% 0805 C48 C49 10uF 127 22uF 0.1uF 243K 1 1.81V 19 12 OUT2_1 PWRGD2 BYP2 8 C57 GND3 R51 1.8V 1.8V Rail 0.1 C58 R52 4.7uF 127 113K C59 0.1 OHM 1/2W 1% 0805 9 R53 22uF 237K 10 GND4 6 5 15 GND2 ADJ2 GND1 TP18L 7 0.01uF THERMPAD 16 TP18H R50 PWRGD1 OUT2_2 21 B C43 0.01uF SHDN1 LT3030EFE#TRPBF A A Lattice Semiconductor Applications Email: [email protected] Title Board Power Size C Date: 5 4 3 2 Project MachXO3L DSI Breakout Board May, 2014 Sheet 1 Schematic Rev B Board Rev 3 of 7 B 5 4 3 2 1 MIPI RX Termination Place resistors as close to the bank 2 pins on XO3 as possible. Arrange them so they do not influence the *HS* trace path. Match trace length for all P and N signals. Match lengths between HS signals, match lengths between LP signals. U7C SMA Connectors 3 2 2 3 5 2 4 4 3 5 2 3 5 2 5 4 3 3 2 5 5 4 4 2 3 2 5 CLKIN1_HS_N [Pg4] DIN0_HS_N [Pg4] J11 SMA73391-0060 2 J9 SMA73391-0060 3 [Pg4] 4 5 3 2 4 1 5 DIN0_HS_P 1 DIN1_HS_P [Pg4] DIN1_HS_N [Pg4] 1 4 1 2 J10 SMA73391-0060 0 N5 N12 3 DNI 1 1 5 R222 1 C J12 SMA73391-0060 1 4 5 2 3 1 4 5 3 2 4 J14 SMA73391-0060 3 4 LCMXO3L-6900C-6BG256C 3 1 DIN2_HS_P [Pg4] J13 SMA73391-0060 1 DIN2_HS_N [Pg4] J15 SMA73391-0060 DIN4_HS_P [Pg4] J18 SMA73391-0060 DIN4_HS_N [Pg4] J20 SMA73391-0060 DIN6_HS_P [Pg4] J22 SMA73391-0060 DIN6_HS_N [Pg4] J24 SMA73391-0060 2 3 2K/4K/7K || 2nd_Fn. 3 C66 C67 C61 0.1uF 0.1uF 1uF 0.1uF 0.1uF 2 VCCIO2/VCCIO2/VCCIO2 VCCIO2/VCCIO2/VCCIO2 [Pg4] 1 4 VCCIO 1 5 MOSI_256 T15 R14 J8 SMA73391-0060 Pull-up resistor R62 is for cases where I2C is used. If I2C is not used for programming this pull-up is not required. R62 4.7K 4 R12 P13 3 [Pg4] [Pg4] 3 VCCIO2/VCCIO2/VCCIO2 VCCIO2/VCCIO2/VCCIO2 3 DIN6_HS_P DIN6_HS_N 1 5 C64 4 [Pg4] VCCIO [Pg4] P12 T13 4 C63 C K8 K9 4 [Pg4] [Pg4] DIN4_HS_P DIN4_HS_N 5 PB25C/PB30C/PB38C PB25D/PB30D/PB38D D 1 4 PB25A/PB30A/PB38A || SN PB25B/PB30B/PB38B || SI/SISPI PB12C/PB15C/PB18C PB12D/PB15D/PB18D DIN2_HS_P DIN2_HS_N R11 T12 R64 PB12A/PB15A/PB18A PB12B/PB15B/PB18B [Pg4] [Pg4] [Pg4] 2 P8 T8 N8 L9 R13 T14 J7 [Pg4] SMA73391-0060 3 R61 PB24A/PB29A/PB37A PB24B/PB29B/PB37B CLKIN1_HS_P 1 DIN3_HS_P [Pg4] DIN3_HS_N [Pg4] DIN5_HS_P [Pg4] 2 51 PB11A/PB13A/PB16A || PCLKT2_0 PB11B/PB13B/PB16B || PCLKC2_0 PIO_M10 PIO_N11 CLKIN0_HS_N 3 T7 R8 1 1 1 5 R60 M10 N11 1 4 PB22A/PB27A/PB35A PB22B/PB27B/PB35B 1 5 PB22C/PB26A/PB34A PB22D/PB26B/PB34B PB11C/PB12A/PB15A PB11D/PB12B/PB15B J6 SMA73391-0060 4 51 [Pg4] CLKIN1_LP_P [Pg4] CLKIN1_HS_P [Pg4] CLKIN1_HS_N [Pg4] CLKIN1_LP_N [Pg4] PIO_P8 [Pg4] PIO_T8 PB21C/PB24C/PB31C PB21D/PB24D/PB31D PB9C/PB10C/PB13C PB9D/PB10D/PB13D 1 2 M6 L8 PIO_M6 PIO_L8 PB9A/PB10A/PB13A PB9B/PB10B/PB13B J5 [Pg4] SMA73391-0060 3 M7 N7 [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] 5 R59 T11 P11 PIO_N10 PIO_M11 DIN0_LP_P DIN0_HS_P DIN0_HS_N DIN0_LP_N 4 51 PB21A/PB24A/PB31A PB21B/PB24B/PB31B R57 2 R7 P7 PB8A/PB9A/PB12A || MCLK/CCLK PB8B/PB9B/PB12B || SO/SPISO R56 51 3 R58 51 P10 R10 CLKIN0_HS_P 2 [Pg4] [Pg4] P6 T6 51 PB19A/PB23A/PB29A PB19B/PB23B/PB29B 3 SCLK_256 MISO_256 DIN1_LP_P DIN1_HS_P DIN1_HS_N DIN1_LP_N PIO_M7 PIO_N7 PB19C/PB23C/PB28A PB19D/PB23D/PB28B PB8C/PB9C/PB10A PB8D/PB9D/PB10B 1 [Pg4] [Pg4] 5 [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] PB6A/PB7A/PB9A PB6B/PB7B/PB9B PIO_M9 PIO_L10 N10 M11 1 4 N6 L7 M9 L10 J4 SMA73391-0060 5 DIN3_HS_P DIN3_HS_N PB18C/PB21C/PB26C PB18D/PB21D/PB26D R55 4 DIN5_HS_P DIN5_HS_N [Pg4] [Pg4] PB6C/PB6A/PB7A PB6D/PB6B/PB7B R54 51 2 [Pg4] [Pg4] T5 R6 51 3 T3 R4 R9 T10 T9 P9 2 DIN7_HS_P DIN7_HS_N [Pg4] [Pg4] PB18A/PB21A/PB26A PB18B/PB21B/PB26B 3 D PB5A/PB4A/PB6A || CSSPIN PB5B/PB4B/PB6B 5 R5 P5 PB16A/PB20A/PB23A || PCLKT2_1 PB16B/PB20B/PB23B || PCLKC2_1 4 SSn_256 PB16C/PB18A/PB21A PB16D/PB18B/PB21B PB3C/PB3C/PB4C PB3D/PB3D/PB4D 5 [Pg4] PB3A/PB3A/PB4A PB3B/PB3B/PB4B 2 T2 R3 [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] 2 PIO_T2 PIO_R3 PIO_M8 PIO_N9 CLKIN0_LP_P CLKIN0_HS_P CLKIN0_HS_N CLKIN0_LP_N PIO_R9 PIO_T10 5 [Pg4] [Pg4] M8 N9 2 P4 T4 5 PIO_P4 PIO_T4 2 BANK2 [Pg4] [Pg4] XO3L Configuration SPI Flash DIN1_LP_P DIN1_LP_N K5 L4 PL11C/PL16C/PL19C PL11D/PL16D/PL19D PL12C/PL17C/PL21C PL12D/PL17D/PL21D 3 2 5 4 4 5 5 2 4 4 3 5 2 3 2 2 3 5 5 4 2 4 1 PL14A/PL20A/PL25A PL14B/PL20B/PL25B 1 DIN5_HS_N [Pg4] CLKIN0_LP_P CLKIN0_LP_N M2 N3 DIN0_LP_P DIN0_LP_N [Pg4] [Pg4] DIN7_HS_P [Pg4] DIN7_HS_N [Pg4] 3 2 5 5 2 4 4 3 5 2 1 2 3 1 5 1 4 4 3 3 1 1 1 5 M3 N1 1 4 PL13A/PL19A/PL24A PL13B/PL19B/PL24B J23 SMA73391-0060 N2 P1 4 PL13C/PL18C/PL23C PL13D/PL18D/PL23D 4 PL11A/PL16A/PL19A PL11B/PL16B/PL19B PL14C/PL20C/PL25C PL14D/PL20D/PL25D L2 M1 2 3 1 4 [Pg4] [Pg4] A K4 L5 1 DNI BANK3 CLKIN1_LP_P CLKIN1_LP_N 5 4 1 HEADER 12X2 M25PX16-VMN6TP U7D [Pg4] [Pg4] 1 B J19 SMA73391-0060 J21 SMA73391-0060 L1 L3 1 3 7 [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] 5 HOLD PIO_M8 PIO_N9 PIO_R9 PIO_T10 PIO_M9 PIO_L10 PIO_N10 PIO_M11 PIO_M10 PIO_N11 4 CS PIO_P4 PIO_T4 PIO_T2 PIO_R3 PIO_P8 PIO_T8 PIO_M7 PIO_N7 PIO_M6 PIO_L8 2 WP [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] [Pg4] 3 R194 1k [Pg4] 2 1 MISO_256 3 SSn_256 2 5 [Pg4] SDO SCK 4 C130 30pF DNI 8 R195 3 Place close to U10 SDI VCC R197 R196 1k 6 20 U10 1 3 5 7 9 11 13 15 17 19 21 23 1 2 R227 5 2 4 6 8 10 12 14 16 18 20 22 24 1 5 SCLK_256 MOSI_256 J17 SMA73391-0060 3.3V J16 5 [Pg4] [Pg4] 3.3V GND Place close to U7 1k B 10K 0.1uF Place close to U10 IO Header C122 3 3.3V [Pg4] [Pg4] A R1 P2 1.2V PL12A/PL17A/PL22A || PCLKT3_0 PL12B/PL17B/PL22B || PCLKC3_0 0 R65 VCCIO3/VCCIO3/VCCIO3 Lattice Semiconductor Applications Email: [email protected] M4 C70 C71 0.1uF 1uF 2K/4K/7K || 2nd_Fn. Title DSI: SMA_INPUT LCMXO3L-6900C-6BG256C Size C Date: 5 4 3 2 Project MachXO3L DSI Breakout Board May, 2014 Sheet 1 Schematic Rev B Board Rev 4 of 7 B 5 4 3 SMA Connectors 2 1 MIPI TX Termination 1 DNI R73 CLKOUT0_HS_N [Pg5] CLKOUT0_LP_N DNI R67 330 30 R76 R69 30 330 R71 CLKOUT1_N [Pg5] [Pg5] R75 330 30 R77 CLKOUT1_LP_P CLKOUT1_HS_P CLKOUT1_HS_N CLKOUT1_LP_N U7A [Pg5] [Pg5] 1 DOUT0_HS_N [Pg5] [Pg5]DOUT1_N DOUT0_LP_N [Pg5] R83 30 330 R85 DOUT1_LP_P DOUT1_HS_P [Pg5] [Pg5] R89 330 30 R91 DOUT1_HS_N DOUT1_LP_N [Pg5] [Pg5] 3 PT11A*/PT11A*/PT11A* PT11B*/PT11B*/PT11B* PT19C/PT22A*/PT26A* PT19D/PT22B*/PT26B* PT11C/PT12A*/PT12A* PT11D/PT12B*/PT12B* PT20A*/PT23A*/PT27A* PT20B*/PT23B*/PT27B* PT12A*/PT13A*/PT14A* PT12B*/PT13B*/PT14B* PT20C/PT23C/PT27C || JTAGENB PT20D/PT23D/PT27D || PROGRAMN XO3L_6900C_TDO XO3L_6900C_TDI DOUT4_HS_P DOUT4_HS_N B7 C7 [Pg5] [Pg5] DOUT2_HS_P DOUT2_HS_N E6 D7 [Pg5] [Pg5] DOUT0_HS_P DOUT0_HS_N F7 E8 FTDI_TCK FTDI_TMS A7 B8 CLKOUT0_HS_P CLKOUT0_HS_N C8 A8 [Pg5] [Pg5] D8 E9 [Pg2,7] [Pg2,7] PIO_D8 PIO_E9 PT12C/PT13C/PT14C || TDO PT12D/PT13D/PT14D || TDI PT21A*/PT24A*/PT28A* PT21B*/PT24B*/PT28B* PT13A*/PT14A*/PT15A* PT13B*/PT14B*/PT15B* PT21C/PT24C/PT32A* PT21D/PT24D/PT32B* PT13C/PT14C/PT16A* PT13D/PT14D/PT16B* PT22A*/PT25A*/PT33A* PT22B*/PT25B*/PT33B* PT16A*/PT15A*/PT17A* PT16B*/PT15B*/PT17B* PT22C/PT26A*/PT34A* PT22D/PT26B*/PT34B* PT16C/PT15C/PT17C || TCK PT16D/PT15D/PT17D || TMS PT23A*/PT27A*/PT35A* PT23B*/PT27B*/PT35B* PT17A*/PT18A*/PT18A* || PCLKT0_1 PT17B*/PT18B*/PT18B* || PCLKC0_1 PT24A*/PT28A*/PT36A* PT24B*/PT28B*/PT36B* PT17C/PT19A*/PT21A* PT17D/PT19B*/PT21B* PT24C/PT28C/PT36C || INITN PT24D/PT28D/PT36D || DONE A9 C9 [Pg5] [Pg5] SCL_1 SDA_1 [Pg2] [Pg2] B9 A10 PIO_B9 PIO_A10 [Pg5] [Pg5] F9 E11 PIO_F9 PIO_E11 [Pg5] [Pg5] D10 E10 PIO_D10 PIO_E10 [Pg5] [Pg5] PIO_C10 [Pg5] C10 B10 A11 C11 F10 D11 VCCIO DOUT7_HS_P DOUT7_HS_N PIO_F10 [Pg5] [Pg5] 100K C123 DNL 10uF [Pg5] B11 A12 DOUT5_HS_P DOUT5_HS_N [Pg5] [Pg5] B13 A14 DOUT3_HS_P DOUT3_HS_N [Pg5] [Pg5] C12 B12 DOUT1_HS_P DOUT1_HS_N [Pg5] [Pg5] B14 A15 CLKOUT1_HS_P CLKOUT1_HS_N A13 C13 VCCIO R95 5 [Pg5] R97 C73 DNI DNI R103 R104 DOUT2_HS_N [Pg5] [Pg5]DOUT3_N 330 DOUT2_LP_N [Pg5] 30 R106 R109 DNI R102 DOUT2_N R108 DOUT3_N 1 DNI R96 DNI R98 DOUT2_LP_P [Pg5] 30 DOUT2_HS_P [Pg5] [Pg5] DOUT3_P 330 R100 DOUT2_P DNI 3 PT19A*/PT21A*/PT25A* PT19B*/PT21B*/PT25B* 2 2 3 C6 A6 D5 D12 2 3 4 D6 E7 [Pg5] [Pg5] 1 4 J36 [Pg5] SMA73391-0060 A3 B4 PT18C/PT20C/PT22C || SCL/PCLKT0_0 PT18D/PT20D/PT22D || SDA/PCLKC0_0 PT10A*/PT10A*/PT10A* PT10B*/PT10B*/PT10B* PIO_F8 PIO_D9 [Pg5] [Pg5] C R99 DOUT3_LP_P 30 DOUT3_HS_P 330 R101 [Pg5] [Pg5] R105 330 30 R107 [Pg5] [Pg5] DOUT3_HS_N DOUT3_LP_N C74 VCCIO0/VCCIO0/VCCIO0 VCCIO0/VCCIO0/VCCIO0 VCCIO0/VCCIO0/VCCIO0 VCCIO0/VCCIO0/VCCIO0 G8 G9 0 C77 C78 C79 0.1uF 0.1uF 1uF 2K/4K/7K || 2nd_Fn. 0.1uF 0.1uF LCMXO3L-6900C-6BG256C 5 2 3 3 2 DOUT2_N 5 1 5 4 4 1 A5 B6 PIO_A3 PIO_B4 PT9C/PT9C/PT9C F8 D9 2 3 4 DOUT3_P 1 [Pg5] J35 SMA73391-0060 PIO_A5 PIO_B6 [Pg5] [Pg5] PT18A*/PT20A*/PT22A* PT18B*/PT20B*/PT22B* * = TRUE LVDS Output 1 5 J34 [Pg5] SMA73391-0060 4 DOUT2_P [Pg5] [Pg5] DOUT6_HS_P DOUT6_HS_N [Pg5] [Pg5] 5 2 3 3 2 5 1 5 4 4 1 A4 C5 [Pg5] [Pg5] [Pg5] C J33 SMA73391-0060 PIO_A4 PIO_C5 B3 [Pg7] [Pg2] DNI R81 R87 DNI DNI DNI R92 DOUT1_N R88 330 30 R90 DOUT0_LP_P [Pg5] DOUT0_HS_P [Pg5] [Pg5] DOUT1_P DNI DOUT0_N R86 [Pg5] 30 330 R84 R93 5 R82 DOUT0_P 2 3 3 DNI R80 [Pg5] [Pg5] 2 5 4 1 4 5 1 J32 [Pg5] SMA73391-0060 [Pg5] [Pg5] PT9A*/PT9A*/PT9A* PT9B*/PT9B*/PT9B* 2 DOUT1_P 1 5 3 2 2 3 4 4 1 DOUT0_N 5 J31 SMA73391-0060 C4 B5 [Pg5] [Pg5] 2 3 4 4 1 5 2 3 3 2 DOUT0_P 5 1 5 4 4 1 J30 [Pg5] SMA73391-0060 PIO_C4 PIO_B5 [Pg5] [Pg5] [Pg5] J29 SMA73391-0060 D BANK0 [Pg5] [Pg5] R225 CLKOUT1_N DNI R78 2 3 3 CLKOUT0_N 2 5 4 1 4 5 1 J28 SMA73391-0060 [Pg5] 5 4 4 1 CLKOUT0_N [Pg5] CLKOUT1_P [Pg5] 5 2 2 3 3 [Pg5] J27 SMA73391-0060 R74 CLKOUT0_LP_P CLKOUT0_HS_P [Pg5] DNI R68 30 330 R70 CLKOUT0_P R72 5 4 5 4 [Pg5] DNI [Pg5] D R79 CLKOUT1_P 1 DNI 1 R66 3 2 2 3 J26 SMA73391-0060 [Pg5] 4 CLKOUT0_P 5 2 2 1 5 1 4 J25 SMA73391-0060 3 3 Place resistors as close to the bank 0 pins on XO3 as possible. Arrange them so they do not influence the *HS* trace path. Match trace length for all P and N signals. Match lengths between HS signals, match lengths between LP signals. U7F DNI R111 DNI R117 DNI R116 [Pg5] DNI R122 3 2 2 3 4 DOUT5_N 1 R118 DOUT4_HS_N [Pg5] [Pg5]DOUT5_N 330 DOUT4_LP_N [Pg5] 30 R120 [Pg5] [Pg5] R119 DOUT5_HS_N 330 DOUT5_LP_N 30 R121 [Pg5] [Pg5] [Pg5] [Pg5] DOUT6_LP_P DOUT6_LP_N D3 D1 [Pg5] [Pg5] DOUT4_LP_P DOUT4_LP_N E2 E3 [Pg5] [Pg5] DOUT2_LP_P DOUT2_LP_N C1 D2 [Pg5] [Pg5] DOUT0_LP_P DOUT0_LP_N E1 F2 CLKOUT0_LP_P CLKOUT0_LP_N F4 G6 [Pg5] [Pg5] PL1C/PL2C/PL2C PL1D/PL2D/PL2D PL4C/PL7C/PL7C PL4D/PL7D/PL7D PL1A/PL3A/PL3A || L_GPLLT_FB PL1B/PL3B/PL3B || L_GPLLC_FB PL4A/PL7A/PL8A PL4B/PL7B/PL8B PL2A/PL4A/PL4A || L_GPLLT_IN PL2B/PL4B/PL4B || L_GPLLC_IN PL5A/PL8A/PL9A PL5B/PL8B/PL9B PL2C/PL4C/PL4C PL2D/PL4D/PL4D PL5C/PL8C/PL9C PL5D/PL8D/PL9D G5 G4 DOUT7_LP_P DOUT7_LP_N [Pg5] [Pg5] F3 F1 DOUT5_LP_P DOUT5_LP_N [Pg5] [Pg5] G2 G3 DOUT3_LP_P DOUT3_LP_N [Pg5] [Pg5] F5 H6 CLKOUT1_LP_P CLKOUT1_LP_N PL3A/PL6A/PL6A || PCLKT5_0 PL3B/PL6B/PL6B || PCLKC5_0 PL3C/PL6C/PL6C PL3D/PL6D/PL6D VCCIO5/VCCIO5/VCCIO5 1 DOUT7_N 1 [Pg5] DNI R125 R127 DOUT7_LP_P 30 DOUT7_HS_P 330 R129 DNI R131 DNI R136 3 DOUT6_N 2 2 3 J45 [Pg5] SMA73391-0060 5 DOUT6_N 4 1 R132 DOUT6_HS_N [Pg5] [Pg5]DOUT7_N 330 DOUT6_LP_N [Pg5] 30 R134 R133 DOUT7_HS_N 330 DOUT7_LP_N 30 R135 [Pg5] [Pg5] IO Header [Pg5] [Pg5] VCCIO VCCIO J37 5 5 5 4 4 1 4 2 2 3 3 [Pg5] J44 SMA73391-0060 R126 DOUT6_LP_P [Pg5] 30 DOUT6_HS_P [Pg5] [Pg5] DOUT7_P 330 R128 R137 DOUT6_P R130 [Pg5] DNI R124 [Pg5] DNI DOUT7_P 1 DNI 3 2 2 3 4 5 1 4 DOUT6_P [Pg5] [Pg5] [Pg5] [Pg5] [Pg5] [Pg5] [Pg5] [Pg5] [Pg5] [Pg5] A PIO_C4 PIO_B5 PIO_A4 PIO_C5 PIO_A5 PIO_B6 PIO_A3 PIO_B4 PIO_D8 PIO_E9 2 4 6 8 10 12 14 16 18 20 22 24 1 3 5 7 9 11 13 15 17 19 21 23 PIO_F8 PIO_D9 PIO_B9 PIO_A10 PIO_F9 PIO_E11 PIO_D10 PIO_E10 PIO_C10 PIO_F10 [Pg5] [Pg5] [Pg5] [Pg5] [Pg5] [Pg5] [Pg5] [Pg5] [Pg5] [Pg5] A Lattice Semiconductor Applications Email: [email protected] HEADER 12X2 DNI Title DSI: SMA_OUTPUT Size C Date: 5 0 C82 C83 0.1uF 1uF LCMXO3L-6900C-6BG256C 5 2 3 3 2 5 1 5 4 4 1 J42 [Pg5] SMA73391-0060 B E4 2K/4K/7K || 2nd_Fn. J43 SMA73391-0060 [Pg5] [Pg5] 1.2V 5 1 4 J41 [Pg5] SMA73391-0060 5 4 DOUT4_N 5 4 1 DOUT4_N R113 DOUT5_LP_P 30 DOUT5_HS_P 330 R115 B1 C2 5 2 2 3 3 [Pg5] 1 DNI DOUT4_P DNI [Pg5] B J40 SMA73391-0060 R112 DOUT4_LP_P [Pg5] 30 DOUT4_HS_P [Pg5] [Pg5] DOUT5_P 330 R114 R123 [Pg5] R110 DOUT5_P 1 DOUT1_LP_P DOUT1_LP_N R138 2 3 3 2 5 1 4 DOUT4_P 4 5 1 5 4 4 1 J39 [Pg5] SMA73391-0060 5 2 2 3 3 BANK5 J38 SMA73391-0060 [Pg5] [Pg5] 4 3 2 Project MachXO3L DSI Breakout Board May, 2014 Sheet 1 Schematic Rev B Board Rev 5 of 7 B 5 4 3 [Pg6] [Pg6] PIO_J16 PIO_J14 [Pg6] [Pg6] PIO_J11 PIO_L12 J16 J14 H11 J13 J11 L12 K11 L13 N15 P16 P15 R16 PR4A/PR6A/PR7A PR4B/PR6B/PR7B DQ0 PR5C/PR8C/PR10C PR5D/PR8D/PR10D PR5A/PR8A/PR9A PR5B/PR8B/PR9B PR6C/PR9C/PR11C PR6D/PR9D/PR11D PR6A/PR9A/PR11A DQS0 PR6B/PR9B/PR11B DQS0N PR7C/PR10C/PR15A PR7D/PR10D/PR15B PR7A/PR10A/PR12A || PCLKT1_0 PR7B/PR10B/PR12B || PCLKC1_0 PL7A/PL10A/PL11A PL7B/PL10B/PL11B PL10C/PL14C/PL16C PL10D/PL14D/PL16D PL10A/PL14A/PL17A PL10B/PL14B/PL17B F14 F16 J1 J3 G15 G14 PIO_J2 PIO_K1 [Pg6] [Pg6] H5 J4 PIO_H5 PIO_J4 [Pg6] [Pg6] G16 H15 PR9A/PR13A/PR16A DQS1 PR9B/PR13B/PR16B DQS1N PR10C/PR14C/PR17C PR10D/PR14D/PR17D PR10A/PR14A/PR17A PR10B/PR14B/PR17B PR12C/PR16C/PR21C PR12D/PR16D/PR21D PR11A/PR15A/PR18A PR11B/PR15B/PR18B PR13C/PR18C/PR23C PR13D/PR18D/PR23D PR11C/PR15C/PR19C PR11D/PR15D/PR19D DQ1 PR14C/PR20C/PR25C PR14D/PR20D/PR25D PR12A/PR16A/PR21A PR12B/PR16B/PR21B PR13A/PR18A/PR23A PR13B/PR18B/PR23B C PR14A/PR19A/PR24A PR14B/PR19B/PR24B 3.3V D J5 K6 K3 K2 R140 R141 R142 R143 1K 1K 1K 1K VCCIO PL7C/PL10C/PL12A || PCLKT4_0 PL7D/PL10D/PL12B || PCLKC4_0 0 LED_RED VCCIO4/VCCIO4/VCCIO4 VCCIO4/VCCIO4/VCCIO4 LED_GREEN LED_BLUE H14 H16 D5 Red H7 J7 2K/4K/7K || 2nd_Fn. PR9C/PR13C/PR16C PR9D/PR13D/PR16D LEDs J2 K1 C85 C86 C87 0.1uF 0.1uF 1uF J15 K16 D6 Red 1 PR4C/PR6C/PR7C PR4D/PR6D/PR7D PL9C/PL13C/PL15C PL9D/PL13D/PL15D D7 Red D8 Red 2 H13 J12 PR3A/PR5A/PR5A PR3B/PR5B/PR5B H3 H1 E16 F15 PL9A/PL13A/PL15A PL9B/PL13B/PL15B PL6C/PL9C/PL10C PL6D/PL9D/PL10D 1 G11 H12 PR3C/PR5C/PR6C PR3D/PR5D/PR6D PIO_H4 PIO_J6 H4 J6 PL6A/PL9A/PL10A PL6B/PL9B/PL10B 2 F12 G13 PR2A/PR3A/PR3A || R_GPLLT_IN** PR2B/PR3B/PR3B || R_GPLLC_IN** G1 H2 1 PIO_F13 PIO_G12 PR2C/PR4C/PR4C PR2D/PR4D/PR4D [Pg6] [Pg6] D16 E14 PIO_G1 PIO_H2 2 [Pg6] [Pg6] F13 G12 [Pg6] [Pg6] D14 E15 2 C16 D15 BANK4 PR1A/PR2A/PR2A || R_GPLLT_FB** PR1B/PR2B/PR2B || R_GPLLC_FB** R139 D PR1C/PR2C/PR2C PR1D/PR2D/PR2D 1 BANK1 C15 B16 PIO_C15 PIO_B16 1 U7E U7B [Pg6] [Pg6] 2 LED1 LCMXO3L-6900C-6BG256C K14 K15 LED1 LED2 L16 L14 LED3 LED4 LED2 LED3 LED4 K13 K12 L15 M16 M14 M15 N16 N14 C BLUE LED VF=2.1V, IF=20mA RS=(5.0V-3.2V)/20mA=145Ohm [email protected]=24mA RS=(5.0V-2.1V)/24mA=120.8Ohm VCCIO C89 C90 0.1uF 0.1uF VCCIO1/VCCIO1/VCCIO1 VCCIO1/VCCIO1/VCCIO1 R149 ** = 2nd_Fn. applicable for 4K and 7K devices only. E13 H10 VCCIO1/VCCIO1/VCCIO1 VCCIO1/VCCIO1/VCCIO1 RGB LED 0 5V U8 J10 M13 D9 LED_BLUE C93 C94 C95 0.1uF 0.1uF 1uF 2K/4K/7K || 2nd_Fn. R151 1 6 2 1 CDBU0520 D10 2 5 2 1 CDBU0520 D11 4 2 1 CDBU0520 62 LED_GREEN R152 62 LCMXO3L-6900C-6BG256C LED_RED 3 R150 110 GREEN LED VF=3.2V, IF=20mA RS=(5.0V-3.1V)/10mA=90Ohm [email protected]=24mA RS=(5.0V-3.1V)/24mA=75Ohm RED LED VF=.3.2V, IF=20mA RS=(5.0V-3.2V)/10mA=90Ohm [email protected]=24mA RS=(5.0V-3.2V)/24mA=75Ohm SFT722N-S MFG = Seoul MFG P/N = SFT722N-S R153 3.3V U7G B2 B15 C3 C14 D4 D13 E5 E12 F6 F11 H8 H9 J8 J9 L6 L11 M5 M12 N4 N13 P3 P14 R2 R15 B GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND GND/GND/GND VCC/VCC/VCC VCC/VCC/VCC VCC/VCC/VCC VCC/VCC/VCC VCC/VCC/VCC VCC/VCC/VCC VCC/VCC/VCC VCC/VCC/VCC NC/NC/NC A1 A16 G7 G10 K7 K10 T1 T16 0 PMOD Connector VCCIO C96 C97 C98 C99 0.1uF 0.1uF 0.1uF 1uF PMOD Connector VCCIO VCCIO VCCIO B J46 [Pg6] [Pg6] [Pg6] [Pg6] A2 PIO_C15 PIO_B16 PIO_F13 PIO_G12 1 2 3 4 5 6 J47 PIO_J16 PIO_J14 PIO_J11 PIO_L12 7 8 9 10 11 12 [Pg6] [Pg6] [Pg6] [Pg6] [Pg6] [Pg6] [Pg6] [Pg6] PIO_G1 PIO_H2 PIO_H4 PIO_J6 1 2 3 4 5 6 7 8 9 10 11 12 PMOD 2x6 PMOD 2x6 DNI DNI PIO_J2 PIO_K1 PIO_H5 PIO_J4 [Pg6] [Pg6] [Pg6] [Pg6] 2K/4K/7K LCMXO3L-6900C-6BG256C A A Lattice Semiconductor Applications Email: [email protected] Title BREAKOUT CONNECTION Size C Date: 5 4 3 2 Project MachXO3L DSI Breakout Board May, 2014 Sheet 1 Schematic Rev B Board Rev 6 of 7 B 5 4 3 DSI Input Connector Place *CD* resistors and I2C pull up as close to bank 2 pins as possible. Trace match MIPI* pins between P and N channels as well as individual pairs. Minimize routing and trace match *CD* signals to bank 5 pins. J48 [Pg7] MIPI_Data_0_in_N [Pg7] MIPI_Data_1_in_N [Pg7] MIPI_Clock_in_N [Pg7] MIPI_Data_2_in_N [Pg7] MIPI_Data_3_in_N D 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 DSI_IO_24 DSI_IO_26 DSI_IO_28 MIPI_VCC_12V_IN MIPI_VCC_5V_IN MIPI_VCC_3.3V_IN 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 2 MIPI_Data_0_in_P [Pg7] MIPI_Data_1_in_P MIPI_Clock_in_P MIPI_Data_2_in_P [Pg7] MIPI_Data_3_in_P [Pg7] [Pg7] E7 F7 G7 R158 MIPI_Data_1_out_LP [Pg7] [Pg7] DSI_IO_23 DSI_IO_25 DSI_IO_27 DSI_IO_29 MIPI_VCC_12V_IN R155 0 F6 F5 MIPI_Data_2_in_P MIPI_Data_2_in_N [Pg7] VCCIO [Pg7] [Pg7] MIPI_Clock_in_P MIPI_Clock_in_N MIPI_CD_CLK E4 E3 0 PB3A PB3B PB12A PB12B PB5A PB16A || PCLKT PB16B || PCLKC PB8A || MCLK PB8B || SO Place MIPI TX resistor network as close to bank 0 as possible. Trace match *HS* P & N channels as well as individual pairs. Minimize routing and trace match *LP* signals to banks 5 and 0. R165 4.7K BANK2 DNI [Pg7] MIPI_CD_CLK [Pg7] MIPI_Data_0_in_P [Pg7] MIPI_Data_0_in_N [Pg7] MIPI_CD_D0 MIPI Tx Termination VCCIO U9B [Pg7] [Pg7] 1 This resistor is for external pull up for cases where I2C is used. If I2C is not used for programming this signal is not needed. PB25A || SN PB25B || SI [Pg7] F4 F3 MIPI_Data_3_in_P MIPI_Data_3_in_N [Pg7] [Pg7] G4 G3 MIPI_Data_1_in_P MIPI_Data_1_in_N [Pg7] [Pg7] G2 G1 MIPI_Data_1_out_LN MIPI_Data_3_out_LP [Pg7] MIPI_Data_3_out_HS_P [Pg7] MIPI_Data_3_out_HS_N [Pg7] MIPI_Data_3_out_LN [Pg7] 51 R156 51 R154 330 R157 330 R159 51 R160 51 R162 MIPI_Data_3_out_P [Pg7] MIPI_Data_3_out_N [Pg7] D PB11A || PCLKT PB11B || PCLKC R166 MIPI_VCC_5V_IN G6 MIPI_VCC_3.3V_IN C100 1uF C101 0.1uF VCCIO2 LCMXO3L-2100E-6UWG49CTR [Pg7] M50-3602542 MIPI_Data_2_out_LP [Pg7] MIPI_Data_2_out_HS_P [Pg7] MIPI_Data_2_out_HS_N 51 R169 51 R168 330 R170 330 R173 51 R171 MIPI_Data_2_out_P [Pg7] MIPI_Data_2_out_N [Pg7] MIPI_Data_1_out_P [Pg7] MIPI_Data_1_out_N [Pg7] MIPI_Data_0_out_P [Pg7] MIPI_Data_0_out_N [Pg7] MIPI DSI Input U9A [Pg7] [Pg7] [Pg7] [Pg7] XO3L_2100E_TDO XO3L_2100E_TDI A6 C5 FTDI_TCK FTDI_TMS B4 B5 MIPI_Clock_out_HS_P MIPI_Clock_out_HS_N C4 D3 [Pg2] [Pg2] C DSI Output Connector D5 D4 MIPI_Data_3_out_HS_P MIPI_Data_3_out_HS_N B3 C3 SCL_2 SDA_2 MIPI_Data_0_out_N [Pg7] MIPI_Data_1_out_N A2 A5 [Pg7] MIPI_Clock_out_N [Pg7] MIPI_Data_2_out_N [Pg7] MIPI_Data_3_out_N 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 DSI_IO_24 DSI_IO_26 DSI_IO_28 MIPI_VCC_12V_OUT MIPI_VCC_5V_OUT MIPI_VCC_3.3V_OUT 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 PT20A PT20B PT12C || TDO PT12D || TDI PT20C || JTAGEN PT20D || PROGRAMN PT16C || TCK PT16D || TMS PT23A PT23B PT17A || PCLKT PT17B || PCLKC PT24A PT24B PT18C PT18D || SDA PT24C || INITN PT24D || DONE MIPI_Data_2_out_HS_P MIPI_Data_2_out_HS_N [Pg7] [Pg7] [Pg7] E2 C2 MIPI_Data_1_out_HS_P MIPI_Data_1_out_HS_N [Pg7] [Pg7] C1 D2 MIPI_Data_0_out_HS_P MIPI_Data_0_out_HS_N B1 A1 MIPI_Data_2_out_LP MIPI_Data_2_out_LN A3 B2 F2 F1 TP7 MIPI_Data_0_out_P [Pg7] MIPI_Data_1_out_P [Pg7] MIPI_Clock_out_P C110 1uF VCCIO0 VCCIO0 LCMXO3L-2100E-6UWG49CTR C111 C112 0.1uF 0.1uF MIPI_Data_2_out_LN R202 1K DNL [Pg7] [Pg7] [Pg7] [Pg7] [Pg7] VCCIO J49 [Pg7] BANK0 PT10A PT10B 51 R172 MIPI_Data_1_out_LP [Pg7] MIPI_Data_1_out_HS_P [Pg7] MIPI_Data_1_out_HS_N [Pg7] MIPI_Data_1_out_LN 51 R175 51 R174 330 R177 330 R178 51 R179 51 R180 C [Pg7] MIPI_Data_2_out_P [Pg7] MIPI_Data_3_out_P [Pg7] DSI_IO_23 DSI_IO_25 DSI_IO_27 DSI_IO_29 MIPI_VCC_12V_OUT Optional JTAG Configuration [Pg7] MIPI_Data_3_out_LP MIPI_VCC_5V_OUT [Pg7] R209 DNI FTDI_TCK R223 0 SCL_2 R210 DNI FTDI_TMS R224 0 SDA_2 MIPI_Data_0_out_LP [Pg2,5] [Pg7] MIPI_Data_0_out_HS_P [Pg7] MIPI_Data_0_out_HS_N [Pg2,5] 30 R184 330 R185 330 R186 30 R187 MIPI_VCC_3.3V_OUT [Pg7] MIPI_Data_3_out_LN [Pg2,5] [Pg7] MIPI_Data_0_out_LN [Pg2,5] M50-3122545 MIPI DSI Output B B [Pg7] U9C MIPI_Clock_out_LP [Pg7] MIPI_Clock_out_HS_P [Pg7] MIPI_Clock_out_HS_N 30 R189 330 R190 330 R191 30 R192 MIPI_Clock_out_P [Pg7] MIPI_Clock_out_N [Pg7] BANK5 MIPI_VCC_12V_IN R233 MIPI_VCC_12V_OUT DNI 12V R234 MIPI_Data_0_out_LP MIPI_Data_0_out_LN A7 B6 [Pg7] [Pg7] MIPI_Clock_out_LP MIPI_Clock_out_LN C7 C6 PL2A || GPLLT_IN PL2B || GPLLC_IN PL5A PL5B E6 E5 PL3A PL3B MIPI_CD_CLK MIPI_CD_D0 [Pg7] [Pg7] [Pg7] 1.2V VCCIO5 MIPI_VCC_5V_OUT B7 C116 C115 0.1uF 0.1uF DNI Note: Most of the resistor size is 0603, except in Page 7, they are 0201. LCMXO3L-2100E-6UWG49CTR 5V R236 MIPI_Clock_out_LN 0 MIPI_VCC_5V_IN R235 [Pg7] [Pg7] 0 MIPI_VCC_3.3V_IN MIPI_VCC_3.3V_OUT R237 DNI R238 0 3.3V 1.2V U9D A4 D6 E1 G5 A GND GND GND GND VCC VCC D1 D7 A C120 C119 0.1uF 0.1uF LCMXO3L-2100E-6UWG49CTR Lattice Semiconductor Applications Email: [email protected] Title X03 BOB + DSI : LCMX3L-2100E-6WLCSP49 Size C Date: 5 4 3 2 Project MachXO3L DSI Breakout Board May, 2014 Sheet 1 Schematic Rev B Board Rev 7 of 7 B