advertisement Dual Output Regulator Uses Only One Inductor – Design Note 100 Carl Nelson Many modern circuit designs still need a dual polarity supply. Communication and data acquisition are typical areas where both 5V and –5V are needed for some of the IC chips. It would be nice if a single switching regulator could supply both outputs with good regulation and a minimum of magnetic components. The circuit in Figure 1 is a good example of exploiting the best advantages of components and topologies to achieve a very small, dual output regulator with a single magnetic component. D2 1N914 INPUT 6V TO 25V INPUT BOOST LT1376-5 VSW C2 0.1μF • L1* 10μH OUTPUT 5V BIAS SENSE SHDN GND VC + GND C3 22μF 35V TANT RC 470Ω CC 0.01μF C4** + * L1 IS A SINGLE CORE WITH 100μF TWO WINDINGS, COILTRONICS 10V CTX10-2P TANT ** AVX TSPD107M010 † IF LOAD CAN GO TO ZERO, AN OPTIONAL PRELOAD OF 1k TO 5k MAY BE USED TO IMPROVE REGULATION D1 1N5818 L1* • C5** 100μF 10V TANT D3 1N5818 + C1** 100μF 10V TANT + OUTPUT –5V † DN100 • F01 Figure 1 The 5V output is generated using the LT®1376 buck converter. This device uses special design techniques and high speed processing to create a 500kHz design that is much smaller and more efficient than previous monolithic circuits. The current mode architecture and saturating switch design allow the LT1376 to deliver up to 1.5A load current from the tiny 8-pin SO package. L1 is a 10μH surface mount inductor from Coiltronics. It is manufactured with two identical windings that can be connected in series or parallel. One of the windings is used for the buck converter. The second winding is used to create a negative output SEPIC (Single Ended Primary Inductance Converter) topology using D3, C4, C5, and the second half of L1. This converter takes advantage of the fact that the 03/95/100_conv switching signal driving L1 as a positive buck converter is already the correct amplitude for driving a –5V SEPIC converter. During switch off time, the voltage across L1 is equal to the 5V output plus the forward voltage of D1. An identical voltage is generated in the second winding, which is connected to generate –5V using D3 and C5. Without C4, this would be a simple flyback winding connection with modest regulation. The addition of C4 creates the SEPIC topology. Note that the voltage swing at both ends of C4 is theoretically identical even without the capacitor. The undotted end of both windings goes to a zero AC voltage node, so the equal windings will have equal voltages at the opposing ends. Unfortunately, coupling between windings is never perfect, and load regulation at the negative output suffers as a result. The addition of C4 forces the winding potentials to be equal and gives much better regulation. Regulation Performance and Efficiency Figure 2 details the regulation performance of the circuit. The positive output combined load and line regulation is better than 1%, and this was considered good enough to forgo a graph. Negative output voltage is graphed as a function of negative load current for several values of positive load current. For best regulation, the negative output should have a preload of at least 1% of the maximum positive load. Total output current of this circuit is limited by the maximum switch current of the LT1376. The following formula gives peak switch current, which cannot exceed 1.5A. This formula, in the spirit of simplicity, is simplified, so caution must be used if it indicates close to 1.5A peak current. IPEAK = 0.25A + (I+) + (2)(I–) (Must be less than 1.5A) Maximum negative load current is limited by the +5V load. A typical limit is one half of 5V current, but a more exact number can be found from: Max Negative Load = (I+)(0.07)(VIN – 2) L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. typically 0.3AP-P, so an ESR of 0.1Ω in C1 will give 30mVP-P output ripple. It is interesting to note that this ripple current is about one half of what would be expected for a buck converter. This occurs because the two windings are driven in parallel, so magnetizing current divides equally between the windings. 5.6 VIN = 10V NEGATIVE OUTPUT (V) 5.4 5.2 5.0 4.8 4.6 4.4 0 500 100 200 300 400 NEGATIVE LOAD CURRENT (mA) DN100 • F02 Figure 2. – 5V Regulation Note that as input voltage drops, less and less current is available from the negative output. Efficiency of the switching regulator is not as good as a single buck converter, but still is very respectable, exceeding 80% over a wide current range. The inductor called out on the circuit schematic is a low cost offthe-shelf Coiltronics part made with a powdered iron core. Replacing that part with a Magnetics, Inc. Kool Mμ core #77130 with 13 turns of #24 wire will raise efficiency by 3% across most of the load current range. Ripple current peak-to-peak into the –5V output capacitor is approximately equal to twice the negative load current. The wave shape is roughly rectangular, and so is the resultant output ripple voltage. A 100mA negative load and 0.1Ω ESR output capacitor will have (2)(0.1A)(0.1Ω) = 20mVP-P ripple. A word of caution, however; the current waveform contains fast edges, so the inductance of the output capacitor multiplied by the rate-of-rise of the current will generate very narrow spikes superimposed on the output ripple. With capacitor inductance of 5nH, and dI/dt = 0.05A/ns, the spike amplitude will be 250mV! Now for the good news. The effective bandwidth of the spikes is all above 20MHz, so it is very easy to filter them out. In fact, the inductance of the output PC board traces (20nH/in) coupled with load bypass capacitors will normally filter out the spikes. The only caveat is that if the load bypass capacitors are very low ESR types like ceramic, they should be paralleled with a larger tantalum capacitor to reduce the Q of the filter. 100 VIN = 10V, Kool Mμ 77130 CORE WITH 13 TURNS #24 GAUGE WIRE 90 EFFICIENCY (%) +5V RIPPLE VIN = 10V 80 –5V RIPPLE AFTER PARASITIC FILTER (3" OF PC TRACE AND 6.8μF TANTALUM CAPACITOR) VIN = 20V 70 CTX10-2P CORE 60 –5V RIPPLE UNFILTERED 50 –5V CURRENT = 20% OF 5V CURRENT BIAS CONNECTED TO 5V 40 0 1.0 0.2 0.4 0.6 0.8 POSITIVE LOAD CURRENT (mA) DN100 • F03 Figure 3. Dual Output Efficiency Output Ripple Voltage Output ripple voltage is determined by the ESR of the output capacitors. The capacitors shown are AVX type TPS surface mount solid tantalum which are specially constructed for low ESR (<0.1Ω). Peak-to-peak ripple current into the +5V output capacitor is a triwave, Data Sheet Download www.linear.com Linear Technology Corporation DN100 F04 Both outputs can be shut down simultaneously by driving the LT1376 shutdown pin low. An undervoltage lockout function can also be implemented by connecting a resistor divider to the shutdown pin. See the LT1376 data sheet for details. For applications help, call (408) 432-1900 dn100f_conv LT/GP 0394 160K • PRINTED IN THE USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 1995