Application Note 1046 Design Consideration with AP3202 Prepared by You Qingling System Engineering Dept. 1. Introduction 2. General Description The AP3202 is a current mode step-down DC-DC converter, capable of driving a 2A load with high efficiency, excellent line and load regulation. The internal compensation provides simple and stable power supplies with the minimum of external components. The AP3202 is a non-synchronous step-down converter with a built-in power MOSEFT. Turn on/off MOSFET M1 and Schottky diode alternately to chop the input voltage. The current sense signal compared with the EA output signal to regulate the output voltage and adjust the MOSFETs duty cycle. The AP3202 is also a high reliability IC with integrated OCP, OVP, OTP, UVLO circuits. For more description information, please refer to the functional block diagram. The AP3202 is optimized to work over the input voltage ranges from 4.75V to 18V, making it suit for a wide variety of power supply systems. Current mode control provides fast transient response and cycle-by-cycle current limit. Internal soft-start function provides a controlled startup with no overshoot, even at light loads. The over current protection, short circuit protection and over temperature protection functions are built inside which increase the system reliability. IN A representative block diagram of AP3202 is shown in Figure 1: 2 Internal Bias And Regulator Internal Pull High SLOP COMP Current Sense Amplifier 5V Oscillator 90K/380K Shutdown Comparator EN Q R Q PWM Comparator 7 0.5/1.5V BS 3 SW M1 0.22Ω CLK S 1 M2 10Ω 1.8V 4 Short Protection Comparator 0.6 GND 1.222 Error Amplifier 5 FB 6 8 NC COMP Figure 1. Functional Block Diagram of AP3202 Dec. 2011 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 1 Application Note 1046 voltage is proportional to the output voltage. When FB pin voltage falls below 0.3V, the operating frequency reduces to 90kHz. The AP3202 will restart once released from OCP condition. 2.1 Enable and Soft Start The AP3202 provides an internal soft-start feature, which ramps the output voltage and output current from 0 to the full value. This feature prevents output voltage from overshoot at light load and large inrush current upon startup. EN pin is an input control pin that turns on/off the regulator. Forcing this pin above 1.5V or leave this pin floating enables the IC, while forcing this pin below 0.5V shuts down the IC. 2.3 Over Voltage Protection The AP3202 has an internal over voltage protection circuit. When the output voltage goes higher than the OVP threshold, the power switching is turned off. The AP3202 will restart once released from OVP condition. 2.2 Over Current Protection (OCP) The AP3202 has an internal over current function to protect itself from catastrophic failure. The AP3202 monitors the drain-to-source current of the internal upper power MOSFET. The current limit threshold is internally set at 3.8A. When the inductor current is higher than the current limit threshold, OCP is triggered and forces the power switching MOSFET turning off until the next switching cycle. The FB 2.4 Over Temperature Protection The internal thermal temperature protection circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When the junction temperature exceeds 160°C, it shuts down the internal control circuit and switching power MOSFET. The AP3202 will restart automatically under the control of soft-start circuit when the junction temperature decreases to 130°C. Figure 2. Typical Application of AP3202 Where VFB is the feedback voltage and VOUT is the output voltage. 3. Application Information The typical application circuit of AP3202 is shown in Figure 2. For the setting of parameters, please refer to the following descriptions. Thus, VOUT can be expressed as: ⎛ R + R2 ⎞ ⎟⎟ VOUT = 1.222 × ⎜⎜ 1 ⎝ R2 ⎠ 3.1 Output Voltage The output voltage can be set by using a resistor voltage divider from the output to FB. The VOUT is divided by the voltage divider as below: First, select a value for R2 whose recommended value is 10kΩ. Then, R1 is determined by: ⎛ R2 ⎞ ⎟⎟ ---------------------------(1) VFB = VOUT × ⎜⎜ ⎝ R1 + R 2 ⎠ Dec. 2011 ⎛V ⎞ R 1 = R 2 × ⎜ OUT − 1⎟ ---------------------------(2) ⎝ 1.222 ⎠ Rev. 1. 3 BCD Semiconductor Manufacturing Limited 2 Application Note 1046 current stress on the input capacitor should be considered. The RMS of input capacitor current can be calculated as: 3.2 Inductor The inductor is used to supply smooth current to output when driven by a switching voltage. Its value is determined by the operating frequency, load current, ripple current and duty cycle. I CIN _ RMS = I OUT ( MAX ) × A higher-value inductor can decrease the ripple current and output ripple voltage, however usually with larger physical size. So some compromise needs to be made when selecting the inductor. Where VIN is the input voltage, IOUT is the output current and fSW is the oscillator frequency. Another important parameter for the inductor is the current rating. After fixing the inductor value, the peak inductor current can be calculated as: ∆VIN = (VIN − VOUT )× VOUT ⎛ V ⎞ V I OUT × ⎜⎜1 − OUT ⎟⎟ × OUT VIN ⎠ VIN f SW × C IN ⎝ Where ∆VIN is the input ripple voltage. 2 × VIN × f SW × L1 3.4 Output Capacitor The output capacitor can be selected based upon the desired output ripple and transient response. The output voltage ripple depends directly on the ripple current and is affected by two parameters of the output capacitor: total capacitance and the Equivalent Series Resistance (ESR). The output ripple voltage can be expressed as: Here, IPEAK is the peak inductor current. It should be ensured that the current rating of the selected inductor is 1.5 times of the peak inductor current. 3.3 Input Capacitor A high-quality input capacitor with big value is needed to filter noise at input voltage source and limit the input ripple voltage while supplying most of the switch current during ON time. For input capacitor selection, a ceramic capacitor is highly recommended due to its low impedance and small size. However, tantalum or low electrolytic capacitor is also sufficed. ⎡ ⎛ 1 ∆VO = ∆I L × ⎢R ESR + ⎜⎜ ⎝ 8 × C OUT × f SW ⎣ ⎞⎤ ⎟⎟⎥ ⎠⎦ ∆VO stands for the output ripple voltage and RESR stands for the ESR of output capacitor. For lower output ripple voltage across the entire operating temperature range, X5R or X7R dielectric type of ceramic, or other low ESR tantalum capacitor or aluminum electrolytic capacitor are recommended. There are two important parameters for input capacitor: the voltage rating and RMS current rating. The voltage rating should be at least 1.25 times greater than the maximum input voltage (1.5 times is regarded as the conservative value). Since the input current is discontinuous in a buck converter, the Dec. 2011 ⎞ ⎟⎟ ⎠ As indicated by the RMS current equation above, ICIN_RMS reaches the highest level at the duty cycle of 50%. So the RMS current of input capacitor should be greater than half of the output current under this worst case. For reliable operation and best performance, ceramic capacitors are preferred for input capacitor because of their low ESR and high ripple current rating. And X5R or X7R type dielectric ceramic capacitors are preferred due to their better temperature and voltage characteristics. Additionally, when selecting ceramic capacitor, make sure its capacitance is big enough to provide sufficient charge to prevent excessive voltage ripple at input. The input ripple voltage can be approximately expressed as below: VIN − VOUT f SW × VIN × 26% × I OUT I PEAK = I OUT + ⎛ VOUT ⎜⎜1 − VIN ⎝ Here, ICIN_RMS is the RMS of input capacitor current. Assuming that the IC is operating in the continuous mode and the peak-to-peak inductor ripple current is 26% of maximum output current (In most applications, a good compromise is to select the peak-to-peak ripple current between 20% and 30% of the maximum load current of the converter), the inductor L1 can be selected according to: L1 = VOUT × VOUT VIN The output capacitor selection will also affect the output drop voltage during load transient. The output drop voltage during load transient is dependent on many factors. However, an approximation of the Rev. 1. 3 BCD Semiconductor Manufacturing Limited 3 Application Note 1046 The purpose of loop compensation is to shape the loop transfer function in order to meet the desired loop gain. The crossover frequency should be set firstly. Because lower crossover frequency result in slower line and load transient responses, while higher crossover frequency could cause system instability. A good compromise is to set the crossover frequency below 10% of the switching frequency. The crossover frequency (fC) can be calculated by: transient drop ignoring loop bandwidth can be expressed as: 2 VDROP = ∆I TRAN × R ESR L × ∆I TRAN + COUT × (VIN − VOUT ) Where ∆ITRAN is the output transient load current step, and VDROP is the output voltage drop (ignoring loop bandwidth). ⎛ G × G CS × R C VFB ⎞ ⎟ < 0.1× f SW f C = ⎜⎜ EA × 2π × C C VOUT ⎟⎠ ⎝ Both the voltage rating and RMS current rating of the capacitor needs to be carefully examined when designing a specific output ripple or transient drop. The output capacitor voltage rating should be greater than 1.5 times of the maximum output voltage. In the buck converter, output capacitor current is continuous. The RMS current is decided by the peak-to-peak inductor ripple current. It can be expressed as: I COUT _ RMS = Where fC is the crossover frequency, GEA is the error amplifier transconductance, GCS is the current sense trans-conductance. And the desired crossover frequency can be set via compensation resistor RC. For sufficient phase margin, the loop gain slope should be -20db/decade at the cross frequency. To suffice this requirement, the output filter pole (fP_OUT), which is produced by output capacitor and the load resistor, should be cancelled by the zero point of error amplifier (fZ_EA) due to the compensation capacitor (CC) and the output resistor. They can be expressed as: ∆I L 12 Where ICOUT_RMS is the RMS current of output capacitor. 3.5 Loop Compensation The AP3202 employs current-mode control to achieve easy compensation and fast dynamic response. Optimal loop compensation depends on the output capacitor, inductor, load, compensation network and also the device itself. For a stable system, the recommended values for the compensation network are shown in the table below. VIN/VOUT (V) 12V/5V 12V/3.3V 12V/2.5V 12V/1.8V 5V/3.3V 5V/2.5V 5V/1.8V L (µH) 15 15 15 15 22 15 15 COUT (µF) 22 22 22 22 22 22 22 CC (nF) 1 2.2 1 2.2 3.3 1 2.2 RC (kΩ) 15 10 5.1 4.3 9.1 4.7 5.1 ⎛ ⎞ 1 ⎟⎟ f P _ OUT = ⎜⎜ π × × 2 C R OUT O ⎝ ⎠ ⎛ ⎞ 1 ⎟⎟ f Z _ EA = ⎜⎜ π × × 2 C R C C ⎠ ⎝ Where, fP_OUT is the output filter pole and fZ_EA is the zero point of error amplifier. COPTION (pF) None None None None None None None In general, we can set fZ_EA below one-forth of the fC. RC and CC should be set appropriately to make sure the system work at the desired transient voltage drop and setting time. If the output capacitor has a large capacitance and/or a high ESR value, the zero point resulting from the output capacitor as well as its ESR should be considered. In this case, the additional capacitor (COPTION) should be placed between the COMP pin and GND. And, COPTION can add a pole to the circuit, thus increasing the mid-frequency width of the control circuit. If the desired solution differs from the table above, the loop transfer function should be analyzed to optimize the loop compensation. The overall loop transfer function is the product of the power stage and the feedback network transfer function. The power stage transfer function is dictated by the modulator, the output LC filter and load. The feedback transfer function is dictated by the error amplifier gain, external compensation network and feedback resistor ratio. Dec. 2011 ⎛ 1 f Z _ ESR = ⎜⎜ ⎝ 2π × C OUT × R ESR ⎞ ⎟⎟ ⎠ Where fZ_ESR is the zero point of output filter. Rev. 1. 3 BCD Semiconductor Manufacturing Limited 4 Application Note 1046 4.3 Feedback Net Special attention should be paid to the route of the feedback wring. The feedback trace should be routed far away from the inductor and noisy power traces. Try to minimize trace length to the FB pin and connect feedback network behind the output capacitors. If needed, the value of COPTION can be expressed as: COPTION = COUT ×R ESR RC 3.6 Catch Diode Buck regulators require a diode to provide a return path for the inductor current when the switch turns off. A fast-diode is necessary which must be located as close to the AP3202 as possible using short leads and short printed circuit traces. 4.4 Via Hole Be careful to the via hole. Via hole will result in high resistance and inductance to the power path. If heavy switching current must be routed through via holes and/or internal planes, use multiple via holes parallel to reduce their resistance and inductance. Schottky diode is recommended for its fast switching times and low forward voltage drop. The reverse voltage rating and the current rating of the catch diode should ensure the system to function normally with a certain safety margin. The reverse voltage should be over 2 times of the system operating voltage and the current rating should be over 1.5 times of the full load current. Additionally, a Schottky diode with a low forward voltage drop must be choosing to improve efficiency. Figure 3, 4 and 5 are examples of AP3202 PCB layer. 3.7 Bootstrap Capacitor The bootstrap capacitor provided is used to drive the power switch’s gate above the supply voltage. The bootstrap capacitor is supplied by an internal 5V supply and placed between SW pin and BS pin to form a floating supply across the power switch driver. So the bootstrap capacitor should be a good quality and high-frequency ceramic capacitor. For best performance, the bootstrap capacitor should be X5R and X7R ceramic capacitor, and is recommended to be 10nF. 4. PCB Layout Guideline PCB layout is an important part for DC-DC converter design. Poor PCB layout may reduce the converter performance and disrupt its surrounding circuitry due to EMI. A good PCB layout should follow guidelines below: Figure 3. Top Silk Layer 4.1 Power Path Length The power path of AP3202 includes an input capacitor, output inductor and output capacitor. Place them on the same side of PCB and connect them with thick traces or copper plans on the same layer. The power components must be kept together closely. The longer the paths, the more they act as antennas, radiating unwanted EMI. 4.2 Coupling Noise The external control components should be placed as close to the IC as possible. Dec. 2011 Rev. 1. 3 BCD Semiconductor Manufacturing Limited 5 Application Note 1046 Figure 4. Top Layer Dec. 2011 Figure 5. Bottom Layer Rev. 1. 3 BCD Semiconductor Manufacturing Limited 6