Application Note 2 Issue 2 February 1996 Portable Ni-Cd Battery Charger Inexpensive Load Tolerant Step-Up Energy Source David Bradbury Many portable systems such as radio/tape players and video recording equipment are commonly powered by a 12V rechargeable Nickel-Cadmium (Ni-Cd)battery pack, which rarely has the capacity to power the system for more than a few hours. It would be convenient if these batteries could be recharged from a readily available source such as an automotive battery. The circuit shown in Figure 1 was designed to charge 12V, 2 ampere-hour Ni-Cd battery packs from a 12V source, but was made versatile enough to charge packs in the range of 4.8 to 15.6V to increase possible applications. To charge batteries that may reach a higher end voltage than the 12V supply input (even 12V Ni-Cd packs reach an end voltage of about 14.5V), a voltage 12V T1 R1 1M W1 W2 W3 W4 D3 +ve BYV27-5 C1 100µF 25V C4 100µF Output 25V R2 R3 120 10 D1 -ve D2 C2 Q1 1N4148 0.01µF ZTX650 0V Figure 1 Flyback Topology based Ni-Cd Charger. AN2 - 1 D2 - BYV27-5 T1 DETAILS Core FX3437 With Gap/ Spacer of 0.08mm R4 Former DT2492 Winding order W2, W4, W3 39 then W1 W2 40T 30swg. C3 W4 20T 30swg. 4700pF W3 13T 36swg. W1 12T 36swg. Application Note 2 Issue 2 February 1996 converter of some kind is required. This converter must be short and open circuit protected, be able to operate efficiently over a wide output voltage range and must be insensitive to input voltage variations. A self oscillating flyback converter will meet most of these requirements, being particularly suited to operating over a wide output voltage range. However, the standard circuit needs modifications to cope satisfactorily with short and open circuit loads. These changes include a special biasing circuit and an energy recovery winding on the converter transformer. Circuit Operation When power is first applied to the circuit, a small bias current supplied by R1 via w in ding W1 starts to turn on the transistor Q1. This forces a voltage across W2 and the positive feedback given by the coupling of W1 and W2 causes the transistor to turn hard on, applying the full supply voltage across W2. The base drive voltage induced across W1 makes the junction between R1 and R2 become negative with respect to the 0V supply, forward biasing diode D1 to provide the necessary base current to hold Q1 on. With the transistor on, a magnetising current builds up in W2 which eventually saturates the ferrite core of transformer T1. This results in a sudden increase on the collector current flowing through Q1, causing its collector-emitter voltage to rise and thus reducing the voltage across W2. With the positive feedback given by windings W1 and W2, a falling voltage across W2 causes Q1 to turn off rapidly. The current flowing in W2 now forces the collector voltage of Q1 to swing positive until restricted by transformer output loading. During this “flyback” period, the voltage induced across W4 forward biases the diode D3 to charge the output capacitor C4. Energy stored in the core of the transformer while the transistor was on is dumped into this capacitor which feeds the load. The collector voltage of Q1 remains high until the current flowing in W4 falls to zero.The voltage then falls until the positive feedback given by W1 causes Q1 to turn on hard again to start the next cycle of oscillation. If a load (Ni-Cd battery) is not connected across C4, the energy dumped into this capacitor will charge it to an ever increasing voltage. To restrict the maximum output voltage, an extra transformer winding, W3, has been added which will return stored energy into the input supply via D2 if the output exceeds 20V. A resistor-capacitor network comprised of R4 and C3 has been added to the circuit to limit the turn off transient to within the ratings of Q1. A second network, R3 and C2, was added to maintain the loop gain of the circuit when the diode D1 is not conducting i.e., during start up and switching. Without sufficient gain, the circuit will not oscillate. The capacitor C2 also has an important effect on the operation of the converter when its output is shorted. During the conduction period of Q1, C2 is charged to a negative voltage by winding W1, and this charge remains during the flyback period. This negative bias will inhibit continuous oscillation unless the transformer “rings” sufficiently at the AN2 - 2 Application Note 2 Issue 2 February 1996 end of the flyback period to produce a transient base drive voltage large enough to overcome the bias. Since an output voltage of at least 1.5V is required to pro duc e s u ffic ien t tra ns former ringing, a short circuit load causes the converter to run in an intermittent mode, consuming very little power. Converter Design The converter is to charge a 12V, 2Ah battery pack, which has a recommended charge current rating of 220mA. The typical power source is a 12V car battery. Firstly, a transformer core must be chosen that will give the necessary throughput without the need to operate at an excessive frequency. The choice will be controlled by the peak current passed through winding W2 and the inductance required. The efficiency of the converter can be expected to be around 75%, so with a 12V supply and 12V output load, the average supply current will be: transistor for a given output voltage, resulting in a shorter flyback period. Reducing the flyback period allows a given output power to be achieved with a small peak current in the switching transistor, helping to minimise losses. However this is at the expense of requiring a higher voltage transistor. A compromise duty cycle of 70% was chosen for this design. This gives Ipeak as: Ipeak = The E-Line ZTX650 transistor will yield a high gain at this current and so was chosen as the switching transistor. To k e e p t h e c o n v e r t e r i n a u d i b l e y et minimize switching losses, an oscillation frequency in the range of 20 to 50kHz was chosen. This gives a transistor on time (current build up time) o f 3 5µs t o 1 4µs respectively.The inductance of transformer winding W2 can now be calculated using: Lmax = Io x Vo 0.22 Is = = = 0.29A Vs x Eff 0.75 The actual supply current taken by the converter will be a linear ramp from zero to Ipeak followed by a period of no current flow. The ratio of the ramp period to the whole cycle period is the duty cycle. Because of the simple current waveform, once the duty cycle is known, the peak current in W2 can be calculated from the average supply current. The duty cycle is dependent on the input to output turns ratio of the transformer. The smaller the number of turns on the output winding, the higher the flyback voltage across the switching Is x 2 0.29 x 2 = = 0.83A 0.75 Duty Cy. Vs x Ton 12 x 35E−6 = = 0.5 mH Ipeak 0.83 Similarly, Lmin was calculated to be approximately 0.2mH. The energy storage capability of the suitable RM range of transformer cores are described in the form of Hanna curves. These curves relate I2 x L, I x N and core spacer. The I2 x L value that is required for this transformer is 0.33E-3 to 0.17E-3. The smallest core in the RM range will meet this specification. An RM type FX3437 pair of cores with a 0.08mm spacer will give an I2x L factor of 0.25E-3. This factor is in the required range and also corresponds to a pre-gapped RM AN2 - 3 Application Note 2 Issue 2 February 1996 core type LA14376 which thus can be used as a convenient substitute. The inductance of W2 will be (0.25E-3/(0.832) = 0.36mH, requiring 38.5 turns according to the Hanna curves for this core and gap (rounded to 40 turns). The output winding W4 is determined by: W4 = Vo x Toff x W2 12.7 x 30% x 40 = Vs x Ton 12 x 70% = 18.4, rounded to 20 Note the ratio of Ton to Toff was used above. The output voltage must be limited to 20V by winding W3 and so this gives: W4 = ( Vs + VREC ) x W 4 12.7 x 20 = 20.7 ( Vmax + Vrec) = 12.2, rounded to 13 The base winding W1, is a compromise between providing sufficient base current for a low gain transistor operating with minimum supplies, and avoiding losses caused by overdriving the transistor under normal circumstances. The transistor is required to pass 0.83A peak and a minimum gain device at low temperature will need approximately 15mA to achieve this. A base drive voltage of at least 1.4V is needed to pass any current at all through the biasing circuit adopted and a voltage of twice this is desirable if the base current is to be insensitive to supply voltage variations. A base winding of 12 turns will give a drive of 3.3V with a minimum supply of 10.5V. A base resistor of 120Ω gives the required base current from this drive. Finally, the starting base bias resistor value must be calculated. This resistor must cause the circuit to have sufficient gain to oscillate yet not cause excessive power dissipation if oscillation does not occur due to incorrect winding phasing or some other fault. To oscillate, the loop gain of the circuit must be greater than one. The feedback gain is 12/40 or about 0.3, so the transistor must give a voltage gain of at least 1/0.3 or 3.3. The transistor voltage gain is mainly dependent on the ratio of collector and emitter loads. The small signal collector loading is the result of the tuned circuits made by the transformer windings and associated capacitors, turning out to be of the order of 2k. The emitter loading is the intrinsic emitter resistance, given by re = 25E-3/Ie. For a voltage gain of 3.3, re must be less than 2k/3.3 or 600. The minimum emitter current during start up must be more than 25E-3/600 or 42µA. The hFE of the ZTX650 transistor is not specified at such low currents but it is not expected to be less than 30, so this would set the m i n i m u m b a s e c u r r e n t a t 1 . 5µA. However, because of this uncertainty, the bias was raised to 10µA to ensure reliable starting. This value will only cause a worst case power dissipation of about 70mW in the transistor if the circuit fails to oscillate under fault conditions. Performance Over the intended operational range, the circuit was found to give an efficiency exceeding 70%, providing a useful output from a supply as low as 9V. Full AN2 - 4 Application Note 2 Issue 2 February 1996 input and output characteristics of the converter are given in Figures 2 and 3. Figure 2 shows the output current given by the circuit for various load voltages. Note the output current at 12V is very close to the design aims. This diagram also shows the efficiency of the converter when operating into these loads. Figure 3 shows how the output current given into a 12V load varies with input supply voltage. converter was designed to charge the 2Ah power pack in about 14 hours. At this charge rate, these vented battery packs will safely stand continuous over charging. If the converter is used to charge a different battery pack, Figure 2 should be used to find the output current of the circuit which can then be used to calculate the charge time necessary. In cases where the charge rate is greater than C/10 for vented cells or C/50 for button cells, it is recommended that a timer be included in the circuit to ensure that accidental overcharging does not occur. The time required to fully charge the load batteries will depend on their voltage and ampere-hour capacity. The .5 90 Normal Operation Mode Output Current 80 70 Efficiency .3 60 Efficiency (%) Output Current (Amps) .4 50 40 .20 30 .10 20 Short Circuit Operation Mode Output Current 10 0 0 2 4 6 8 10 12 14 16 18 Output Voltage (Volts) Figure 2 Output Current and Efficiency against Output Voltage for Flyback Converter. AN2 - 5 Application Note 2 Issue 2 February 1996 .275 .25 90 Output Current .225 80 70 Efficiency .175 Efficiency (%) Output Current (Amps) .20 60 .15 50 .125 40 .10 30 .075 20 .05 10 7 8 9 10 11 12 13 14 15 Figure 3 Input Voltage (Volts) Output Current and Efficiency against Input Voltage for Flyback Converter. Partial Characterisation of ZTX650. Full characterisation available upon request. Absolute Maximum Rating Unit ICM 6 A IC 2 A 1 W Parameter Symbol Peak Pulse Current Continuous Collector Current Power Dissipation at Tamb =25°C Parameter Symbol Min Collector-Base Breakdown Voltage V (BR)CBO Collector-Emitter Breakdown Voltage V (BR)CEO Collector-Emitter Saturation Voltage V CE(sat) Static Forward Current Transfer Ratio hFE P tot Typ Unit Conditions 60 V IC=100µA 45 V IC=10mA V V IC=1A, IB=100mA IC=2A, IB=200mA IC=50mA, V CE=2V IC=500mA, V CE=2V IC=1A, V CE=2V IC=2A, V CE=2V 0.12 0.23 70 100 80 40 200 200 170 80 AN2 - 6 Max 0.3 0.5 300