AS5510 - Errata AS5510 Errata Document of Datasheet [v1-07] 2015-Feb-27 This Errata Sheet is valid for AS5510 integrated circuits. It is only valid for parts with the datecodes listed below. Parts with other datecodes are not affected. Deviation 1 Pin A1 indicator marking Affected Parts: Ordering # Datecode# Datecode#4-character AS5510-DWLT 1033JAH B32H AS5510-DWLM Description: All parameters are according to the AS5510_Datasheet, Rev1-23 except the Pin A1 indicator marking position. Details are shown in Figure 1. according data sheet affected material Pin A1 indicator on wrong position Figure 1: Pin A1 Indicator Marking Workaround: Consider for placing the affected parts. ams Errata Sheet [v2-00] 2015-Mar-02 Page 1 Document Feedback AS5510 - Errata Deviation 2 Test pin issue Affected Parts: Ordering # Datecode# Datecode#4-character AS5510-DWLT AS5510-DWLM AS5510-DSOT AS5510-DSOM 1013JAD, 1019JAB, 1033JAH, 1106JAG, 1123JAJ, 1118JAI, 1123JAF, 1310JAD, 1308JAA, 1304JAK, 1326JAA, 1319JAB, 1317JAC, 1317JAA, 1334RAA, 1341RAA, 1350JAC, 1333RAB, 1341RAB, 1416JAB, 1407JAD, 1412JAB A0J5, BCER, B32H, DW84, EUT3, EKYI, EUTZ, KP6T, KL8I, KECC, LLSI, K7YR, K30K, K30I, M06, NHU, NXE, MW68, NFN, NXF, OCJ3, NUR5, N4NN, JAAR, JAII Description: Connecting the pin Test to ground for affected parts could lead to startup problems of the de vice especially at cold temperature caused by the internal test structure. In this case, the device might not power-up at lower temperatures. This effect is only visible if the device is powered down for more than 400ms before a power-up. This is only related to the start-up sequence. Once the device is powered-up, the device is working failure-free unaffected form possible temperature changes. Workaround: This issue can be avoided for the affected parts by not connecting the test pin to ground. The recommended workaround is to use a pull-down resistor or a capacitor connected between the Test pin and ground pin as shown below in Figure 2. Option: Keep the Test pin open or connect a 100k pull-down Improved Option: Capacitor to GND An open Test-pin or a pull-down resistor of 100KΩ to GND with minimum wiring to I2C signals will permanently solve the failure behavior. For improved EMV and noise disturbance performance, a capacitor of 100 … 470 pF between Test pin and GND is recommended. VDD = 2.5 ~ 3.6V VDD = 2.5 ~ 3.6V VDD VDD 100nF AS5510 #1 SCL I²C ADDR= SDA 56h ADR 100nF AS5510 SCL SDA ADR VSS MCU I²C #1 VDD 2.7 ~ 10k 2.7 ~ 10k VSS VDD SCL I²C ADDR= SDA 56h ADR MCU SCL SDA I²C ADR Test Test 100K 100 … 470pF Figure 2: Recommended Workarounds ams Errata Sheet [v2-00] 2015-Mar-02 Page 2 Document Feedback AS5510 - Errata Copyrights & Disclaimer Copyright ams AG, Tobelbader Strasse 30, 8141 Unterpremstaetten, Austria -Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. Devices sold by ams AG are covered by the warranty and patent ind emnification provisions appearing in its General Terms of Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein. ams AG reserves the right to change specifications and prices at any time and without notice. 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