DFN (Divider) www.vishay.com Vishay Dale Thin Film Dual Flat No Lead Molded Precision Thin Film Divider, Surface Mount Resistor Network FEATURES • 0.8 mm lead pitch • MSL level 1 per J-STD-020 • Low profile 1 mm seated height • Small size 4 mm x 4 mm size 50 % board savings over SOIC packages • Low TCR ± 25 ppm, TCR tracking to ± 5 ppm • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 The DFN series of thin film precision dividers surface mount resistor networks offer a wide ratio range that is listed in the standard resistance offering table. The 4 mm x 4 mm 0.8 mm pitch dual flat no lead package feature 50 % savings in board space over traditional SOIC packages. The DFN dividers are ideal for applications that require tight TC tracking and ratio tolerances over temperature. TYPICAL PERFORMANCE TCR TOL. SCHEMATIC 8 R1 7 R2 1 6 R2 2 5 TRACKING 25 5 ABSOLUTE RATIO 0.1 0.05 STANDARD RESISTANCE OFFERING (R1/R2) R1 3 ABSOLUTE 4 RATIO R1 R2 100:1 100K 1K 50:1 50K 1K 25:1 25K 1K 20:1 20K 1K 10:1 10K 1K 5:1 10K 2K 2:1 10K 5K STANDARD ELECTRICAL SPECIFICATIONS TEST Material SPECIFICATIONS CONDITIONS Passivated nichrome - Pin/Lead Number 8 - Resistance Range 1000 to 100 k per element - TCR: Absolute ± 25 ppm/°C -55 °C to +125 °C TCR: Tracking ± 5 ppm/°C -55 °C to +125 °C Tolerance: Absolute ± 0.1 % +25 °C Tolerance: Ratio ± 0.05 % +25 °C Power Rating: Resistor 100 mW Maximum at +70 °C Power Rating: Package 100 mW x number of resistors Maximum at +70 °C Stability: Absolute R ± 0.05 % 2000 h at +70 °C Stability: Ratio R ± 0.015 % 2000 h at +70 °C Voltage Coefficient Working Voltage < 0.1 ppm/V 100 V max. not to exceed P x R - Operating Temperature Range -55 °C to +125 °C - Storage Temperature Range -55 °C to +150 °C - Noise < - 30 dB - < 0.08 μV/°C - Shelf Life Stability: Absolute R ± 0.01 % 1 year at + 25 °C Shelf Life Stability: Ratio R ± 0.002 % 1 year at + 25 °C Thermal EMF Revision: 28-May-15 Document Number: 60110 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DFN (Divider) www.vishay.com Vishay Dale Thin Film DIMENSIONS AND IMPRINTING in millimeters 3.500 ± 0.050 Exposed Pad 4.000 ± 0.050 8 0.800 BSC 0.300 ± 0.050 (1) Part Number to be 4 Characters 5 6 7 8 DFNA xxxx MMYY 4.000 ± 0.050 Pin 1 Dot by Marking 5 2.700 ± 0.050 Exposed Pad 1 4 (4 mm x 4 mm) TOP VIEW 4 Date Code (MMYY) 0.400 ± 0.050 3 2 1 Pin 1 Indentification Chamfer 0.300 x 45° 2.400 Ref. BOTTOM VIEW A A Max. Nom. Min. 0.900 0.850 0.800 0.000 - 0.050 SIDE VIEW 0.203 Ref. Notes (1) 100-1 resistance ratio part marking to be 100(2) Contact factory for package outlines for higher pin count or custom configurations MECHANICAL SPECIFICATIONS Resistive Element Passivated nichrome Substrate Material Ceramic Body Molded epoxy Terminals Copper alloy Plating 100 % matte tin Marking Resistance to Solvents Per MIL-PRF-914 GLOBAL PART NUMBER INFORMATION D F N A 5 - 1 U F GLOBAL MODEL (4 digits) RESISTANCE (3, 4 or 5 digits) PACKAGING DFNA (Lead (Pb)-free) (e3) 2-1 5-1 10-1 20-1 25-1 50-1 100-1 TAPE AND REEL T0 = 100 min., 100 mult T1 = 1000 min., 1000 mult (3) T3 = 300 min., 300 mult T5 = 500 min., 500 mult TF = Full reel 3000 TS = 100 min., 1 mult UF = TUBED Note Preferred packaging code (3) Revision: 28-May-15 Document Number: 60110 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000