LT1963 Series 1.5A, Low Noise, Fast Transient Response LDO Regulators U FEATURES DESCRIPTIO ■ The LT ®1963 series are low dropout regulators optimized for fast transient response. The devices are capable of supplying 1.5A of output current with a dropout voltage of 340mV. Operating quiescent current is 1mA, dropping to < 1µA in shutdown. Quiescent current is well controlled; it does not rise in dropout as it does with many other regulators. In addition to fast transient response, the LT1963 regulators have very low output noise which makes them ideal for sensitive RF supply applications. Output voltage range is from 1.21V to 20V. The LT1963 regulators are stable with output capacitors as low as 10µF. Internal protection circuitry includes reverse battery protection, current limiting, thermal limiting and reverse current protection. The devices are available in fixed output voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an adjustable device with a 1.21V reference voltage. The LT1963 regulators are available in 5-lead TO-220, DD, 3-lead SOT-223, 8-lead SO, and Exposed Pad 16-lead TSSOP packages. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Optimized for Fast Transient Response Output Current: 1.5A Dropout Voltage: 340mV Low Noise: 40µVRMS (10Hz to 100kHz) 1mA Quiescent Current No Protection Diodes Needed Controlled Quiescent Current in Dropout Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V Adjustable Output from 1.21V to 20V < 1µA Quiescent Current in Shutdown Stable with 10µF Output Capacitor Reverse Battery Protection No Reverse Current Thermal Limiting 5-Lead TO-220, DD, 3-Lead SOT-223, 8-Lead SO and 16-Lead TSSOP Packages U APPLICATIO S ■ 3.3V to 2.5V Logic Power Supplies Post Regulator for Switching Supplies , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 6118263, 6144250. U ■ TYPICAL APPLICATION Dropout Voltage 400 350 IN + VIN > 3V 10µF OUT LT1963-2.5 SHDN 2.5V 1.5A + 10µF SENSE GND DROPOUT VOLTAGE (mV) 3.3V to 2.5V Regulator 300 250 200 150 100 1963 TA01 50 0 0 0.2 0.4 0.6 0.8 1.0 1.2 OUTPUT CURRENT (A) 1.4 1.6 1963 TA02 1963fc 1 LT1963 Series U W W W ABSOLUTE AXI U RATI GS (Note 1) IN Pin Voltage ........................................................ ±20V OUT Pin Voltage .................................................... ±20V Input to Output Differential Voltage (Note 2) ......... ±20V SENSE Pin Voltage ............................................... ±20V ADJ Pin Voltage ...................................................... ±7V SHDN Pin Voltage ................................................. ±20V Output Short-Circuit Duration ......................... Indefinite Operating Junction Temperature Range – 40°C to 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C U U W PACKAGE/ORDER I FOR ATIO TOP VIEW FRONT VIEW FRONT VIEW TAB IS GND 5 SENSE/ADJ* 5 SENSE/ ADJ* 4 OUT 4 OUT 3 GND 3 GND 2 IN 2 IN 1 SHDN 1 SHDN TAB IS GND Q PACKAGE 5-LEAD PLASTIC DD T PACKAGE 5-LEAD PLASTIC TO-220 GND 1 16 GND NC 2 15 NC OUT 3 OUT 4 OUT 5 12 IN SENSE/ADJ* 6 11 NC GND 7 10 SHDN GND 8 9 14 IN 17 *PIN 6 = SENSE FOR LT1963-1.5/ LT1963-1.8/LT1963-2.5/ LT1963-3.3 = ADJ FOR LT1963 13 IN GND *PIN 5 = SENSE FOR LT1963-1.5/LT1963-1.8/ LT1963-2.5/LT1963-3.3 = ADJ FOR LT1963 TJMAX = 150°C, θJA = 30°C/ W *PIN 5 = SENSE FOR LT1963-1.5/LT1963-1.8/ LT1963-2.5/LT1963-3.3 = ADJ FOR LT1963 TJMAX = 150°C, θJA = 50°C/ W ORDER PART NUMBER ORDER PART NUMBER ORDER PART NUMBER FE PART MARKING LT1963EQ LT1963EQ-1.5 LT1963EQ-1.8 LT1963EQ-2.5 LT1963EQ-3.3 LT1963ET LT1963ET-1.5 LT1963ET-1.8 LT1963ET-2.5 LT1963ET-3.3 LT1963EFE LT1963EFE-1.5 LT1963EFE-1.8 LT1963EFE-2.5 LT1963EFE-3.3 1963EFE 1963EFE15 1963EFE18 1963EFE25 1963EFE33 FE PACKAGE 16-LEAD PLASTIC TSSOP EXPOSED PAD (PIN 17) IS GND. MUST BE SOLDERED TO THE PCB. TJMAX = 150°C, θJA = 38°C/ W TOP VIEW FRONT VIEW 3 TAB IS GND 2 1 OUT GND OUT 1 8 IN SENSE/ADJ* 2 7 GND GND 3 6 GND NC 4 5 SHDN IN S8 PACKAGE 8-LEAD PLASTIC SO ST PACKAGE 3-LEAD PLASTIC SOT-223 *PIN 2 = SENSE FOR LT1963-1.5/LT1963-1.8/ LT1963-2.5/LT1963-3.3 = ADJ FOR LT1963 TJMAX = 150°C, θJA = 70°C/ W TJMAX = 150°C, θJA = 50°C/ W ORDER PART NUMBER ST PART MARKING ORDER PART NUMBER S8 PART MARKING LT1963EST-1.5 LT1963EST-1.8 LT1963EST-2.5 LT1963EST-3.3 196315 196318 196325 196333 LT1963ES8 LT1963ES8-1.5 LT1963ES8-1.8 LT1963ES8-2.5 LT1963ES8-3.3 1963 196315 196318 196325 196333 Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. 1963fc 2 LT1963 Series ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 3) PARAMETER CONDITIONS Minimum Input Voltage (Notes 4,12) ILOAD = 0.5A ILOAD = 1.5A Regulated Output Voltage (Note 5) LT1963-1.5 LT1963-1.8 LT1963-2.5 LT1963-3.3 MIN 1.477 1.447 1.500 1.500 1.523 1.545 V V VIN = 2.3V, ILOAD = 1mA 2.8V < VIN < 20V, 1mA < ILOAD < 1.5A ● 1.773 1.737 1.800 1.800 1.827 1.854 V V VIN = 3V, ILOAD = 1mA 3.5V < VIN < 20V, 1mA < ILOAD < 1.5A ● 2.462 2.412 2.500 2.500 2.538 2.575 V V VIN = 3.8V, ILOAD = 1mA 4.3V < VIN < 20V, 1mA < ILOAD < 1.5A ● 3.250 3.200 3.300 3.300 3.350 3.400 V V VIN = 2.21V, ILOAD = 1mA 2.5V < VIN < 20V, 1mA < ILOAD < 1.5A ● 1.192 1.174 1.210 1.210 1.228 1.246 V V 2.0 2.5 3.0 3.5 1.5 10 10 10 10 10 mV mV mV mV mV 2 9 18 mV mV 2 10 20 mV mV 2.5 15 30 mV mV 3 20 35 mV mV 2 8 15 mV mV 0.02 0.06 0.10 V V 0.10 0.17 0.22 V V 0.19 0.27 0.35 V V 0.34 0.45 0.55 V V 1.0 1.1 3.8 15 80 1.5 1.6 5.5 25 120 mA mA mA mA mA ∆VIN = 2.21V to 20V, ILOAD = 1mA ∆VIN = 2.3V to 20V, ILOAD = 1mA ∆VIN = 3V to 20V, ILOAD = 1mA ∆VIN = 3.8V to 20V, ILOAD = 1mA ∆VIN = 2.21V to 20V, ILOAD = 1mA ● ● ● ● ● Load Regulation LT1963-1.5 VIN = 2.5V, ∆ILOAD = 1mA to 1.5A VIN = 2.5V, ∆ILOAD = 1mA to 1.5A ● VIN = 2.8V, ∆ILOAD = 1mA to 1.5A VIN = 2.8V, ∆ILOAD = 1mA to 1.5A ● VIN = 3.5V, ∆ILOAD = 1mA to 1.5A VIN = 3.5V, ∆ILOAD = 1mA to 1.5A ● VIN = 4.3V, ∆ILOAD = 1mA to 1.5A VIN = 4.3V, ∆ILOAD = 1mA to 1.5A ● LT1963 (Note 4) VIN = 2.5V, ∆ILOAD = 1mA to 1.5A VIN = 2.5V, ∆ILOAD = 1mA to 1.5A ● ILOAD = 1mA ILOAD = 1mA ● ILOAD = 100mA ILOAD = 100mA ● ILOAD = 500mA ILOAD = 500mA ● ILOAD = 1.5A ILOAD = 1.5A ● ILOAD = 0mA ILOAD = 1mA ILOAD = 100mA ILOAD = 500mA ILOAD = 1.5A ● ● ● ● ● GND Pin Current VIN = VOUT(NOMINAL) + 1V (Notes 6, 8) V V ● LT1963-1.5 LT1963-1.8 LT1963-2.5 LT1963-3.3 LT1963 (Note 4) Dropout Voltage VIN = VOUT(NOMINAL) (Notes 6, 7, 12) 2.5 VIN = 2.21V, ILOAD = 1mA 2.5V < VIN < 20V, 1mA < ILOAD < 1.5A Line Regulation LT1963-3.3 UNITS ● LT1963 LT1963-2.5 MAX 1.9 2.1 2.5V < VIN < 20V, 1mA < ILOAD < 1.5A ADJ Pin Voltage (Notes 4, 5) LT1963-1.8 TYP µVRMS Output Voltage Noise COUT = 10µF, ILOAD = 1.5A, BW = 10Hz to 100kHz 40 ADJ Pin Bias Current (Notes 4, 9) 3 10 µA Shutdown Threshold VOUT = Off to On VOUT = On to Off 0.90 0.75 2 V V 0.01 3 1 30 µA µA 0.01 1 SHDN Pin Current (Note 10) ● ● 0.25 VSHDN = 0V VSHDN = 20V Quiescent Current in Shutdown VIN = 6V, VSHDN = 0V Ripple Rejection VIN – VOUT = 1.5V (Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 0.75A 55 63 µA dB 1963fc 3 LT1963 Series ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 3) PARAMETER CONDITIONS Current Limit VIN = 7V, VOUT = 0V VIN = VOUT(NOMINAL) + 1V, ∆VOUT = – 0.1V Input Reverse Leakage Current (Note 13) Reverse Output Current (Note 11) MIN Q, T, S8 Packages VIN = – 20V, VOUT = 0V ST Package VIN = – 20V, VOUT = 0V LT1963-1.5 VOUT = 1.5V, VIN < 1.5V LT1963-1.8 VOUT = 1.8V, VIN < 1.8V LT1963-2.5 VOUT = 2.5V, VIN < 2.5V LT1963-3.3 VOUT = 3.3V, VIN < 3.3V LT1963 (Note 4) VOUT = 1.21V, VIN < 1.21V Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Absolute maximum input to output differential voltage can not be achieved with all combinations of rated IN pin and OUT pin voltages. With the IN pin at 20V, the OUT pin may not be pulled below 0V. The total measured voltage from IN to OUT can not exceed ±20V. Note 3: The LT1963 regulators are tested and specified under pulse load conditions such that TJ ≈ TA. The LT1963 is 100% tested at TA = 25°C. Performance at – 40°C and 125°C is assured by design, characterization and correlation with statistical process controls. Note 4: The LT1963 (adjustable version) is tested and specified for these conditions with the ADJ pin connected to the OUT pin. Note 5: Operating conditions are limited by maximum junction temperature. The regulated output voltage specification will not apply for all possible combinations of input voltage and output current. When operating at maximum input voltage, the output current range must be limited. When operating at maximum output current, the input voltage range must be limited. Note 6: To satisfy requirements for minimum input voltage, the LT1963 (adjustable version) is tested and specified for these conditions with an TYP MAX 2 ● A A 1.6 ● ● 600 600 600 600 300 UNITS 1 2 mA mA 1200 1200 1200 1200 600 µA µA µA µA µA external resistor divider (two 4.12k resistors) for an output voltage of 2.4V. The external resistor divider will add a 300µA DC load on the output. Note 7: Dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage will be equal to: VIN – VDROPOUT. Note 8: GND pin current is tested with VIN = VOUT(NOMINAL) + 1V and a current source load. The GND pin current will decrease at higher input voltages. Note 9: ADJ pin bias current flows into the ADJ pin. Note 10: SHDN pin current flows into the SHDN pin. Note 11: Reverse output current is tested with the IN pin grounded and the OUT pin forced to the rated output voltage. This current flows into the OUT pin and out the GND pin. Note 12. For the LT1963, LT1963-1.5 and LT1963-1.8 dropout voltage will be limited by the minimum input voltage specification under some output voltage/load conditions. Note 13. For the ST package, the input reverse leakage current increases due to the additional reverse leakage current for the SHDN pin, which is tied internally to the IN pin. 1963fc 4 LT1963 Series U W TYPICAL PERFOR A CE CHARACTERISTICS Typical Dropout Voltage Guaranteed Dropout Voltage GUARANTEED DROPOUT VOLTAGE (mV) 600 450 350 TJ = 125°C 300 250 TJ = 25°C 200 150 100 50 0 0 0.2 0.4 0.6 0.8 1.0 1.2 OUTPUT CURRENT (A) 1.4 450 500 TJ ≤ 125°C 400 TJ ≤ 25°C 300 200 1.6 OUTPUT VOLTAGE (V) LT1963 0.6 0.4 VIN = 6V RL = ∞, IL = 0 VSHDN = VIN 0.2 0.4 0.6 0.8 1.0 1.2 OUTPUT CURRENT (A) 1.4 50 25 75 0 TEMPERATURE (°C) 100 1.6 150 1.52 1.82 1.51 1.50 1.49 1.48 0 25 50 75 100 1.79 1.78 IL = 1mA 1.220 OUTPUT VOLTAGE (V) 3.34 3.32 3.30 3.28 3.26 3.24 25 50 75 TEMPERATURE (°C) 100 125 1963 G06 75 100 125 1963 G05 IL = 1mA 2.54 0 50 LT1963 ADJ Pin Voltage 1.225 2.42 –50 –25 25 1.230 3.36 2.44 0 TEMPERATURE (°C) 1963 G04i 2.56 2.46 125 1963 G03 1.80 LT1963-3.3 Output Voltage 2.48 100 1.81 1.76 –50 –25 125 3.38 2.50 50 25 0 75 TEMPERATURE (°C) 1.77 TEMPERATURE (°C) IL = 1mA –25 IL = 1mA 1.83 LT1963-2.5 Output Voltage IL = 1mA 1.84 1.53 1963 G04 2.52 IL = 100mA LT1963-1.8 Output Voltage IL = 1mA 1.46 –50 –25 125 IL = 0.5A 200 1963 • G02 1.47 2.58 OUTPUT VOLTAGE (V) 250 0 –50 ADJ PIN VOLTAGE (V) QUIESCENT CURRENT (mA) LT1963-1.5/-1.8/-2.5/-3.3 IL = 1.5A 300 LT1963-1.5 Output Voltage 1.54 0 – 50 – 25 0 1963 • G01 1.0 0.2 350 50 Quiescent Current 0.8 400 100 100 0 1.4 1.2 TEST POINTS OUTPUT VOLTAGE (V) DROPOUT VOLTAGE (mV) 400 Dropout Voltage 500 DROPOUT VOLTAGE (mV) 500 3.22 –50 –25 1.215 1.210 1.205 1.200 1.195 0 25 50 75 100 125 TEMPERATURE (°C) 1.190 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) 1963 G07 1963 G08 1963fc 5 LT1963 Series U W TYPICAL PERFOR A CE CHARACTERISTICS LT1963-1.8 Quiescent Current 14 14 10 8 6 4 10 8 6 4 0 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 9 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 LT1963-3.3 Quiescent Current 6 4 0.8 0.6 0.4 0 0 8 9 2 4 25 5 GND PIN CURRENT (mA) 15 10 RL = 25, IL = 100mA* 5 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 RL = 5, IL = 300mA* 5 RL = 15, IL = 100mA* 0 9 10 1963 G13 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 0 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 9 10 LT1963 G12i 25 TJ = 25°C VSHDN = VIN *FOR VOUT = 3.3V 20 15 RL = 11, IL = 300mA* 10 RL = 33, IL = 100mA* 5 RL = 250, IL = 10mA* 0 0 1 10 LT1963-3.3 GND Pin Current RL = 8.33, IL = 300mA* RL = 180, IL = 10mA* 0 15 6 8 10 12 14 16 18 20 INPUT VOLTAGE (V) TJ = 25°C VSHDN = VIN *FOR VOUT = 2.5V 20 RL = 18, IL = 100mA* 10 TJ = 25°C VSHDN = VIN *FOR VOUT = 1.5V 20 GND PIN CURRENT (mA) 25 9 1963 G10 LT1963-2.5 GND Pin Current RL = 6, IL = 300mA* 8 1963 G12 LT1963-1.8 GND Pin Current 10 3 4 5 6 7 INPUT VOLTAGE (V) RL = 150, IL = 10mA* 1963 G11 15 2 0 0 10 TJ = 25°C VSHDN = VIN 20 *FOR VOUT = 1.8V 1 LT1963-1.5 GND Pin Current 1.0 0.2 3 4 5 6 7 INPUT VOLTAGE (V) 0 TJ = 25°C RL = 4.3k VSHDN = VIN 1.2 2 2 10 GND PIN CURRENT (mA) 8 1 9 25 1.4 QUIESCENT CURRENT (mA) QUIESCENT CURRENT (mA) 10 0 4 LT1963 Quiescent Current TJ = 25°C RL = ∞ VSHDN = VIN 12 6 1963 G09 1963 G08i 14 8 0 0 10 10 2 0 0 TJ = 25°C RL = ∞ VSHDN = VIN 12 2 2 GND PIN CURRENT (mA) 14 TJ = 25°C RL = ∞ VSHDN = VIN 12 QUIESCENT CURRENT (mA) QUIESCENT CURRENT (mA) TJ = 25°C RL = ∞ 12 VSHDN = VIN LT1963-2.5 Quiescent Current QUIESCENT CURRENT (mA) LT1963-1.5 Quiescent Current 9 10 1963 G14 RL = 330, IL = 100mA* 0 0 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 9 10 1963 G15 1963fc 6 LT1963 Series U W TYPICAL PERFOR A CE CHARACTERISTICS LT1963 GND Pin Current 100 TJ = 25°C VSHDN = VIN *FOR VOUT = 1.21V GND PIN CURRENT (mA) GND PIN CURRENT (mA) 80 RL = 4.33, IL = 300mA* 6 4 RL = 12.1, IL = 100mA* 2 70 60 50 RL = 1.5, IL = 1A* 40 0 0 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 30 0 1 2 100 3 4 5 6 7 INPUT VOLTAGE (V) 8 RL = 2.5, IL = 1A* RL = 5, IL = 500mA* 80 70 RL = 2.2, IL = 1.5A* 60 50 40 RL = 3.3, IL = 1A* 30 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 9 0 10 80 0.8 SHDN PIN THRESHOLD (V) 0.9 50 40 30 20 0 0.2 0.4 0.6 0.8 1.0 1.2 OUTPUT CURRENT (A) 1.4 1.6 1963 G21 9 10 70 60 RL = 0.81, IL = 1.5A* 50 40 30 RL = 1.21, IL = 1A* 1 2 3 4 5 6 7 INPUT VOLTAGE (V) RL = 2.42, IL = 500mA* 0 8 9 10 0 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 10 1963 G20 SHDN Pin Threshold (Off-to-On) IL = 1mA 0.9 0.7 0.6 0.5 0.4 0.3 0.2 0 –50 9 1.0 0.1 10 0 80 10 SHDN PIN THRESHOLD (V) VIN = VOUT (NOMINAL) +1V 90 60 8 TJ = 25°C VSHDN = VIN *FOR VOUT = 1.21V 90 SHDN Pin Threshold (On-to-Off) 1.0 70 3 4 5 6 7 INPUT VOLTAGE (V) 1963 G19 GND Pin Current vs ILOAD GND PIN CURRENT (mA) 100 RL = 6.6, IL = 500mA* 1963 G18 100 2 20 10 0 1 1 LT1963 GND Pin Current 0 0 RL = 3.6, IL = 500mA* 1963 G17 20 20 10 RL = 1.8, IL = 1A* 0 10 GND PIN CURRENT (mA) GND PIN CURRENT (mA) GND PIN CURRENT (mA) 50 30 9 TJ = 25°C VSHDN = VIN *FOR VOUT = 3.3V 90 RL = 1.67, IL = 1.5A* 40 30 LT1963-3.3 GND Pin Current TJ = 25°C VSHDN = VIN *FOR VOUT = 2.5V 60 40 1963 G16i 100 70 50 0 0 RL = 1.2, IL = 1.5A* 60 10 LT1963-2.5 GND Pin Current 80 70 20 RL = 3, IL = 500mA* 1963 G16 90 80 10 9 10 TJ = 25°C VSHDN = VIN *FOR VOUT = 1.8V 90 RL = 1, IL = 1.5A* 20 RL = 121, IL = 10mA* 100 TJ = 25°C VSHDN = VIN *FOR VOUT = 1.5V 90 GND PIN CURRENT (mA) 10 8 LT1963-1.8 GND Pin Current LT1963-1.5 GND Pin Current IL = 1.5A 0.8 0.7 0.6 IL = 1mA 0.5 0.4 0.3 0.2 0.1 –25 50 25 0 75 TEMPERATURE (°C) 100 125 1963 G22 0 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 1963 G23 1963fc 7 LT1963 Series U W TYPICAL PERFOR A CE CHARACTERISTICS SHDN Pin Input Current SHDN Pin Input Current SHDN PIN INPUT CURRENT (µA) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 2 4 5 4 3 2 6 8 10 12 14 16 18 20 SHDN PIN VOLTAGE (V) Current Limit 50 25 75 0 TEMPERATURE (°C) 100 1.5 1.0 2.5 2.0 1.5 1.0 0.5 0.5 ∆VOUT = 100mV 6 8 10 12 14 16 18 20 4 INPUT/OUTPUT DIFFERENTIAL (V) Reverse Output Current RIPPLE REJECTION (dB) LT1963 –25 50 25 0 75 TEMPERATURE (°C) 100 0.1 100 125 1963 G30 LT1963 2.5 2.0 LT1963-3.3 1.5 LT1963-2.5 1.0 0 125 3 4 5 6 7 8 OUTPUT VOLTAGE (V) CURRENT FLOWS INTO OUTPUT PIN VOUT = VADJ (LT1963) VOUT = VFB (LT1963-1.5/-1.8/-2.5/-3.3) 0 1 9 2 10 1963 G29 Ripple Rejection 70 74 60 50 40 COUT = 100µF TANTALUM +10 × 1µF CERAMIC COUT = 10µF TANTALUM 0.2 50 25 0 75 TEMPERATURE (°C) 3.0 76 20 LT1963-1.8 3.5 80 30 LT1963-1.5 4.0 Ripple Rejection 0.4 125 100 TJ = 25°C 4.5 VIN = 0V 1963 G28 1.0 VIN = 0V 0.9 VOUT = 1.21V (LT1963) = 1.5V (LT1963-1.5) V 0.8 VOUT = 1.8V (LT1963-1.8) OUT 0.7 VOUT = 2.5V (LT1963-2.5) VOUT = 3.3V (LT1963-3.3) 0.6 LT1963-1.5/-1.8/-2.5/-3.3 0.5 50 25 0 75 TEMPERATURE (°C) –25 0.5 0 –50 1963 G27 REVERSE OUTPUT CURRENT (mA) 1.0 1963 G26 REVERSE OUTPUT CURRENT (mA) CURRENT LIMIT (A) CURRENT LIMIT (A) TJ = – 50°C TJ = 125°C –25 1.5 Reverse Output Current 3.0 TJ = 25°C 0 –50 2.0 5.0 2.5 0.3 2.5 Current Limit VIN = 7V 3.5 VOUT = 0V 2 3.0 0 –50 125 4.0 0 3.5 1963 G25 3.0 2.0 4.0 0.5 1963 G24 0 4.5 1 0 –50 –25 0 0 VSHDN = 20V 6 10 IL = 0.75A VIN = VOUT(NOMINAL) +1V + 50mVRMS RIPPLE 0 10 1k 10k 1M 100 100k FREQUENCY (Hz) 1963 G31 RIPPLE REJECTION (dB) SHDN PIN INPUT CURRENT (µA) 4.5 ADJ PIN BIAS CURRENT (µA) 5.0 ADJ Pin Bias Current 5.0 7 72 70 68 66 64 IL = 0.75A VIN = VOUT(NOMINAL) +1V + 0.5VP-P RIPPLE AT f = 120Hz 62 50 100 25 75 – 50 – 25 0 TEMPERATURE (°C) 125 1963 G32 1963fc 8 LT1963 Series U W TYPICAL PERFOR A CE CHARACTERISTICS LT1963 Minimum Input Voltage LOAD REGULATION (mV) IL = 500mA 2.0 IL = 100mA 1.0 0.5 0 50 25 75 0 TEMPERATURE (°C) 100 125 LT1963 –5 LT1963-2.5 LT1963-3.3 –10 –15 VIN = VOUT(NOMINAL) +1V (LT1963-1.5/-1.8/-2.5/-3.3) VIN = 2.7V (LT1963) ∆IL = 1mA TO 1.5A – 20 –50 –25 50 25 75 0 TEMPERATURE (°C) 1963 G33 50 100 125 1.0 COUT = 10µF IL =1.5A LT1963-2.5 LT1963-3.3 0.1 LT1963-1.8 0.01 10 100 LT1963 LT1963-1.5 1k 10k FREQUENCY (Hz) 100k 1963 G35 1963 G34 RMS Output Noise vs Load Current (10Hz to 100kHz) LT1963-3.3 10Hz to 100kHz Output Noise COUT = 10µF OUTPUT NOISE VOLTAGE (µVRMS) 45 40 LT1963-3.3 35 LT1963-2.5 30 25 LT1963-1.8 20 LT1963-1.5 LT1963 15 VOUT 100µV/DIV 10 5 0 0.0001 0.001 0.01 0.1 LOAD CURRENT (A) 10 1 COUT = 10µF ILOAD = 1.5A 1ms/DIV 1963 G37 1063 G36 LT1963-3.3 Transient Response LT1963-3.3 Transient Response 150 200 OUTPUT VOLTAGE DEVIATION (mV) VIN = 4.3V 150 CIN = 3.3µF TANTALUM COUT = 10µF TANTALUM 100 50 0 100 50 0 –50 –100 –50 –100 –150 0.6 1.5 LOAD CURRENT (A) 0 –50 –25 LT1963-1.8 OUTPUT VOLTAGE DEVIATION (mV) 1.5 LT1963-1.5 5 IL = 1.5A OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz) 10 LOAD CURRENT (A) MINIMUM INPUT VOLTAGE (V) 2.5 Output Noise Spectral Density Load Regulation 3.0 0.4 0.2 0 0 2 4 6 8 10 12 14 16 18 20 TIME (µs) 1963 G38 VIN = 4.3V CIN = 33µF TANTALUM COUT = 100µF TANTALUM +10 × 1µF CERAMIC 1.0 0.5 0 0 50 100 150 200 250 300 350 400 450 500 TIME (µs) 1963 G39 1963fc 9 LT1963 Series U U U PI FU CTIO S OUT: Output. The output supplies power to the load. A minimum output capacitor of 10µF is required to prevent oscillations. Larger output capacitors will be required for applications with large transient loads to limit peak voltage transients. See the Applications Information section for more information on output capacitance and reverse output characteristics. SENSE: Sense. For fixed voltage versions of the LT1963 (LT1963-1.5/LT1963-1.8/LT1963-2.5/LT1963-3.3), the SENSE pin is the input to the error amplifier. Optimum regulation will be obtained at the point where the SENSE pin is connected to the OUT pin of the regulator. In critical applications, small voltage drops are caused by the resistance (RP) of PC traces between the regulator and the load. These may be eliminated by connecting the SENSE pin to the output at the load as shown in Figure 1 (Kelvin Sense Connection). Note that the voltage drop across the external PC traces will add to the dropout voltage of the regulator. The SENSE pin bias current is 600µA at the nominal rated output voltage. The SENSE pin can be pulled below ground (as in a dual supply system where the regulator load is returned to a negative supply) and still allow the device to start and operate. IN OUT LT1963 + VIN SHDN RP + SENSE LOAD GND RP 1963 F01 Figure 1. Kelvin Sense Connection ADJ: Adjust. For the adjustable LT1963, this is the input to the error amplifier. This pin is internally clamped to ±7V. It has a bias current of 3µA which flows into the pin. The ADJ pin voltage is 1.21V referenced to ground and the output voltage range is 1.21V to 20V. SHDN: Shutdown. The SHDN pin is used to put the LT1963 regulators into a low power shutdown state. The output will be off when the SHDN pin is pulled low. The SHDN pin can be driven either by 5V logic or open-collector logic with a pull-up resistor. The pull-up resistor is required to supply the pull-up current of the open-collector gate, normally several microamperes, and the SHDN pin current, typically 3µA. If unused, the SHDN pin must be connected to VIN. The device will be in the low power shutdown state if the SHDN pin is not connected. IN: Input. Power is supplied to the device through the IN pin. A bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. In general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. A bypass capacitor in the range of 1µF to 10µF is sufficient. The LT1963 regulators are designed to withstand reverse voltages on the IN pin with respect to ground and the OUT pin. In the case of a reverse input, which can happen if a battery is plugged in backwards, the device will act as if there is a diode in series with its input. There will be no reverse current flow into the regulator and no reverse voltage will appear at the load. The device will protect both itself and the load. Exposed Pad: GND. The Exposed Pad (FE Package) is ground and must be soldered to the PCB for rated thermal performance. 1963fc 10 LT1963 Series U W U U APPLICATIO S I FOR ATIO The LT1963 series are 1.5A low dropout regulators optimized for fast transient response. The devices are capable of supplying 1.5A at a dropout voltage of 350mV. The low operating quiescent current (1mA) drops to less than 1µA in shutdown. In addition to the low quiescent current, the LT1963 regulators incorporate several protection features which make them ideal for use in battery-powered systems. The devices are protected against both reverse input and reverse output voltages. In battery backup applications where the output can be held up by a backup battery when the input is pulled to ground, the LT1963-X acts like it has a diode in series with its output and prevents reverse current flow. Additionally, in dual supply applications where the regulator load is returned to a negative supply, the output can be pulled below ground by as much as 20V and still allow the device to start and operate. Adjustable Operation The adjustable version of the LT1963 has an output voltage range of 1.21V to 20V. The output voltage is set by the ratio of two external resistors as shown in Figure 2. The device servos the output to maintain the voltage at the ADJ pin at 1.21V referenced to ground. The current in R1 is then equal to 1.21V/R1 and the current in R2 is the current in R1 plus the ADJ pin bias current. The ADJ pin bias current, 3µA at 25°C, flows through R2 into the ADJ pin. The output voltage can be calculated using the formula in Figure 2. The value of R1 should be less than 4.17k to minimize errors in the output voltage caused by the ADJ pin bias current. Note that in shutdown the output is turned off and the divider current will be zero. IN VIN OUT VOUT R2 LT1963 + ADJ GND R1 1963 F02 ⎛ R2⎞ VOUT = 1.21V ⎜ 1 + ⎟ + (IADJ )(R2) ⎝ R1⎠ VADJ = 1.21V IADJ = 3µA AT 25°C OUTPUT RANGE = 1.21V TO 20V Figure 2. Adjustable Operation The adjustable device is tested and specified with the ADJ pin tied to the OUT pin for an output voltage of 1.21V. Specifications for output voltages greater than 1.21V will be proportional to the ratio of the desired output voltage to 1.21V: VOUT/1.21V. For example, load regulation for an output current change of 1mA to 1.5A is – 3mV typical at VOUT = 1.21V. At VOUT = 5V, load regulation is: (5V/1.21V)(–3mV) = – 12.4mV Output Capacitance and Transient Response The LT1963 regulators are designed to be stable with a wide range of output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. A minimum output capacitor of 10µF with an ESR in the range of 50mΩ to 3Ω is recommended to prevent oscillations. Larger values of output capacitance can decrease the peak deviations and provide improved transient response for larger load current changes. Bypass capacitors, used to decouple individual components powered by the LT1963, will increase the effective output capacitor value. Extra consideration must be given to the use of ceramic capacitors. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics used are specified with EIA temperature characteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are good for providing high capacitances in a small package, but they tend to have strong voltage and temperature coefficients as shown in Figures 2 and 3. When used with a 5V regulator, a 16V 10µF Y5V capacitor can exhibit an effective value as low as 1µF to 2µF for the DC bias voltage applied and over the operating temperature range. The X5R and X7R dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. The X7R type has better stability across temperature, while the X5R is less expensive and is available in higher values. Care still must be exercised when using X5R and X7R capacitors; the X5R and X7R codes only specify operating temperature range and maximum capacitance change over temperature. Capacitance change due to DC bias with X5R and X7R capacitors is better than Y5V and Z5U capacitors, but can still be significant enough to drop capacitor values below appropriate levels. Capacitor DC bias characteristics tend to 1963fc 11 LT1963 Series U W U U APPLICATIO S I FOR ATIO 20 operating region for all values of input-to-output voltage. The protection is designed to provide some output current at all values of input-to-output voltage up to the device breakdown. BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF 0 CHANGE IN VALUE (%) X5R –20 –40 –60 Y5V –80 –100 0 2 4 8 6 10 12 DC BIAS VOLTAGE (V) 14 16 1963 F03 Figure 3. Ceramic Capacitor DC Bias Characteristics 40 CHANGE IN VALUE (%) 20 X5R 0 –20 –40 Y5V –60 –80 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF –100 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 1963 F04 Figure 4. Ceramic Capacitor Temperature Characteristics improve as component case size increases, but expected capacitance at operating voltage should be verified. Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients. Overload Recovery Like many IC power regulators, the LT1963-X has safe operating area protection. The safe area protection decreases the current limit as input-to-output voltage increases and keeps the power transistor inside a safe When power is first turned on, as the input voltage rises, the output follows the input, allowing the regulator to start up into very heavy loads. During the start-up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. With a high input voltage, a problem can occur wherein removal of an output short will not allow the output voltage to recover. Other regulators, such as the LT1085, also exhibit this phenomenon, so it is not unique to the LT1963-X. The problem occurs with a heavy output load when the input voltage is high and the output voltage is low. Common situations are immediately after the removal of a short-circuit or when the shutdown pin is pulled high after the input voltage has already been turned on. The load line for such a load may intersect the output current curve at two points. If this happens, there are two stable output operating points for the regulator. With this double intersection, the input power supply may need to be cycled down to zero and brought up again to make the output recover. Output Voltage Noise The LT1963 regulators have been designed to provide low output voltage noise over the 10Hz to 100kHz bandwidth while operating at full load. Output voltage noise is typically 40nV/√Hz over this frequency bandwidth for the LT1963 (adjustable version). For higher output voltages (generated by using a resistor divider), the output voltage noise will be gained up accordingly. This results in RMS noise over the 10Hz to 100kHz bandwidth of 14µVRMS for the LT1963 increasing to 38µVRMS for the LT1963-3.3. Higher values of output voltage noise may be measured when care is not exercised with regards to circuit layout and testing. Crosstalk from nearby traces can induce unwanted noise onto the output of the LT1963-X. Power supply ripple rejection must also be considered; the LT1963 regulators do not have unlimited power supply rejection and will pass a small portion of the input noise through to the output. 1963fc 12 LT1963 Series U W U U APPLICATIO S I FOR ATIO Table 2. SO-8 Package, 8-Lead SO Thermal Considerations The power handling capability of the device is limited by the maximum rated junction temperature (125°C). The power dissipated by the device is made up of two components: 1. Output current multiplied by the input/output voltage differential: (IOUT)(VIN – VOUT), and 2. GND pin current multiplied by the input voltage: (IGND)(VIN). The GND pin current can be found using the GND Pin Current curves in the Typical Performance Characteristics. Power dissipation will be equal to the sum of the two components listed above. The LT1963 series regulators have internal thermal limiting designed to protect the device during overload conditions. For continuous normal conditions, the maximum junction temperature rating of 125°C must not be exceeded. It is important to give careful consideration to all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered. For surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through-holes can also be used to spread the heat generated by power devices. The following tables list thermal resistance for several different board sizes and copper areas. All measurements were taken in still air on 1/16" FR-4 board with one ounce copper. Table 1. Q Package, 5-Lead DD COPPER AREA TOPSIDE* BACKSIDE BOARD AREA THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500mm2 2500mm2 2500mm2 23°C/W 2 2 2 2500mm 25°C/W 2500mm2 33°C/W 1000mm 2500mm 125mm2 2500mm2 * Device is mounted on topside COPPER AREA TOPSIDE* BACKSIDE BOARD AREA THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500mm2 2500mm2 2500mm2 55°C/W 2 2 2 55°C/W 2500mm 2 2500mm 63°C/W 2500mm2 2500mm2 69°C/W 1000mm 225mm 2 100mm2 2500mm 2 2500mm * Device is mounted on topside Table 3. SOT-223 Package, 3-Lead SOT-223 COPPER AREA TOPSIDE* BACKSIDE BOARD AREA THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500mm2 2500mm2 2500mm2 42°C/W 2 2 2 1000mm 2500mm 2500mm 42°C/W 225mm2 2500mm2 2500mm2 50°C/W 2 2 2 56°C/W 2 100mm 2 2500mm 2 2500mm 1000mm 1000mm 1000mm 49°C/W 1000mm2 0mm2 1000mm2 52°C/W * Device is mounted on topside Table 4. FE Package, 16-Lead TSSOP COPPER AREA TOPSIDE* BACKSIDE BOARD AREA THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500mm2 2500mm2 2500mm2 38°C/W 2 2 2 43°C/W 2500mm 2 2500mm 48°C/W 2500mm2 2500mm2 60°C/W 1000mm 225mm 2 100mm2 2500mm 2 2500mm * Device is mounted on topside T Package, 5-Lead TO-220 Thermal Resistance (Junction-to-Case) = 4°C/W Calculating Junction Temperature Example: Given an output voltage of 3.3V, an input voltage range of 4V to 6V, an output current range of 0mA to 500mA and a maximum ambient temperature of 50°C, what will the maximum junction temperature be? The power dissipated by the device will be equal to: IOUT(MAX)(VIN(MAX) – VOUT) + IGND(VIN(MAX)) where, IOUT(MAX) = 500mA VIN(MAX) = 6V IGND at (IOUT = 500mA, VIN = 6V) = 10mA So, P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W 1963fc 13 LT1963 Series U W U U APPLICATIO S I FOR ATIO 1.41W(28°C/W) = 39.5°C The maximum junction temperature will then be equal to the maximum junction temperature rise above ambient plus the maximum ambient temperature or: TJMAX = 50°C + 39.5°C = 89.5°C Protection Features The LT1963 regulators incorporate several protection features which make them ideal for use in battery-powered circuits. In addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the devices are protected against reverse input voltages, reverse output voltages and reverse voltages from output to input. Current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. For normal operation, the junction temperature should not exceed 125°C. The input of the device will withstand reverse voltages of 20V. Current flow into the device will be limited to less than 1mA (typically less than 100µA) and no negative voltage will appear at the output. The device will protect both itself and the load. This provides protection against batteries that can be plugged in backward. The output of the LT1963 can be pulled below ground without damaging the device. If the input is left open circuit or grounded, the output can be pulled below ground by 20V. For fixed voltage versions, the output will act like a large resistor, typically 5k or higher, limiting current flow to typically less than 600µA. For adjustable versions, the output will act like an open circuit; no current will flow out of the pin. If the input is powered by a voltage source, the output will source the short-circuit current of the device and will protect itself by thermal limiting. In this case, grounding the SHDN pin will turn off the device and stop the output from sourcing the short-circuit current. The ADJ pin of the adjustable device can be pulled above or below ground by as much as 7V without damaging the device. If the input is left open circuit or grounded, the ADJ pin will act like an open circuit when pulled below ground and like a large resistor (typically 5k) in series with a diode when pulled above ground. In situations where the ADJ pin is connected to a resistor divider that would pull the ADJ pin above its 7V clamp voltage if the output is pulled high, the ADJ pin input current must be limited to less than 5mA. For example, a resistor divider is used to provide a regulated 1.5V output from the 1.21V reference when the output is forced to 20V. The top resistor of the resistor divider must be chosen to limit the current into the ADJ pin to less than 5mA when the ADJ pin is at 7V. The 13V difference between OUT and ADJ pins divided by the 5mA maximum current into the ADJ pin yields a minimum top resistor value of 2.6k. In circuits where a backup battery is required, several different input/output conditions can occur. The output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage, or is left open circuit. Current flow back into the output will follow the curve shown in Figure 5. When the IN pin of the LT1963 is forced below the OUT pin or the OUT pin is pulled above the IN pin, input current will typically drop to less than 2µA. This can happen if the input of the device is connected to a discharged (low voltage) battery and the output is held up by either a backup battery or a second regulator circuit. The state of the SHDN pin will have no effect on the reverse output current when the output is pulled above the input. 5.0 REVERSE OUTPUT CURRENT (mA) Using a DD package, the thermal resistance will be in the range of 23°C/W to 33°C/W depending on the copper area. So the junction temperature rise above ambient will be approximately equal to: LT1963 VOUT = VADJ 4.5 LT1963-1.5 VOUT = VFB 4.0 3.5 LT1963-1.8 VOUT = VFB 3.0 2.5 LT1963-2.5 2.0 VOUT = VFB 1.5 TJ = 25°C VIN = 0V CURRENT FLOWS INTO OUTPUT PIN 1.0 0.5 0 LT1963-3.3 VOUT = VFB 0 1 2 3 4 5 6 7 8 OUTPUT VOLTAGE (V) 9 10 1963 F05 Figure 5. Reverse Output Current 1963fc 14 LT1963 Series U TYPICAL APPLICATIO S SCR Pre-Regulator Provides Efficiency Over Line Variations L1 500µH L2 LT1963-3.3 IN OUT 1N4148 10VAC AT 115VIN + SHDN GND 10000µF 1k 90-140 VAC 3.3VOUT 1.5A + FB 22µF 34k* 10VAC AT 115VIN 1N4002 1N4002 12.1k* +V “SYNC” 1N4002 TO ALL “+V” POINTS + 22µF 2.4k C1A + 750Ω 200k 1N4148 1/2 LT1018 – 0.1µF +V C1B 750Ω +V + 1/2 LT1018 A1 1N4148 + 0.033µF – LT1006 10k – 10k 10k +V 1µF +V L1 = COILTRONICS CTX500-2-52 L2 = STANCOR P-8559 * = 1% FILM RESISTOR = NTE5437 LT1004 1.2V 1963 TA03 Paralleling of Regulators for Higher Output Current R1 0.01Ω + VIN > 3.7V LT1963-3.3 IN OUT C1 100µF SHDN GND R2 0.01Ω IN + FB 3.3V 3A C2 22µF LT1963 OUT R6 6.65k SHDN SHDN GND R3 2.2k R4 2.2k FB R7 4.12k R5 1k 3 2 + 8 1/2 LT1366 – 4 1 C3 0.01µF 1963 TA05 1963fc 15 LT1963 Series U PACKAGE DESCRIPTIO Q Package 5-Lead Plastic DD Pak (Reference LTC DWG # 05-08-1461) .256 (6.502) .060 (1.524) TYP .060 (1.524) .390 – .415 (9.906 – 10.541) .165 – .180 (4.191 – 4.572) .045 – .055 (1.143 – 1.397) 15° TYP .060 (1.524) .183 (4.648) +.008 .004 –.004 +0.203 0.102 –0.102 .059 (1.499) TYP .330 – .370 (8.382 – 9.398) ( ) .095 – .115 (2.413 – 2.921) .075 (1.905) .300 (7.620) +.012 .143 –.020 +0.305 3.632 –0.508 ( BOTTOM VIEW OF DD PAK HATCHED AREA IS SOLDER PLATED COPPER HEAT SINK .067 (1.702) .028 – .038 BSC (0.711 – 0.965) TYP ) Q(DD5) 0502 .420 .276 .080 .420 .050 ± .012 (1.270 ± 0.305) .013 – .023 (0.330 – 0.584) .325 .350 .205 .565 .565 .320 .090 .090 .067 .042 RECOMMENDED SOLDER PAD LAYOUT NOTE: 1. DIMENSIONS IN INCH/(MILLIMETER) 2. DRAWING NOT TO SCALE .067 .042 RECOMMENDED SOLDER PAD LAYOUT FOR THICKER SOLDER PASTE APPLICATIONS 1963fc 16 LT1963 Series U PACKAGE DESCRIPTIO S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .189 – .197 (4.801 – 5.004) NOTE 3 .045 ±.005 .050 BSC 8 .245 MIN 7 6 5 .160 ±.005 .150 – .157 (3.810 – 3.988) NOTE 3 .228 – .244 (5.791 – 6.197) .030 ±.005 TYP 1 RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° (0.254 – 0.508) .008 – .010 (0.203 – 0.254) 0°– 8° TYP .016 – .050 (0.406 – 1.270) NOTE: 1. DIMENSIONS IN .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 2 3 4 .004 – .010 (0.101 – 0.254) .050 (1.270) BSC SO8 0303 1963fc 17 LT1963 Series U PACKAGE DESCRIPTIO ST Package 3-Lead Plastic SOT-223 (Reference LTC DWG # 05-08-1630) .248 – .264 (6.30 – 6.71) .129 MAX .114 – .124 (2.90 – 3.15) .059 MAX .264 – .287 (6.70 – 7.30) .248 BSC .130 – .146 (3.30 – 3.71) .039 MAX .059 MAX .090 BSC .181 MAX .033 – .041 (0.84 – 1.04) .0905 (2.30) BSC RECOMMENDED SOLDER PAD LAYOUT 10° – 16° .010 – .014 (0.25 – 0.36) 10° MAX .071 (1.80) MAX 10° – 16° .024 – .033 (0.60 – 0.84) .0008 – .0040 (0.0203 – 0.1016) .012 (0.31) MIN .181 (4.60) BSC ST3 (SOT-233) 0502 T Package 5-Lead Plastic TO-220 (Standard) (Reference LTC DWG # 05-08-1421) 0.390 – 0.415 (9.906 – 10.541) 0.165 – 0.180 (4.191 – 4.572) 0.147 – 0.155 (3.734 – 3.937) DIA 0.045 – 0.055 (1.143 – 1.397) 0.230 – 0.270 (5.842 – 6.858) 0.460 – 0.500 (11.684 – 12.700) 0.570 – 0.620 (14.478 – 15.748) 0.330 – 0.370 (8.382 – 9.398) 0.620 (15.75) TYP 0.700 – 0.728 (17.78 – 18.491) SEATING PLANE 0.152 – 0.202 0.260 – 0.320 (3.861 – 5.131) (6.60 – 8.13) 0.095 – 0.115 (2.413 – 2.921) 0.155 – 0.195* (3.937 – 4.953) 0.013 – 0.023 (0.330 – 0.584) BSC 0.067 (1.70) 0.028 – 0.038 (0.711 – 0.965) 0.135 – 0.165 (3.429 – 4.191) * MEASURED AT THE SEATING PLANE T5 (TO-220) 0399 1963fc 18 LT1963 Series U PACKAGE DESCRIPTIO FE Package 16-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663) Exposed Pad Variation BB 4.90 – 5.10* (.193 – .201) 3.58 (.141) 3.58 (.141) 16 1514 13 12 1110 6.60 ±0.10 9 2.94 (.116) 4.50 ±0.10 2.94 6.40 (.116) (.252) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.65 BSC 1 2 3 4 5 6 7 8 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.50 – 0.75 (.020 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE 0.25 REF 1.10 (.0433) MAX 0° – 8° 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) TYP 0.05 – 0.15 (.002 – .006) FE16 (BB) TSSOP 0204 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 1963fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LT1963 Series U TYPICAL APPLICATIO S Adjustable Current Source R5 0.01Ω VIN > 2.7V + C1 10µF R1 1k LT1004-1.2 R2 80.6k LT1963-1.8 IN OUT SHDN GND R4 2.2k R6 2.2k FB R8 100k C3 1µF R3 2k 2 3 C2 3.3µF NOTE: ADJUST R1 FOR 0A TO 1.5A CONSTANT CURRENT LOAD + 1 1/2 LT1366 – R7 470Ω 8 4 1963 TA04 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1129 700mA, Micropower, LDO VIN: 4.2V to 30V, VOUT(MIN) = 3.75V, VDO = 0.40V, IQ = 50µA, ISD = 16µA, DD, SOT-223, S8, TO220, TSSOP20 Packages LT1175 500mA, Micropower Negative LDO VIN: –20V to –4.3V, VOUT(MIN) = –3.8V, VDO = 0.50V, IQ = 45µA, ISD = 10µA, DD, SOT-223, S8 Packages LT1185 3A, Negative LDO VIN: –35V to –4.2V, VOUT(MIN) = –2.40V, VDO = 0.80V, IQ = 2.5mA, ISD <1µA, TO220-5 Package LT1761 100mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 20µA, ISD <1µA, ThinSOT Package LT1762 150mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 25µA, ISD <1µA, MS8 Package LT1763 500mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 30µA, ISD <1µA, S8 Package LT1764/ LT1764A 3A, Low Noise, Fast Transient Response, LDO VIN: 2.7V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD <1µA, DD, TO220 Packages LTC1844 150mA, Very Low Drop-Out LDO VIN: 6.5V to 1.6V, VOUT(MIN) = 1.25V, VDO = 0.08V, IQ = 40µA, ISD <1µA, ThinSOT Package LT1962 300mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.27V, IQ = 30µA, ISD <1µA, MS8 Package LT1963/ LT1963A 1.5A, Low Noise, Fast Transient Response, LDO VIN: 2.1V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD <1µA, DD, TO220, SOT Packages LT1964 200mA, Low Noise Micropower, Negative LDO VIN: –0.9V to –20V, VOUT(MIN) = –1.21V, VDO = 0.34V, IQ = 30µA, ISD = 3µA, ThinSOT Package LT3020 100mA, Low Voltage VLDO VIN: 0.9V to 10V, VOUT(MIN) = 0.20, VDO = 0.15V, IQ = 120µA, ISD <3µA, DFN, MS8 Packages LT3023 Dual, 2x 100mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 40µA, ISD <1µA, DFN, MS10 Packages LT3024 Dual, 100mA/500mA, Low Noise Micropower, VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 60µA, ISD <1µA, LDO DFN, TSSOP Package LT3150 Fast Transient Response, Low Input Voltage VIN: –1.4V to 10V, VOUT(MIN) = 1.23V, VDO = 0.13V, IQ = 12mA, ISD = 25µA, GN16 Package 1963fc 20 Linear Technology Corporation LT 1105 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005