TSM6025 A +2.5V, Low-Power/Low-Dropout Precision Voltage Reference FEATURES DESCRIPTION The TSM6025 is a 3-terminal, series-mode 2.5-V precision voltage reference and is a pin-for-pin, alternate source for the MAX6025 voltage reference. Like the MAX6025, the TSM6025 consumes only 27μA of supply current at no-load, exhibits an initial output voltage accuracy of less than 0.2%, and a low output voltage temperature coefficient of 15ppm/°C. In addition, the TSM6025’s output stage is stable for all capacitive loads to 2200pF and is capable of sinking and sourcing load currents up to 500μA. Alternate Source for MAX6025 Initial Accuracy: 0.2% (max) – TSM6025A 0.4% (max) – TSM6025B Temperature Coefficient: 15ppm/°C (max) – TSM6025A 25ppm/°C (max) – TSM6025B Quiescent Supply Current: 35μA (max) Low Supply Current Change with VIN: <1μA/V Output Source/Sink Current: ±500μA Low Dropout at 500μA Load Current: 100mV Load Regulation: 0.14μV/μA Line Regulation : 25μV/V Stable with CLOAD up to 2200pF APPLICATIONS Industrial and Process-Control Systems Hard-Disk Drives Battery-Operated Equipment Data Acquisition Systems Hand-Held Equipment Precision 3V/5V Systems Smart Industrial Transmitters Since the TSM6025 is a series-mode voltage reference, its supply current is not affected by changes in the applied supply voltage unlike twoterminal shunt-mode references that require an external resistor. The TSM6025’s small form factor and low supply current operation combine to make it an ideal choice in low-power, precision applications. The TSM6025 is fully specified over the -40°C to +85°C temperature range and is available in a 3-pin SOT23 package. TYPICAL APPLICATION CIRCUIT Output Voltage Temperature Drift OUTPUT VOLTAGE - Volt 2.5035 THREE TYPICAL DEVICES 2.5025 DEVICE #1 2.5015 DEVICE #2 2.5005 2.4995 DEVICE #3 2.4985 -40 -15 10 35 60 85 TEMPERATURE DRIFT- °C Page 1 © 2014 Silicon Laboratories, Inc. All rights reserved. TSM6025 ABSOLUTE MAXIMUM RATINGS IN to GND................................................................. -0.3V to +13.5V OUT to GND.................................................................... -0.3V to 7V Short Circuit to GND or IN (VIN < 6V) .............................. Continuous Output Short Circuit to GND or IN (VIN ≥ 6V) .............................. 60s Continuous Power Dissipation (TA = +70°C) 3-Pin SOT23 (Derate at 4.0mW/°C above +70°C) .......... 320mW Operating Temperature Range ................................. -40°C to +85°C Storage Temperature Range .................................. -65°C to +150°C Lead Temperature (Soldering, 10s)...................................... +300°C Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and lifetime. PACKAGE/ORDERING INFORMATION ORDER NUMBER PART CARRIER QUANTITY MARKING TSM6025AEUR+ Tape & Reel ----- TSM6025AEUR+T Tape & Reel 3000 TSM6025BEUR+ Tape & Reel ----- Tape & Reel 3000 ACX ACY TSM6025BEUR+T Lead-free Program: Silicon Labs supplies only lead-free packaging. Consult Silicon Labs for products specified with wider operating temperature ranges. Page 2 TSM6025 Rev. 1.0 TSM6025 ELECTRICAL CHARACTERISTICS VIN = +5V, IOUT = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. See Note 1. PARAMETER OUTPUT SYMBOL CONDITIONS TSM6025A Output Voltage VOUT TA = +25°C TSM6025B Output Voltage Temperature Coefficient (See Note 2) Line Regulation Load Regulation Dropout Voltage (See Note 5) OUT Short-Circuit Current VOUT ∆VOUT/ ∆VIN ∆VOUT/ ∆IOUT VIN -VOUT ISC TA = 0°C to +70°C TA = -40°C to +85°C TA = 0°C to +70°C TA = -40°C to +85°C MIN TYP MAX UNITS 2.495 -0.20 2.490 -0.40 2.500 2.505 0.20 2.510 0.40 15 20 25 30 V % V % 6 6 6 6 TSM6025A TSM6025B (VOUT + 0.2V) ≤ VIN ≤ 12.6V Sourcing: 0 ≤ IOUT ≤ 500μA Sinking: -500μA ≤ IOUT ≤ 0 IOUT = 500μA VOUT Short to GND VOUT Short to IN 0.14 0.18 100 4 4 Temperature Hysteresis (See Note 3) Long-Term Stability ∆VOUT/ time 2.500 ppm/°C 140 μV/V 0.60 0.80 200 μV/μA mV mA 130 ppm 1000hr at TA = +25°C 50 ppm/ 1000hr f = 0.1Hz to 10Hz f = 10Hz to 10kHz 50 125 μVP-P μVRMS VIN = 5V ±100mV, f = 120Hz 82 dB DYNAMIC Noise Voltage Ripple Rejection Capacitive-Load Stability Range INPUT Supply Voltage Range Quiescent Supply Current Change in Supply Current eOUT ∆VOUT/ ∆VIN COUT VIN IIN IIN/VIN See Note 4 Guaranteed by line-regulation test 0 VOUT + 0.2 27 (VOUT + 0.2V) ≤ VIN ≤ 12.6V 2.2 nF 12.6 35 2.0 V μA μA/V Note 1: All devices are 100% production tested at TA = +25°C and are guaranteed by characterization for TA = TMIN to TMAX, as specified. Note 2: Temperature Coefficient is measured by the “box” method; i.e., the maximum ∆VOUT is divided by the maximum ∆T. Note 3: Temperature hysteresis is defined as the change in the +25°C output voltage before and after cycling the device from TMIN to TMAX. Note 4: Not production tested; guaranteed by design. Note 5: Dropout voltage is the minimum input voltage at which VOUT changes ≤0.2% from VOUT at VIN = 5.0V. TSM6025 Rev. 1.0 Page 3 TSM6025 TYPICAL PERFORMANCE CHARACTERISTICS VIN = +5V; IOUT = 0mA; TA = +25°C, unless otherwise noted. Output Voltage Temperature Drift Long-Term Output Voltage Drift 2.502 THREE TYPICAL DEVICES OUTPUT VOLTAGE - Volt OUTPUT VOLTAGE - Volt 2.5035 2.5025 DEVICE #1 2.5015 DEVICE #2 2.5005 2.4995 THREE TYPICAL DEVICES DEVICE A 2.501 2.500 DEVICE B 2.499 DEVICE C DEVICE #3 2.4985 2.498 -40 -15 35 10 60 85 1000 Line Regulation – ΔVOUT/ΔVIN Dropout Voltage vs Source Current 0.4 TA = -40°C DROPOUT VOLTAGE - Volt OUTPUT VOLTAGE CHANGE - µV 750 TIME - Hours 200 TA = +25°C 100 TA = +85°C 0 -100 0.3 TA = +85°C 0.2 TA = +25°C TA = -40°C 0.1 0 2 6 4 8 10 12 600 800 1000 SOURCE CURRENT- µA Load Regulation – ΔVOUT/ΔILOAD Power Supply Rejection vs Frequency TA = -40°C TA = +85°C 0 TA = +25°C -0.2 -0.4 -500 400 200 SUPPLY VOLTAGE - Volt POWER SUPPLY REJECTION – mV/V 0.2 0 14 0.4 OUTPUT VOLTAGE CHANGE - mV 500 TEMPERATURE DRIFT- °C 300 -250 0 250 LOAD CURRENT- µA Page 4 250 0 500 100 VCC =+5.5V±0.25V 10 1 0.1 0.01 100 1k 10k 100k 1M FREQUENCY - Hz TSM6025 Rev. 1.0 TSM6025 TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Temperature 40 SUPPLY CURENT - µA SUPPLY CURENT - µA VIN = +5V; IOUT = 0mA; TA = +25°C, unless otherwise noted. Supply Current vs Input Voltage 40 36 32 28 VCC =+12.5V VCC =+7.5V 35 30 VCC = +2.5V, +5.5V 25 24 20 20 2 4 6 8 10 12 14 -40 -15 10 35 60 INPUT VOLTAGE - Volt TEMPERATURE - °C Output Impedance vs Frequency 0.1Hz to 10Hz Output Noise 85 1k 46µVpp 100 VOUT(N) 10µV/DIV OUTPUT IMPEDANCE - Ω 10k 10 1 0.1 1 100 10k 1M FREQUENCY - Hz 1s/DIV Power-On Transient Response Small-signal Load Transient Response OUTPUT 1V/DIV 200µs/DIV TSM6025 Rev. 1.0 IOUT = 0µA → 50µA → 0µA OUTPUT 20mV/DIV IOUT 50µA/DIV INPUT 2V/DIV 0.1 10µs/DIV Page 5 TSM6025 TYPICAL PERFORMANCE CHARACTERISTICS VIN = +5V; IOUT = 0mA; TA = +25°C, unless otherwise noted. IOUT = 0mA → 1mA → 0mA Line Transient Response VIN 200mV/DIV IOUT 1mA/DIV Large-signal Load Transient Response OUTPUT 100mV/DIV OUTPUT 200mV/DIV VIN =5V±0.25V, AC-Coupled 10µs/DIV Page 6 2µs/DIV TSM6025 Rev. 1.0 TSM6025 PIN FUNCTIONS PIN 1 2 3 NAME IN OUT GND FUNCTION Supply Voltage Input +2.5V Output Ground DESCRIPTION/THEORY OF OPERATION The TSM6025 incorporates a precision 1.25-V bandgap reference that is followed by a output amplifier configured to amplify the base bandgap output voltage to a 2.5-V output. The design of the bandgap reference incorporates proprietary circuit design techniques to achieve its low temperature coefficient of 15ppm/°C and initial output voltage accuracy less than 0.2%. The design of the output amplifier’s frequency compensation does not require a separate compensation capacitor and is stable with capacitive loads up to 2200pF. The design of the output amplifier also incorporates low headroom design as it can source and sink load currents to 500μA with a dropout voltage less than 200mV. APPLICATIONS INFORMATION Power Supply Input Capacitive Bypass As shown in the Typical Application Circuit, the VIN pin of the TSM6025 should be bypassed to GND with a 0.1uF ceramic capacitor for optimal linetransient performance. Consistent with good analog circuit engineering practice, the capacitor should be placed in as close proximity to the TSM6025 as practical with very short pcb track lengths. Output/Load Capacitance Considerations As mentioned previously, the TSM6025 does not require a separate, external capacitor at VOUT for transient response stability as it is stable for capacitive loads up to 2200pF. On the other hand and for improved large-signal line and load regulation, the use of a capacitor at VOUT will provide a reservoir of charge in reserve to absorb largesignal load or line transients. This in turn improves the TSM6025’s VOUT settling time. If large load and line transients are not expected in the application, then the TSM6025 can be used without an external capacitor at VOUT thereby reducing the overall circuit footprint. Supply Current The TSM6025 exhibits excellent dc line regulation as its supply current changes slightly as the applied supply voltage is increased. While its supply current is 35μA maximum, the change in its supply current as a function of supply voltage (its ∆IIN/∆VIN) is less TSM6025 Rev. 1.0 than 1μA/V. Since the TSM6025 is a series-mode reference, load current is drawn from the supply voltage only when required. In this case, circuit efficiency is maintained at all applied supply voltages. Reducing power dissipation and extending battery life are the net benefits of improved circuit efficiency. On the other hand, an external resistor in series with the supply voltage is required by two-terminal, shunt-mode references. In this case, as the supply voltage changes, so does the quiescent supply current of the shunt reference. In addition, the external resistor’s tolerance and temperature coefficient contribute two additional factors that can affect the circuit’s supply current. Therefore, maximizing circuit efficiency with shunt-mode references becomes an exercise involving three variables. Additionally, shunt-mode references must be biased at the maximum expected load current even if the load current is not present at all times. When the applied supply voltage is less than the minimum specified input voltage of the TSM6025 (for example, during the power-up transition), the TSM6025 can draw up to 200μA above its nominal, steady-state supply current. To ensure reliable power-up behavior, the input power source must have sufficient reserve power to provide the extra supply current drawn during the power-up transition. Page 7 TSM6025 Output Voltage Hysteresis Reference output voltage thermal hysteresis is the change in the reference’s +25°C output voltage after temperature cycling from +85°C to +25°C and from 40°C to +25°C. Thermal hysteresis is caused by differential package stress impressed upon the TSM6025’s internal bandgap core transistors and depends on whether the reference IC was previously at a higher or lower temperature. At 130ppm, the TSM6025’s typical temperature hysteresis is equal to 0.33mV with respect to a 2.5V output voltage. Voltage Reference Turn-On Time combined turn-on and settling time to within 0.1% of its 2.5V final value is approximately 340μs. A Positive and Negative Low-Power Voltage Reference The circuit in Figure 1 uses a CD4049 hex inverter and a few external capacitors as the power supply to a dual-supply precision op amp to form a ±2.5V precision, bipolar output voltage reference around the TSM6025. The CD4049-based circuit is a discrete charge pump voltage doubler/inverter that generates ±6V supplies for any industry-standard OP-07 or equivalent precision op amp. With a (VIN – VOUT) voltage differential larger than 200mV and ILOAD = 0mA, the TSM6025’s typical Figure 1: Positive and Negative 2.5V References from a Single +3V or +5V Supply Page 8 TSM6025 Rev. 1.0 TSM6025 PACKAGE OUTLINE DRAWING 3-Pin SOT23 Package Outline Drawing (N.B., Drawings are not to scale) Patent Notice Silicon Labs invests in research and development to help our customers differentiate in the market with innovative low-power, small size, analog-intensive mixed-signal solutions. Silicon Labs' extensive patent portfolio is a testament to our unique approach and world-class engineering team. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. 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