VBUS05B1-SD0 Datasheet

VBUS05B1-SD0
www.vishay.com
Vishay Semiconductors
Ultra Low Capacitance Bidirectional Symmetrical (BiSy) Single Line
ESD-Protection Diode in Silicon Package
FEATURES
• Ultra compact CLP0603 package
• Low package height < 0.3 mm
0.27
• 1-line ESD-protection
• Working range ± 5.5 V
• Low leakage current < 0.1 μA
22543
• Ultra low load capacitance CD = 0.29 pF typ.
0.6
0.3
• ESD-protection acc. IEC 61000-4-2
± 16 kV contact discharge
± 16 kV air discharge
22544
• Lead plating: Au (e4)
MARKING (example only)
1
XY
• Lead material: Ni
• Backside coating
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
22454




1 = year code
Open circle = month code and pin 1
XY = type code
ORDERING INFORMATION
DEVICE NAME
ORDERING CODE
TAPED UNITS PER REEL
(8 mm TAPE ON 7" REEL)
MINIMUM ORDER QUANTITY
VBUS05B1-SD0
VBUS05B1-SD0-G4-08
15 000
15 000
PACKAGE DATA
DEVICE NAME
PACKAGE NAME
TYPE CODE
WEIGHT
SOLDERING CONDITIONS
VBUS05B1-SD0
CLP0603
5A
0.12 mg
260 °C/10 s at terminals
Reflow soldering
according JEDEC® STD-020
ABSOLUTE MAXIMUM RATINGS
PARAMETER
TEST CONDITIONS
SYMBOL
VALUE
UNIT
Peak pulse current
acc. IEC 61000-4-5, 8/20 μs/single shot
IPPM
2.5
A
Peak pulse power
Pin 1 to pin 2
acc. IEC 61000-4-5; tp = 8/20 μs; single shot
PPP
45
W
ESD immunity
Operating temperature
Storage temperature
Rev. 1.2, 28-Aug-15
Contact discharge acc. IEC 61000-4-2; 10 pulses
Air discharge acc. IEC 61000-4-2; 10 pulses
Junction temperature
VESD
± 16
± 16
kV
TJ
-55 to +150
°C
Tstg
-55 to +150
°C
Document Number: 85899
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VBUS05B1-SD0
www.vishay.com
Vishay Semiconductors
ESD-PROTECTION FOR HIGH-SPEED SIGNAL OR DATA LINES
The VBUS05B1-SD0 is a Bidirectional and Symmetrical (BiSy) ESD-protection device which clamps positive and negative
overvoltage transients to ground. Connected between the signal or data line and the ground the VBUS05B1-SD0 offers a high
isolation (low leakage current, low capacitance) within the specified working range. Due to the short leads and small package
size of the tiny CLP0603 package the line inductance is very low, so that fast transients like and ESD-strike can be clamped
with minimal over- or undershoots. Due to the very low capacitance the VBUS05B1-SD0 can be used for high speed data ports
like HDMI, USB 3.0 or Thunderbolt.
ELECTRICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITIONS/REMARKS
SYMBOL
MIN.
TYP.
Number of lines which can be protected
Nchannel
-
Max. reverse working voltage
VRWM
-
Reverse voltage
at IR = 0.1 μA
VR
5.5
-
-
V
Reverse current
at VRWM = 5.5 V
IR
-
-
0.1
μA
at IR = 1 mA
VBR
6.0
8.5
10
V
at IPP = 1 A
VC
-
12
14
V
Protection paths
Reverse stand-off voltage
Reverse breakdown voltage
Reverse clamping voltage
Capacitance
Clamping voltage
Dynamic resistance
Rev. 1.2, 28-Aug-15
MAX.
UNIT
-
1
lines
-
5.5
V
at IPP = IPPM = 2.5 A
VC
-
15
18
V
at VR = 0 V; f = 1 MHz
CD
-
0.29
0.4
pF
at VR = 3.3 V; f = 1 MHz
CD
-
0.29
-
pF
-
20
-
-
29
-
-
1.14
-
Transmission Line Pulse (TLP); tp = 100 ns
ITLP = 8 A
Transmission Line Pulse (TLP); tp = 100 ns
ITLP = 16 A
Transmission Line Pulse (TLP); tp = 100 ns
V
VC-TLP
RDYN

Document Number: 85899
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VBUS05B1-SD0
www.vishay.com
Vishay Semiconductors
TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
18
120 %
Rise time = 0.7 ns to 1 ns
16
14
80 %
12
VC in V
Discharge Current IESD
100 %
60 %
53 %
10
8
40 %
6
27 %
4
20 %
Measured acc. IEC 61000-4-5
(8/20 μs - wave form)
2
0%
-10 0 10 20 30 40 50 60 70 80 90 100
Fig. 1 - ESD Discharge Current Wave Form
acc. IEC 61000-4-2 (330 /150 pF)
1
2
3
4
IPP in A
Fig. 4 - Typical Peak Clamping Voltage VC vs.
Peak Pulse Current IPP
45
8 µs to 100 %
100 %
0
22750
Time (ns)
20557
0
40
Transmission Line Pulse (TLP)
tp = 100 ns
(Average between 55 ns and 95 ns)
35
80 %
VC in V
30
IPPM
60 %
20 µs to 50 %
40 %
25
20
15
10
20 %
5
0%
VC = 1.14 V/A x Ipp + 10 V
0
0
10
20
30
0
40
Time (µs)
20548
Fig. 2 - 8/20 μs Peak Pulse Current Wave Form
acc. IEC 61000-4-5
22755
5
10
15
20
25
IPP in A
Fig. 5 - Typical Peak Clamping Voltage VC vs.
Peak Pulse Current IPP
10
9
8
VR in (V)
7
6
5
4
3
2
1
0
1E-09 1E-08 1E-07 1E-06
22749
1E-05 1E-04 1E-03
IR in µA
Fig. 3 - Typical Reverse Voltage VR vs. Reverse Current IR
Rev. 1.2, 28-Aug-15
Document Number: 85899
3
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VBUS05B1-SD0
www.vishay.com
Vishay Semiconductors
PACKAGE DIMENSIONS in millimeters (mils): CLP0603-2L
e1
D
Package = chip dimensions in mm
b
L
A1
e
A
Millimeters
A
min.
nom.
max.
min.
nom.
max.
0.24
0.27
0.30
9.44
10.63
11.81
A1
E
mils
0.02
0.79
b
0.22
0.25
0.28
8.66
9.84
11.02
D
0.27
0.30
0.33
10.62
11.81
12.99
E
0.57
0.60
0.63
22.44
23.62
24.80
e
0.40
15.75
e1
0.25
9.84
L
0.12
0.15
0.18
4.72
5.91
7.09
22740
2 terminal leadless package (CLP0603-2L LLP)
Document no.: S8-V-3906.04-023 (4)
Created - Date: 22. Nov. 2010
Rev.4 - Date: 07. May 2014

Footprint and soldering recommendation:
please see Application Note: www.vishay.com/doc?85917
Rev. 1.2, 28-Aug-15
Document Number: 85899
4
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VBUS05B1-SD0
www.vishay.com
Vishay Semiconductors
CARRIER TAPE in millimeters: CLP0603
A-A
0.67±0.03
max
. 2°
Ø 0.2 ± 0.05
0.2 ± 0.02
+ 0.3
3.5 ± 0.05
4 ± 0.1
8 - 0.1
A
Ø 1.55 ± 0.05
Section
1.75 ± 0.1
2 ± 0.05
B
B
A
B-B
0.33 ± 0.03
Section
5°
0.37± 0.03
Cummulative tolerances of 10 sprocket holes is +/-0.2mm
22591
Document no. S8-V-3906.04-0025 (4)
Created - Date: 22. Nov. 2010
ORIENTATION IN CARRIER CLP0603
Unreeling direction
DETAIL A
50:1
Pin 1
A
CLP0603
Top view
22607
Orientation in Carrier Tape (CLP0603)
S8-V-3906.04-026 (4)
22.10.2010
Rev. 1.2, 28-Aug-15
Document Number: 85899
5
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 02-Oct-12
1
Document Number: 91000