LEE-128G032B-1 www.vishay.com Vishay Dale LED Display Modules 128 x 32 Graphics Display with Drive Electronics and + 5 V HC CMOS Level Video Interface Orange LED Modules, Normal Brightness, Single Board Construction, RoHS-Compliant FEATURES MIN. TYP. MAX. UNITS Logic and LED Drive Voltage VCC + 4.5 + 5.0 + 5.5 VDC Logic and LED Drive Current (Fully Lit) ICC - 1.1 1.3 ADC Logic 1 Input Vih 0.7 VCC - - VDC Logic 0 Input Vil - - 0.3 VCC VDC Note • Recommended operating voltages, all maximums are absolute maximum Revision: 07-Dec-12 Operating Temperature: - 40 °C to + 85 °C Storage Temperature: - 40 °C to + 85 °C Relative Operating Humidity: To 95 % non-condensing Mechanical Shock: 30 G Vibration: 3 G Operating Altitude: 10 000 ft DIMENSIONS in inches [millimeters] 12.68 Viewing Area 0.150 Mounting Holes (6 x) 1.057 0.250 Max. 7.25 7.25 14.80 0.75 Max. Component Height SYMBOL ENVIRONMENTAL SPECIFICATIONS 4.625 4.925 DESCRIPTION Viewing Area: 12.75" [323.8 mm] W x 3.15" [80.01 mm] L Character Size (5 x 7): 0.65" [16.51 mm] H x 0.45" [11.43 mm] W Pixel Size: 0.063" [1.6 mm] H x 0.031" [0.8 mm] W Pixel Pitch: 0.100" [2.54 mm] Luminance: 100 ft-L minimum Color: Bright orange Viewing Angle: > 150° 0.150 STANDARD ELECTRICAL SPECIFICATIONS OPTICAL SPECIFICATIONS 3.15 Viweing Area The LEE-128G032B-1 LED display has a video type interface and is driven in a standard row/column refresh method. Pixel data is clocked for a row, and rows are scanned sequentially. Signals are presented for serial data, dot clock, column latch, row data, row clock and display enable. The serial data is entered with the dot clock up to frequencies as high as 8 MHz. After a row of 128 pixels is clocked in, the column latch signal is toggled and the data is latched. At the time the data is latched, the display is briefly disabled using the display enable signal, then the row pointer is advanced with the row clock signal. Once each frame the row data must be asserted to synchronize the column serial data with the beginning row. The recommended scanning frequency is approximately 70 Hz, but may be as high as 200 Hz. Voltage(s) Required: + 5 VDC (VCC) Power Required (Fully Lit): Typ. = 5.5 W, max. = 6.5 W 0.889 The LEE-128G032B-1 LED display offers high contrast, wide viewing angle, and long distance readability. It emits a bright orange color which catches the attention of the viewer, but is yet comfortable to the eye. ELECTRICAL SPECIFICATIONS 0.150 The LEE-128G032B-1 is an LED replacement for the popular APD-128G032 plasma display module. It is designed to offer high brightness and superior viewing characteristics in a slim package. This display is ideal for low to medium level information content and is ideal for applications such as arcade games, process control, POS terminals, medical equipment, message centers and ATM machines. • LED replacement for the popular APD-128G032 plasma display module • + 5 V HC CMOS level video interface • Large characters • Highly visible for long distance viewing • > 30:1 contrast ratio • Bright orange color • Slim profile • Reduced power and brightness version • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 0.062 Pin 1 of J1 Pin 1 of J2 Document Number: 37096 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 LEE-128G032B-1 www.vishay.com Vishay Dale PIN DESCRIPTION LOGIC AND DATA TIMING J2 - POWER CONNECTOR t4 Molex 26-48-1045 or equivalent. Mates with Tyco AMP 3-640428-8, or Molex 09-50-3041 housing with 08-50-0106 socket crimp terminals or equivalent. PIN SIGNAL DESCRIPTION 1 VCC Logic and LED drive supply 2 VCC Logic and LED drive supply 3 GND Ground 4 GND Ground Row Data t2 t1 Row Clock 0 J1 - DATA CONNECTOR 2 1 1 0 FCI 75869-102LF or equivalent. Mates with Tyco AMP 1658621-2 or equivalent t3 30 2 30 31 31 0 0 1 1 Display Enable PIN DESCRIPTION PIN DESCRIPTION 1 Display enable 2 Ground 3 Row data 4 Ground 5 Row clock 6 Ground 7 Column latch 8 Ground 9 Dot clock 10 Ground 11 Serial data 12 Ground 13 No connection 14 Ground Row Clock Column Latch INTERFACE SIGNAL DESCRIPTION Dot clock - This signal enters the serial data on each low to high transition. A total of 128 dot clock transitions must be present for each line of column/anode data. Serial data - This signal presents the pixel data in positive logic format. A logic one represents a lit pixel and a logic zero represents an extinguished pixel. Data is entered from right to left. The first pixel data entered will represent the left most pixel in the row. Column latch - This signal latches the pixel data into the driver outputs. When the column latch signal goes to logic one the data entered previously will fall through to the driver outputs. When the signal returns to a logic zero the data is latched and the shift register is now ready to accept the next row of data. Must be held low while entering new serial data. Display enable - This signal enables the output drivers. Using a duty cycle control, this signal may also be used for intensity control. The display enable must be at logic zero before the column latch signal transitions. To avoid display blurring, the row clock signal should also transition while display enable is a logic zero. Row data - This signal is the first line marker for the scan. This input should be held high to correspond to the first row of pixel data. Row clock - This signal clocks row data on the falling edge. The row clock signal is repetitive and must be present for proper scanning of the display module. The LEE-128G032B-1 has an unique input protection circuit that assures the column drivers stay blanked on power up. The protection circuit unblanks the column drivers when the row clock signal begins (i.e the display begins scanning). Revision: 07-Dec-12 Display Enable 1st bit of row will appear in left most column Serial Data 0 1 2 126 127 t5 Dot Clock t6 Positive edge x 128 t7 PARAMETER MIN. TYP. MAX. UNITS t1 100 - - ns t2 5 - - μs t3 1 - - μs t4 - 70 200 Hz t5 25 - - ns t6 75 - - ns t7 75 - - ns ORDERING INFORMATION DESCRIPTION PART NUMBER Display, Driver Electronics and + 5 V HC CMOS Interface LED-128G032B-1 J1 Data Connector Kit (2 pcs. recommended) 280105-08 J2 Power Connector Kit 280108-16 Document Number: 37096 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000