DCR4420H65

DCR4420H65
Phase Control Thyristor
Preliminary Information
DS6118-2 August 2013 (LN 30819)
KEY PARAMETERS
FEATURES

Double Side Cooling

High Surge Capability
VDRM
IT(AV)
ITSM
dV/dt*
dI/dt
6500V
4420A
65600A
2000V/µs
200A/µs
* Higher dV/dt selections available
APPLICATIONS

Bridge Rectifiers

High Voltage Power Supplies

Motor Drives
VOLTAGE RATINGS
Part and
Ordering
Number
DCR4420H65*
DCR4420H60
DCR4420H55
Repetitive Peak
Voltages
VDRM and VRRM
V
6500
6000
5500
Conditions
Tvj = -40°C to 125°C,
IDRM = IRRM = 600mA,
VDRM, VRRM tp = 10ms,
VDSM & VRSM =
VDRM & VRRM + 100V
respectively
Lower voltage grades available.
o
o
*6200V @ -40 C, 6500V @ 0 C
Outline type code: H
(See Package Details for further information)
ORDERING INFORMATION
Fig. 1 Package outline
When ordering, select the required part number
shown in the Voltage Ratings selection table.
For example:
DCR4420H65
Note: Please use the complete part number when ordering
and quote this number in any future correspondence
relating to your order.
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DCR4420H65
SEMICONDUCTOR
CURRENT RATINGS
Tcase = 60°C unless stated otherwise
Symbol
Parameter
Test Conditions
Max.
Units
4420
A
Double Side Cooled
IT(AV)
Mean on-state current
IT(RMS)
RMS value
-
6943
A
Continuous (direct) on-state current
-
6300
A
IT
Half wave resistive load
SURGE RATINGS
Symbol
ITSM
2
It
Parameter
Surge (non-repetitive) on-state current
Test Conditions
Max.
Units
10ms half sine, Tcase = 125°C
65.6
kA
VR = 0
21.52
MA s
Min.
Max.
Units
2
I t for fusing
2
THERMAL AND MECHANICAL RATINGS
Symbol
Rth(j-c)
Rth(c-h)
Parameter
Thermal resistance – junction to case
Thermal resistance – case to heatsink
Test Conditions
Double side cooled
DC
-
0.004255
°C/W
Single side cooled
Anode DC
-
0.008
°C/W
Cathode DC
-
0.0093
°C/W
Double side
-
0.0009
°C/W
-
0.0018
°C/W
-
125
°C
Clamping force 135.0kN
(with mounting compound)
Blocking VDRM / VRRM
Single side
Tvj
Virtual junction temperature
Tstg
Storage temperature range
-55
125
°C
Fm
Clamping force
120
155
kN
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DCR4420H65
SEMICONDUCTOR
DYNAMIC CHARACTERISTICS
Symbol
IRRM/IDRM
Parameter
Test Conditions
Min.
Max.
Units
Peak reverse and off-state current
At VRRM/VDRM, Tcase = 125°C
-
600
mA
dV/dt
Max. linear rate of rise of off-state voltage
To 67% VDRM, Tj = 125°C, gate open
-
2000
V/µs
dI/dt
Rate of rise of on-state current
From 67% VDRM to 2x IT(AV)
Repetitive 50Hz
-
200
A/µs
Gate source 30V, 10,
Non-repetitive
-
500
A/µs
tr < 0.5µs, Tj = 125°C
VT(TO)
rT
tgd
Threshold voltage – Low level
500 to 4000A at Tcase = 125°C
-
1.1775
V
Threshold voltage – High level
4000 to 8000A at Tcase = 125°C
-
1.3233
V
On-state slope resistance – Low level
500A to 4000A at Tcase = 125°C
-
0.2025
m
On-state slope resistance – High level
4000A to 8000A at Tcase = 125°C
-
0.1733
m
VD = 67% VDRM, gate source 30V, 10
-
3
µs
400
µs
2300
5000
µC
37
52
A
Delay time
tr = 0.5µs, Tj = 25°C
tq
Turn-off time
IT = 3000A, Tj = 125°C,
VR = 200V, dI/dt = 1A/µs,
dVDR/dt = 20V/µs linear
QS
Stored charge
IT = 3000A, Tj = 125°C, dI/dt – 1A/µs,
VRpeak ~3900V, VR ~ 2600V
IRR
Reverse recovery current
IL
Latching current
Tj = 25°C, VD = 5V
-
3
A
IH
Holding current
Tj = 25°C, RG-K = , ITM = 500A, IT = 5A
-
300
mA
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DCR4420H65
SEMICONDUCTOR
GATE TRIGGER CHARACTERISTICS AND RATINGS
Symbol
Parameter
Test Conditions
Max.
Units
VGT
Gate trigger voltage
VDRM = 5V, Tcase = 25°C
1.5
V
VGD
Gate non-trigger voltage
At 50% VDRM, Tcase = 125°C
0.4
V
IGT
Gate trigger current
VDRM = 5V, Tcase = 25°C
350
mA
IGD
Gate non-trigger current
At 50% VDRM, Tcase = 125°C
10
mA
CURVES
9000
8000
min 25°C
Instantaneous on state current, IT - (A)
max 25°C
7000
min125°C
max 125°C
6000
5000
4000
3000
2000
1000
0
0.50
1.00
1.50
2.00
2.50
Instantaneous forward voltage drop VT , - (V)
3.00
Fig.2 Maximum & minimum on-state characteristics
VTM EQUATION
VTM = A + Bln (IT) + C.IT+D.IT
Where
A = 2.387827
B = -0.274196
C = 0.00005
D = 0.026321
these values are valid for Tj = 125°C for IT 500A to 8000A
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DCR4420H65
SEMICONDUCTOR
130
16
Mean power dissipation - (kW)
12
Maximum case temperature, T case ( o C )
180
120
90
60
30
14
10
8
6
4
120
180
110
120
90
100
60
90
30
80
70
60
50
40
30
20
10
2
0
0
1000
2000
3000
4000
5000
0
0
1000
2000
3000
4000
Mean on-state current, IT(AV) - (A)
Mean on-state current, IT(AV) - (A)
5000
120
180
110
120
Fig.4 Maximum permissible case temperature,
double side cooled – sine wave
12
90
100
10
60
30
90
Mean power dissipation - (kW)
Maximum heatsink temperature, THeatsink - ( ° C)
Fig.3 On-state power dissipation – sine wave
80
70
60
50
40
8
6
4
30
d.c.
180
120
90
60
30
2
20
10
0
0
0
1000
2000
3000
4000
5000
Mean on-state current, IT(AV) - (A)
Fig.5 Maximum permissible heatsink temperature,
double side cooled – sine wave
0
1000
2000
3000
4000
5000
6000
7000
Mean on-state current, IT (AV) - (A)
Fig.6 On-state power dissipation – rectangular wave
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DCR4420H65
SEMICONDUCTOR
130
d.c.
180
120
90
60
110
100
90
Maximum heatsink temperature Theatsink -(o C)
Maximum permissible case temperature , Tcase -(° C)
120
120
80
70
60
50
40
30
20
10
d.c.
180
120
90
60
30
110
100
90
80
70
60
50
40
30
20
10
0
0
1000 2000 3000 4000 5000 6000 7000
0
0
1000
2000
Fig.7 Maximum permissible case temperature,
double side cooled – rectangular wave
1
Double side cooled
Anode side cooled
Double side cooled
10
5000
6000
7000
Fig.8 Maximum permissible heatsink temperature,
double side cooled – rectangular wave
12
Transient Thermal Resistance (K/kW)
4000
Mean on-state current, IT (AV) - (A)
Mean on-state current, IT(AV) - (A)
Anode side cooled
3
4
1.24786361
Ti (s)
0.67007122 0.14563223 0.01981569 1.28702484
Ri (°C/kW)
0.51177271 1.94595762 0.91956601 4.66635596
Ti (s)
2.89822124 0.50524092
Ti (s)
Cathode side cooled
2
Ri (°C/kW)
Cathode side cooled Ri (°C/kW)
8
0.8334561 0.60621847 1.56769894
0.0358286 10.6466908
2.41723953 1.53684913 0.62607497
4.9592331
3.44130269 0.26943359 0.02350127
10.172444
i 4
Zth  [Ri  (1  exp(T / Ti )]
i 1
6
DRth(j-c) Conduction
Tables show the increments of thermal resistance R th(j-c) when the device
operates at conduction angles other than d.c.
4
Double side cooling
DZth (z)
q°
sine.
rect.
180
0.38
0.26
120
0.44
0.37
90
0.49
0.43
60
0.54
0.49
30
0.58
0.55
15
0.60
0.58
2
0
0.001
3000
0.01
0.1
Time (s)
1
10
Anode Side Cooling
DZth (z)
q°
sine.
rect.
180 0.32
0.23
120 0.36
0.31
90
0.41
0.36
60
0.45
0.40
30
0.48
0.45
15
0.49
0.48
Cathode Sided Cooling
DZth (z)
q°
sine.
rect.
180 0.33
0.23
120 0.38
0.33
90
0.43
0.37
60
0.47
0.43
30
0.51
0.48
15
0.52
0.51
100
Fig.9 Maximum (limit) transient thermal impedance – junction to case (°C/kW)
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DCR4420H65
SEMICONDUCTOR
70
30
260
240
50
Conditions:
Tj = 125°C
VR = 0
220
40
30
20
10
25
200
180
20
160
140
15
ITSM
I2t
120
100
10
80
60
5
40
20
0
1
10
Number of cycles at 50Hz
100
0
1
Fig.10 Multi-cycle surge current
300
Q Smax = 4999.6*(di/dt)
Reverse recovery current, Irr - (A)
Conditions:
T j = 125°C
V peak ~ 3900V
V RM ~ 2600V
snubber as
appropriate to
control reverse
volts
10000
0
100
10
Pulse width, tp - (ms)
Fig.11 Single-cycle surge current
15000
Stoed charge, QS - (µC)
I2t value - (MA2s)
Conditions:
Tj = 125°C
VR = 0
Pulse width = 10ms
Peak half sine forward current, ITSM - (kA)
Peak half sine forward current, I TSM - (kA)
60
0.4722
5000
Q Smin = 2304.6*(di/dt) 0.5578
Conditions:
T j = 125°C
V peak ~ 3900V
V RM ~ 2600V
snubber as appropriate to control
reverse volts
I RR max = 52.041*(di/dt) 0.7865
200
100
I RRmin = 36.96*(di/dt)
0.8317
0
0
2
4
6
8
Rate of decay of on state current, di/dt - (A/µs)
Fig.12 Stored charge
10
0
0
2
4
6
8
Rate of decay of on state current, di/dt - (A/µs)
10
Fig.13 Reverse recovery current
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DCR4420H65
SEMICONDUCTOR
10
9
Gate trigger voltage, V GT - (V)
8
Upper Limit
7
6
Preferred gate drive area
5
4
3
Tj = -40oC
2
Lower Limit
Tj = 25oC
Tj = 125oC
1
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Gate trigger current IGT, - (A)
Fig14 Gate Characteristics
30
Lower Limit
Upper Limit
5W
25
10W
20W
Gate trigger voltage, VGT - (V)
50W
100W
20
150W
-40C
15
10
5
0
0
1
2
3
4
5
6
7
8
9
10
Gate trigger current, IGT - (A)
Fig. 15 Gate characteristics
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DCR4420H65
SEMICONDUCTOR
PACKAGE DETAILS
For further package information, please contact Customer Services. All dimensions in mm, unless stated otherwise.
DO NOT SCALE.
Device
DCRxxxxH42
DCRxxxxH52
DCR4420H65
DCR4660H65
DCRxxxxH85
Maximum Minimum
Thickness Thickness
(mm)
(mm)
35.15
34.28
35.27
34.4
35.3
34.7
35.3
34.7
35.65
35.05
Lead length: 420mm
Lead terminal connector: M4 ring
Package outline type code:H
Fig.16 Package outline
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DCR4420H65
SEMICONDUCTOR
IMPORTANT INFORMATION:
This publication is provided for information only and not for resale.
The products and information in this publication are intended for use by appropriately trained technical personnel.
Due to the diversity of product applications, the information contained herein is provided as a general guide only and does not constitute
any guarantee of suitability for use in a specific application.The user must evaluate the suitability of the product and the completeness of
the product data for the application. The user is responsible for product selection and ensuring all safety and any warning requirements
are met. Should additional product information be needed please contact Customer Service.
Although we have endeavoured to carefully compile the information in this publication it may contain inaccuracies or typographical
errors. The information is provided without any warranty or guarantee of any kind.
This publication is an uncontrolled document and is subject to change without notice. When referring to it please ensure that it is the
most up to date version and has not been superseded.
The products are not intended for use in applications where a failure or malfunction may cause loss of life, injury or damage to property.
The user must ensure that appropriate safety precautions are taken to prevent or mitigate the consequences of a product failure or
malfunction.
The products must not be touched when operating because there is a danger of electrocution or severe burning. Always use
protective safety equipment such as appropriate shields for the product and wear safety glasses. Even when disconnected any
electric charge remaining in the product must be discharged and allowed to cool before safe handling using protective gloves.
Extended exposure to conditions outside the product ratings may affect reliability leading to premature product failure. Use outside the
product ratings is likely to cause permanent damage to the product. In extreme conditions, as with all semiconductors, this may include
potentially hazardous rupture, a large current to flow or high voltage arcing, resulting in fire or explosion. Appropriate application design
and safety precautions should always be followed to protect persons and property.
Product Status & Product Ordering:
We annotate datasheets in the top right hand corner of the front page, to indicate product status if it is not yet fully approved for
production. The annotations are as follows:Target Information:
Preliminary Information:
No Annotation:
This is the most tentative form of information and represents a very preliminary specification.
No actual design work on the product has been started.
The product design is complete and final characterisation for volume production is in
progress.The datasheet represents the product as it is now understood but details may change.
The product has been approved for production and unless otherwise notified by Dynex any
product ordered will be supplied to the current version of the data sheet prevailing at the
time of our order acknowledgement.
All products and materials are sold and services provided subject to Dynex’s conditions of sale, which are available on request.
Any brand names and product names used in this publication are trademarks, registered trademarks or trade names of their
respective owners.
HEADQUARTERS OPERATIONS
CUSTOMER SERVICE
DYNEX SEMICONDUCTOR LIMITED
Doddington Road, Lincoln, Lincolnshire, LN6 3LF
United Kingdom.
Phone: +44 (0) 1522 500500
Fax:
+44 (0) 1522 500550
Web: http://www.dynexsemi.com
Phone: +44 (0) 1522 502753 / 502901
Fax:
+44 (0) 1522 500020
e-mail: [email protected]
 Dynex Semiconductor Ltd.
Technical Documentation – Not for resale.
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