RClamp0524PQ Datasheet

RClamp0524PQ
Low Capacitance RailClamp®
4-Line Surge and ESD Protection
PROTECTION PRODUCTS
Description
Features
RailClamp® TVS arrays are ultra low capacitance ESD
protection devices designed to protect high speed data
interfaces. This series has been specifically designed to
protect sensitive components which are connected to
high-speed data and transmission lines from overvoltage
caused by ESD (electrostatic discharge), CDE (Cable
Discharge Events), and EFT (electrical fast transients).
• Transient Protection to
s IEC 61000-4-2 (ESD) 25kV (Air), 15kV (Contact)
s IEC 61000-4-4 (EFT) 4kV (5/50ns)
s IEC 61000-4-5 (Lightning) 5A (8/20µs)
s ISO-10605 (ESD) 20kV (Air), 12kV (Contact)
• Qualified to AEC-Q100, Grade 1
• Protects four High-Speed Data Lines
• Working Voltage: 5V
• Low Capacitance: 0.8 pF Maximum (I/O to GND)
• Dynamic Resistance: 0.43 Ohms (Typ)
• Solid-State Silicon-Avalanche Technology
RClamp0524PQ has a typical capacitance of only 0.3 pF
between I/O pins. This allows it to be used on circuits
operating in excess of 3GHz with no significant signal
attenuation. ESD characteristics are highlighted by high
ESD withstand voltage (+/-15kV per IEC 61000-4-2) and
low dynamic resistance (0.43 Ohms typical). Each device
will protect four lines operating at 5 volts
RClamp0524PQ is in a 10-pin SLP2510P8 package and
is qualified to AEC-Q100, Grade 1 (-40 to +125 oC) for
automotive applications. It measures 2.5 x 1.0 mm with
a nominal height of only 0.58 mm. The leads are finished
with lead-free NiPdAu. The flow- through package design
simplifies PCB layout.
Nominal Dimension
Mechanical Characteristics
•
•
•
•
•
•
•
SLP2510P8 Package
Pb-Free, Halogen Free, RoHS/WEEE Compliant
Nominal Dimensions: 2.5 x 1.0 x 0.58 mm
Lead Finish: NiPdAu
Molding Compound Flammability Rating: UL 94V-0
Marking : Marking Code + Date Code
Packaging : Tape and Reel
Applications
•
•
•
•
•
•
Automotive Applications
Industrial Equipment
HDMI
Digital Visual Interface
MDDI Ports
PCI Express
Functional Schematic
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Device Schematic
Nominal Dimensions in mm
RClamp0524PQ
Final Datasheet
Revision date
www.semtech.com
Rev 2.0
June 22, 2015
1 of 10
Semtech
Absolute Maximum Rating
Rating
Symbol
Value
Units
Peak Pulse Power (tp = 8/20µs)
PPK
75
W
Peak Pulse Current (tp = 8/20µs)
IPP
5
A
VESD
±15
±25
kV
ESD per ISO-10605 (Contact)(2)
ESD per ISO-10605 (Air)(2)
VESD
±12
±20
kV
Operating Temperature
TJ
-40 to +125
O
C
Storage Temperature
TSTG
-55 to +150
O
C
ESD per IEC 61000-4-2 (Contact)
ESD per IEC 61000-4-2 (Air)(1)
(1)
Electrical Characteristics (T=25OC unless otherwise specified)
Parameter
Symbol Conditions
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
VRWM
-40OC to 125OC
Any I/O pin to GND
VBR
It = 10mA,
Any I/O pin to GND
Min.
-40OC to
125OC
6.5
Typ.
9
T = 25OC
Max.
Units
5
V
11
V
0.1
μA
0.25
μA
Reverse Leakage Current
IR
Clamping Voltage(3)
VC
IPP = 1A, tp = 8/20µs,
Any I/O pin to GND
12
V
Clamping Voltage(3)
VC
IPP = 5A, tp = 8/20µs,
Any I/O pin to GND
15
V
ESD Clamping Voltage(4)
VC
IPP = 4A, tp = 0.2/100ns (TLP)
Any I/O pin to GND
12
V
ESD Clamping Voltage(4)
VC
IPP = 16A, tp = 0.2/100ns (TLP)
Any I/O pin to GND
17
V
Dynamic Resistance(4), (5)
RDYN
tp = 0.2/100ns (TLP)
Any I/O pin to GND
0.43
Ohms
Junction Capacitance
CJ
VRWM = 5V
VR = 0V, f = 1MHz
Any I/O pin to GND
VR = 0V, f = 1MHz
Between I/O pins
O
T = 125 C
T = 25OC
0.4
0.8
T=125OC
1.2
1.5
T = 25 C
0.3
0.4
T = 125OC
0.5
0.7
O
pF
Notes:
(1): ESD Gun return path to Ground Reference Plane (GRP)
(2): ESD Gun return path to Horizontal Coupling Plane (HCP); Test conditions: 330pF, 330Ω.
(3): Measured using an 8/20us constant current source.
(4): Transmission Line Pulse Test (TLP) Settings: tp = 100ns, tr = 0.2ns, ITLP and V TLP averaging window: t1 = 70ns to t2 = 90ns.
(5): Dynamic resistance calculated from ITLP = 4A to ITLP = 16A
RClamp0524PQ
Final Datasheet
Revision Date
www.semtech.com
Rev 2.0
June 22, 2015
2 of 10
Semtech
Typical Characteristics
Power Derating Curve
Non-Repetitive Peak Pulse Power vs. Pulse Time
120
10
DR040412-75
TA = 25OC
% of Rated Power or IPP
Peak Pulse Power - PPP (kW)
100
1
0.1
80
60
40
20
DR040512:25:125:150
0.01
0.1
1
10
100
0
1000
0
Pulse Duration - tp (µs)
25
125
150
TLP IV Curve (Positive Pulse)
8/20us Surge Clamping Characteristic
30
20
TA = 25OC
Waveform 8x20us
Any Pin to GND
TA = 25OC
Any Pin L-G
tP = 100ns, tR = 0.2ns
tMEAS = 70-90ns
RDYN = 0.43Ω (4A-16A Best Fit)
25
15
20
DUT Current (A)
Peak Clamping Voltage - VC (V)
50
75
100
Ambient Temperature - TA (OC)
10
15
10
5
5
RC0524PQ_AR_TLP_POS
RC0524PQ_AR_8_20 LG
0
0
0
1
2
3
4
5
6
7
8
0
9
5
10
Peak Pulse Current - IPP (A)
ESD Clamping (+8kV Contact per IEC 61000-4-2)
20
25
ESD Clamping (-8kV Contact per IEC 61000-4-2)
0
160
TA = 25OC.
Waveform IEC61000-4-2 +8kV.
Measured with and corrected for 50Ω, 40dB Attenuator.
50Ω Scope Input Impedance, ≥2GHz BW.
ESD Gun Return connected to Ground Reference Plane.
120
-50
Clamping Voltage - VC (V)
140
Clamping Voltage - VC (V)
15
DUT Voltage (V)
100
80
60
40
-100
TA = 25OC.
Waveform IEC61000-4-2 -8kV.
Measured with and corrected for 50Ω, 40dB Attenuator.
50Ω Scope Input Impedance, ≥2GHz BW.
ESD Gun Return connected to ESD Ground Plane.
-150
-200
20
RC0524PQ_AR_P8_ESD
-20
RClamp0524PQ
Final Datasheet
Revision Date
0
20
40
Time (ns)
60
80
100
www.semtech.com
Rev 2.0
June 22, 2015
RC0524PQ_AR_N8_ESD
-250
0
-20
0
20
40
60
80
100
Time (ns)
3 of 10
Semtech
Typical Characteristics (Continued)
ESD Clamping (+12kV Contact per ISO-10605 330pF, 330Ω)
ESD Clamping (-12kV Contact per ISO-10605 330pF, 330Ω)
200
0
Clamping Voltage - VC (V)
Clamping Voltage - VC (V)
-50
TA = 25OC.
Waveform ISO10605 +12kV. R = 330Ω; C = 330pF
Measured with and corrected for 50Ω, 40dB Attenuator.
50Ω Scope Input Impedance, ≥2GHz BW.
ESD Gun Return connected to Horizontal Coupling Plane.
150
100
50
-100
-150
TA = 25OC.
Waveform ISO10605 -12kV. R = 330Ω; C = 330pF
Measured with and corrected for 50Ω, 40dB Attenuator.
50Ω Scope Input Impedance, ≥2GHz BW.
ESD Gun Return connected to Horizontal Coupling Plane.
-200
-250
RC0524PQ_AR_ISO330330_P12_ESD
RC0524PQ_AR_ISO330330_N12_ESD
0
-300
-20
0
20
40
Time (ns)
60
80
100
-20
0
20
40
Time (ns)
60
80
100
Capacitance vs. Temperature
Capacitance vs. Reverse Voltage
0.7
1.5
VR = 0V
f = 1MHz
0.6
Capacitance - CJ (pF)
Capacitance - CJ (pF)
0.5
0.4
0.3
L-G
L-L
1.0
0.5
0.2
TA = 25OC.
f = 1 MHz.
Any Pin L-G
0.1
RC0524PQ_AR_CJvT
RC0524PQ_AR_CAPvV
0.0
0.0
0
1
2
3
4
5
6
-50
0
50
Temperature (OC)
Reverse Voltage - VR (V)
Insertion Loss - S21
100
150
Breakdown Voltage (VBR) vs. Temperature
11.0
0
IBR = 10mA L-G
IBR = 10mA L-L
-2
Breakdown Voltage - VBR (V)
Insertion Loss - IL (dB)
10.5
-4
-6
10.0
9.5
-8
RC0524PQ_AR_VBRvT
RC0524PQ_AR_IL
9.0
-10
0
RClamp0524PQ
Final Datasheet
Revision Date
2
4
6
Frequency (GHz)
8
10
www.semtech.com
Rev 2.0
June 22, 2015
-50
0
50
Temperature (OC)
100
150
4 of 10
Semtech
Applications Information
Assembly Guidelines
The small size of this device means that some care must
be taken during the mounting process to insure reliable
solder joint. The figure at the right details Semtech’s recommended mounting pattern. Recommended assembly
guidelines are shown in Table 2. Note that these are only
recommendations and should serve only as a starting
point for design since there are many factors that affect
the assembly process. Exact manufacturing parameters
will require some experimentation to get the desired
solder application. Semtech’s recommended mounting
pattern is based on the following design guidelines:
Land Pattern
The recommended land pattern follows IPC standards
and is designed for maximum solder coverage. Detailed
dimensions are shown elsewhere in this document.
Solder Stencil
Stencil design is one of the key factors which will
determine the volume of solder paste which is deposited
onto the land pad. The area ratio of the stencil aperture
will determine how well the stencil will print. The area
ratio takes into account the aperture shape, aperture
size, and stencil thickness. The area ratio of a rectangular
aperture is given as:
Recommended Stencil Design
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Table 2 - Recommended Assembly Guidelines
Assembly Parameter
Recommendation
Solder Stencil Design
Laser Cut, Electro-Polished
Aperture Shape
Rectangular
Solder Stencil Thickness 0.100mm (0.004”) 0.125mm (0.005”)
Solder Paste Type
Type 4 size sphere or smaller
Solder Reflow Profile
Per JEDEC J-STD-020
PCB Solder pad Design
Non-Solder Mask Defined
PCB Pad Finish
OSP or NiAu
Area Ratio = (L * W )/ (2 * (L + W) * T)
Where:
L = Aperture Length
W = Aperture Width
T = Stencil Thickness
Semtech recommends a stencil thickness of 0.100mm
- 0.125mm for this device. The stencil should be laser
cut with electro-polished finish. The stencil should have
a positive taper of approximately 5 degrees. Electro
polishing and tapering the walls results in reduced
surface friction and better paste release. Due to the
small aperture size, a solder paste with Type 4 or smaller
particles is recommended. Assuming a 125um thick
stencil, the aperture dimensions shown will yield an area
ratio of 0.72 for the small pads and 1.25 for the large.
RClamp0524PQ
Final Datasheet
Revision Date
Design Recommendations for HDMI Protection
Adding external ESD protection to HDMI ports can
be challenging. First, ESD protection devices have an
inherent junction capacitance and adding even a small
amount of capacitance will cause the impedance of the
differential pair to drop. Second, large packages and
land pattern requirements cause discontinuities that
adversely affect signal integrity. The RClamp0524PQ
is specifically designed for protection of high-speed
interfaces such as HDMI. It presents <0.4pF capacitance
between the pairs while being rated to handle >±8kV
ESD contact discharges (>±15kV air discharge) as
outlined in IEC 61000-4-2. Each device is in a leadless
SLP package that is less than 1.1mm wide. It is designed
such that the traces flow straight through the device.
The narrow package and flow-through design reduces
discontinuities and minimizes impact on signal integrity.
This becomes more critical as signal speeds increase.
www.semtech.com
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June 22, 2015
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Semtech
Applications Information
Pin Configuration
Figure 1 is an example of how to route the high speed
differential traces through the RClamp0524PQ. The solid
line represents the PCB trace. The PCB traces are used to
connect the pin pairs for each line (pin 1 to pin 10, pin 2
to pin 9, pin 4 to pin 7, pin 5 to pin 6). For example, line
1 enters at pin 1 and exits at Pin 10 and the PCB trace
connects pin 1 and 10 together. This is true for lines
connected at pins 2, 4, and 5 also. Ground is connected
at pins 3 and 8. One large ground pad should be used in
lieu of two separate pads.
A
1 ,2
Figure 2 - TDR Measurement with 200ps risetime using
Semtech Evaluation Board
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plenty of margin (98.3Ω at 1.79 ns).
Figure 3 shows a typical HDMI 1.4 eye pattern at
1080p resolution. As shown there are no violations
of the eye pattern with RClamp0524PQ in the circuit.
The RClamp0524PQ may also be used to protect the
remaining lines (I2C, CEC, and hot plug).
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Figure 1. Flow through Layout Using RClamp0524PQ
TDR Measurements for HDMI
The combination of low capacitance, small package, and
flow-through design means it is possible to use these
devices to meet the HDMI impedance requirements of
100 Ohms ±15% without any PCB board modification.
Figure 3 shows a typical impedance test result for a TDR
risetime of 200ps using a Semtech evaluation board with
100 Ohm traces throughout. Measurements were taken
using a TDR method as outlined in the HDMI Compliance
Test Specification (CTS). In each case, the device meets
the HDMI CTS requirement of 100 Ohm ±15% with
RClamp0524PQ
Final Datasheet
Revision Date
Figure 3 - HDMI 1.4 Eye Pattern with RClamp0524PQ
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June 22, 2015
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Semtech
Applications Information
Layout Guidelines for Optimum ESD Protection
Good circuit board layout is critical not only for signal
integrity, but also for effective suppression of ESD
induced transients. For optimum ESD protection, the
following guidelines are recommended:
• Place the device as close to the connector as possible.
this practice restricts ESD coupling into adjacent
traces and reduces parasitic inductance.
• The ESD transient return path to ground should be
kept as short as possible. Whenever possible, use
multiple micro vias connected directly from the
device ground pad to the ground plane.
• Avoid running critical signals near board edges.
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Figure 4. HDMI 1.4 Application using RClamp0524PQ
RClamp0524PQ
Final Datasheet
Revision Date
www.semtech.com
Rev 2.0
June 22, 2015
7 of 10
Semtech
Outline Drawing - SLP2510P8
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RClamp0524PQ
Final Datasheet
Revision Date
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Rev 2.0
June 22, 2015
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Marking Code
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Notes: Dot indicates pin 1 location
Tape and Reel Specification
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Ordering Information
Part Number
Qty per Reel
Reel Size
RClamp0524PQTCT
3,000
7”
RClamp0524PQ
Final Datasheet
Revision Date
www.semtech.com
Rev 2.0
June 22, 2015
9 of 10
Semtech
IMPORTANT NOTICE
Information relating to this product and the application or design described herein is believed to be reliable, however such information is provided as a
guide only and Semtech assumes no liability for any errors in this document, or for the application or design described herein. Semtech reserves the right
to make changes to the product or this document at any time without notice. Buyers should obtain the latest relevant information before placing orders
and should verify that such information is current and complete. Semtech warrants performance of its products to the specifications applicable at the time
of sale, and all sales are made in accordance with Semtech’s standard terms and conditions of sale.
SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES
OR SYSTEMS, OR IN NUCLEAR APPLICATIONS IN WHICH THE FAILURE COULD BE REASONABLY EXPECTED TO RESULT IN PERSONAL INJURY, LOSS OF LIFE
OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN
SOLELY AT THE CUSTOMER’S OWN RISK. Should a customer purchase or use Semtech products for any such unauthorized application, the customer shall
indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney
fees which could arise.
The Semtech name and logo are registered trademarks of the Semtech Corporation. All other trademarks and trade names mentioned may be marks and
names of Semtech or their respective companies. Semtech reserves the right to make changes to, or discontinue any products described in this document
without further notice. Semtech makes no warranty, representation or guarantee, express or implied, regarding the suitability of its products for any
particular purpose. All rights reserved.
© Semtech 2015
Contact Information
Semtech Corporation
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111, Fax: (805) 498-3804
www.semtech.com
RClamp0524PQ
Final Datasheet
Revision date
2.0
June 22, 2015
10 of 10
Semtech