MLX90129 DataSheet old 753 DownloadLink 5193

MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
Features and Benefits
Versatile A/D interface for resistive sensors
ISO-15693 13.56MHz transponder
Slave / Master SPI interface
4 k-bit EEPROM with access protection
Standalone data-logging mode
Ultra low power
Battery or battery-less applications
Low cost and compact design
Application Examples
Cold chain monitoring
Asset management and monitoring (security
and integrity)
Building automation
Industrial, medical and residential control and
monitoring
Ordering Information (1)
Part No.
MLX90129
(1)
Temperature suffix
R (-40°C to 105°C)
Package Code
GO [TSSOP 20]
Option code
-
Example: MLX90129RGO
1 Functional Diagram
2 General Description
The MLX90129 combines a precise acquisition
chain for external resistive sensors, with a wide
range of interface possibilities.
It can be accessed and controlled through its
ISO15693 RFID front-end or via its SPI port.
Without any other component than a 13,56MHz
tuned antenna, it becomes a RFID thermometer.
For measuring others physical quantities, one or
two resistive sensors can be connected to make
batteryless sensing point. In this tag mode, the
chip can supply a regulated voltage to the other
components of the application.
Adding a battery will enable the use of the
standalone data logging mode. The sensor output
data is stored in the internal 3.5kbits user memory.
One can extend the storage capacity by
connecting an external EEPROM to the SPI port.
The SPI port can also connect the MLX90129 to a
microcontroller which allows more specific
applications, like adding actuating capability or RF
transmission.
The MLX90129 has been optimized for low power,
low voltage battery and battery-less applications.
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Page 1 of 53
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
3 Glossary of Terms
EEPROM
DMA
PGA
LFO
XLFO
CTC
HFO
Electrically Erasable Programmable Read-Only Memory
Direct Memory Access (It is the digital unit managing data-logging)
Programmable Gain Amplifier
Low Frequency Oscillator
Crystal Low Frequency Oscillator
Contactless Tuning Capacitance
High Frequency Oscillator
4 Absolute Maximum Ratings
Parameter
Supply Voltage, VBAT (maximum rating)
Reverse Voltage Protection
Maximum output voltage on pad VFIELD
Operating Temperature Range, TA
Storage Temperature Range, TS
ESD Sensitivity (AEC Q100 002)*
Value
6
-0.5
10
-40 to +105
150
4
Unit
V
V
V
°C
°C
kV
* All pin except Pin No 6 (VFIELD limited to 1,5kV) and Pin No 15 (SENSSUP2 limited to 3,5kV)
Exceeding the absolute maximum ratings may cause permanent damage.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
5 Pin definition
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
3901090129
Rev 004
Symbol
COIL2
COIL1
VFIELD
VREG
XIN
XOUT
AT
IRQ
MISO
MOSI
SCK
SS
SENS4
SENS3
SENSSUP2
SENSSUP1
SENS2
SENS1
VSS
VBAT
I/O
B
B
O
O
I
I
I
O
B
B
B
B
I
I
O
O
I
I
I
I
Page 2 of 53
Preliminary
Description
Coil terminal 2 for RFID interface
Coil terminal 1 for RFID interface
Unregulated supply voltage (from RF field)
Regulated supply voltage
Crystal oscillator input 1
Crystal oscillator input 2
Anti Theft (to be connected to ground)
Interrupt output
SPI Master In Slave Out
SPI Master Out Slave In
SPI Serial Clock
SPI Slave Select
Sensor 2 input 2
Sensor 2 input 1
Sensor 2 supply
Sensor 1 supply
Sensor 1 input 2
Sensor 1 input 1
Ground
Battery supply
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
TABLE OF CONTENT
1 Functional Diagram ..........................................................................................................................................1
2 General Description..........................................................................................................................................1
3 Glossary of Terms ............................................................................................................................................2
4 Absolute Maximum Ratings..............................................................................................................................2
5 Pin definition .....................................................................................................................................................2
6 General Electrical and Timing Specifications...................................................................................................4
6.1 Power consumption........................................................................................................................................................................ 4
6.2 RFID interface ................................................................................................................................................................................ 4
6.3 SPI: electrical specification ............................................................................................................................................................. 4
6.4 Non-volatile memories.................................................................................................................................................................... 4
6.5 Slave SPI: timing specification........................................................................................................................................................ 5
6.6 Master SPI timing specifications ..................................................................................................................................................... 6
6.7 Sensor Signal Conditioner: electrical specifications ........................................................................................................................ 6
6.8 VREG regulator, battery monitoring and Oscillators: electrical specifications.................................................................................. 8
7 General Description..........................................................................................................................................9
7.1 Block diagram ................................................................................................................................................................................ 9
7.2 Digital Controller and memory domains ........................................................................................................................................ 10
7.2.1 Digital controller .................................................................................................................................................................... 10
7.2.2 Address domains .................................................................................................................................................................. 10
7.3 Internal Devices............................................................................................................................................................................ 12
7.3.1 EE-Latches ........................................................................................................................................................................... 13
7.3.2 Sensors ADC buffers ............................................................................................................................................................ 14
7.4 Configuration EEPROM & Register files ....................................................................................................................................... 14
7.4.1 EEPROM Map ...................................................................................................................................................................... 14
7.4.2 Update of the Register File.................................................................................................................................................... 15
7.5 EE-Latches and EEPROM Melexis default configuration .............................................................................................................. 16
8 Communication...............................................................................................................................................17
8.1 RFID communication .................................................................................................................................................................... 17
8.1.1 RFID analog front-end........................................................................................................................................................... 17
8.1.2 ISO-15693 Features and Command set................................................................................................................................ 17
8.1.3 Internal Devices dedicated to RFID communication .............................................................................................................. 21
8.1.4 Registers dedicated to RFID communication......................................................................................................................... 22
8.2.Serial Peripheral Interface (SPI) ................................................................................................................................................... 23
8.2.1 SPI : modes of operation....................................................................................................................................................... 23
8.2.2 Slave SPI command set........................................................................................................................................................ 23
8.2.3 Internal devices dedicated to SPI communication ................................................................................................................. 24
8.2.4 Interrupts............................................................................................................................................................................... 26
8.3 Management of communication conflicts ...................................................................................................................................... 27
9 Device Configuration ......................................................................................................................................28
9.1 Standalone datalogger ................................................................................................................................................................. 28
9.1.1 Main features ........................................................................................................................................................................ 28
9.1.2 DMA operations .................................................................................................................................................................... 28
9.1.3 Setup of the Automatic Logging Mode................................................................................................................................... 30
9.1.4 Direct Memory Access configuration ..................................................................................................................................... 31
9.1.5 Wake-up timer / Power management configuration ............................................................................................................... 32
9.1.6 Master SPI configuration....................................................................................................................................................... 33
9.2 Sensor Signal Conditioner ............................................................................................................................................................ 35
9.2.1 Block description................................................................................................................................................................... 35
9.2.2 Sensors common configuration ............................................................................................................................................. 39
9.2.3 Sensor specific configuration ................................................................................................................................................ 41
9.3 Power management ..................................................................................................................................................................... 45
9.3.1 Power modes........................................................................................................................................................................ 45
9.3.2 Oscillators management ....................................................................................................................................................... 46
9.3.3 Energy scavenging ............................................................................................................................................................... 46
9.4 Security ........................................................................................................................................................................................ 47
9.4.1 Communication security........................................................................................................................................................ 47
9.4.2 EEPROM Access security..................................................................................................................................................... 47
10 Application Information.................................................................................................................................49
11 Reliability Information ...................................................................................................................................51
12 ESD Precautions ..........................................................................................................................................51
13 Package Information ....................................................................................................................................52
14 Disclaimer.....................................................................................................................................................53
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Preliminary
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
6 General Electrical and Timing Specifications
o
o
DC Operating Parameters TA = -40 C to 105 C, VVBAT=4V (unless otherwise specified)
6.1 Power consumption
DC Operating Conditions (T = -40°C to 105°C, VVREG = 2.0V to 3.2V)
Parameter
Conditions
Current consumption in “Stand-by” mode
Current consumption in “Sleep” mode
Using the RC-oscillator
Using external oscillator
Current consumption in “Watchful” mode
Current consumption in “Run” mode
EEPROM writing
Sense & Convert
* at 25 °C
**at 105°C
Min
300*
Typ
0.5*
1.5*
2*
100*
80*
500*
Max
14**
15**
Unit
µA
µA
600*
µA
µA
µA
6.2 RFID interface
DC Operating Conditions (T = -40°C to 105°C)
Parameter
Conditions
Programmable resonance capacitance
Once trimmed
Resonance capacitor trimming step
Minimum quality factor of the capacitor
Fcarrier = 13.56MHz
Minimum coil AC voltage (for operation)
Maximum voltage on Coil1, Coil2
ISO/IEC 15693-3 data rate
Vfield external Capacitor
Min
73
Typ
75
0.7
100
Max
77
3
10
26
100
Unit
pF
pF
Vpeak
Vpp
kbits/s
nF
6.3 SPI: electrical specification
DC Operating Conditions (T = -40°C to 105°C) and Low-volt option not activated
Parameter
Description
Min
Typ
VIH
Input High Voltage (SPI slave)
2.1
3.0
VIL
Input Low Voltage (SPI slave)
-0.3
0
VOH
Output High Voltage (I sunk = -2 mA)
2.2
VOL
Output Low Voltage (I forced = 2 mA)
-
Max
3.5
0.9
0.4
unit
V
V
V
V
DC Operating Conditions (T = -40°C to 105°C) and Low-volt option activated
Parameter
Description
Min
Typ
VIH
Input High Voltage (SPI slave)
1.4
2.0
VIL
Input Low Voltage (SPI slave)
-0.3
0
VOH
Output High Voltage (I sunk = -2 mA)
1.2
VOL
Output Low Voltage (I forced = 2 mA)
-
Max
2.5
0.6
0.4
unit
V
V
V
V
6.4 Non-volatile memories
Parameter
DataRet85
Cyclenb25
Cyclenb125
3901090129
Rev 004
Description
Data retention at 85°C
Number of program cycles at 25°C
Number of program cycles at 125°C
Min
10
100000
10000
Page 4 of 53
Preliminary
Typ
Max
unit
year
-
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
6.5 Slave SPI: timing specification
SS
SCK
tSU tHD
MOSI
MSB
LSB
MSB
MISO
MSB
LSB
MSB
tL
tT
tI
Timing specifications
Parameter
Description
tch
tcl
tRead (**)
SCK high time
SCK low time
Delay to read a register word
Delay to read an EEPROM word
Delay to read an EE-Latch word
Delay to get the ADC output code
Delay to write a register word
Delay to write an EEPROM word
Delay to write an EE-Latch word
Execution delay for commands Update
Setup time of data, after a falling edge of SCK
Hold time of data, after a rising edge of SCK
Leading time before the first SCK edge (in clock pulses)
_ when the MLX90129 is not in sleep mode
_ when the MLX90129 is in sleep mode (***)
Trailing time after the last SCK edge
Idling time between transfers (SS=1 time)
tWrite (**)
tConfig
tSU
tHD
tL
tT
tI
Slave side
Min
Max
500
500
2
50
2
430
(*)
17
11
1.5
100
500
600
1.5
500
500
-
Units
ns
ns
µs
ms
ms
ns
ns
ns
ms
ns
ns
(*) – The conversion time depends on the programmed initialization time and on the ADC options.
(**) For the Read/Write Internal Devices commands, the delay depends on the nature of the so-called Internal Device: (Register, EELatch bank, ADC,…)
(***) – See the power management chapter to know when the MLX90129 may be in sleep mode
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Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
6.6 Master SPI timing specifications
Parameter
Description
tch
tcl
tRead
tWrite
tSU
tHD
tL
tT
tI
SCK high time
SCK low time
Read EEPROM time
Erase or Write EEPROM time
Setup time of data, after a falling edge of SCK
Hold time of data, after a rising edge of SCK
Leading time before the first SCK edge
Trailing time after the last SCK edge
Idling time between transfers (SS=1 time)
Min
Master side
Nom
400
400
0.4
1
Max
28
400
400
400
400
1600
Units
ns
ns
µs
ms
ns
ns
µs
ns
ns
6.7 Sensor Signal Conditioner: electrical specifications
-40°C < Temp < 105°C, unless otherwise specified. The sensor is supplied by a regulated voltage called Vref.
Parameter
Symbol
GENERAL CHARACTERISTICS
Battery voltage
Vbat
Temperature range
Conditions / Comment
Min
Low-volt option deactivated
Low-volt option activated
3.8
3.0
-40
Temp_rg
SENSOR ADJUSTMENT CAPABILITY
Reference voltage Vref
Sens_Vref
Low-volt option = 0
2
()
Low-volt option = 1
Full Span
Sens_FS
Full scale of the sensor
3
()
output voltage (Sens_CM
is at the specified value)
Zero offset
Sens_Off
Maximum sensor offset that
1 3
( )( )
can be compensated
Common-mode
Sens_CM
voltage
SENSSUP1 output
Sens_Z
impedance
3.0
2.0
Vref
Typ
Max
Units
6.0
6.0
+105
V
°C
3.1
2.1
-
3.2
2.2
Vref /16
V
V
- Vref/32
-
+Vref/32
V
1/3*Vref
½.Vref
2/3*Vref
V
/1200
60
Ω
Notes:
1
( ): The capability of adjustment of the input offset depends on the
selected gain of the first Programmable Gain Amplifier (PGA1) and
on the sensor output span.
2
( ): The reference voltages of the ADC, of the DAC and the supply
voltage of the sensors are ratio-metric.
3
( ): Full span is defined as the maximal sensor differential output
voltage: ∆V(sensor output)max , i.e the maximum voltage range
allowed on the 90129 sensor interface inputs SENS1, SENS2,
SENS3 and SENS4.
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Data Sheet
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MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
Min
Typ
Max
Units
PROGRAMMABLE-GAIN AMPLIFIER PGA1
PGA1_Accu
Gain accuracy
Code PGA1gain[3:0] =
0000 (gain=8) -> 1010 (gain=75)
90
100
110
%typ
PROGRAMMABLE-GAIN AMPLIFIER PGA2
PGA2_Gain
Gain accuracy
Code PGA2gain[2:0] =
000 (gain=1) -> 111 (gain=8)
90
100
110
%typ
600
+Vref
/32
V/V
V
Parameter
Symbol
PGA1 + PGA2 + DAC
Gain range
PGA_Gain
Sensor offset
PGA_Off_R
trimming range
Sensor offset
PGA_Off_S
trimming step
Differential input
range
PGA_Dir
ADC differential
input range (*)
ADC_Dir
DAC (differential outputs)
Resolution
Dac_Res
INL
Dac_Inl
DNL
Dac_Dnl
Parameter
Symbol
Conditions / Comment
(= offset max of the sensor)
8
-Vref /32
8-bits DAC (7 bits + sign)
Ratio-metric, to cancel the offset
of the sensor
Gain (PGA) = 8
(if higher, PGA_Dir should be
Vref/2 divided by the gain)
7 bits + 1 bit sign
Vref /128
V
Vref /16
V
½.Vref
V
8
0
0
Conditions / Comment
Min
BRIDGE SUPPLIES & REFERENCES
Reference serial
Ref_Res
6 bits-programmable:
resistance
Min
Max
Serial resistance
Ref_Step
step
INTERNAL TEMPERATURE SENSOR
Full scale
ITS_FS
Output range
ITS_Or
∆Temp = 145°C, ∆Vout =
Offset
ITS_Off
∆Vout at T = 25°C
Sensitivity
ITS_Sens
∆Vout / ∆Temp =
Non-linearity
ITS_LinErr
∆Temp = 145°C
(T(measured) - T(extrapolated) ) =
Typ
0.5
0.5
bit
lsb
lsb
Max
Units
0.4
65
1.1
-40
-
125
25
0.9
±0.9
kΩ
kΩ
+105
-
°C
mV
mV
mV/°
mV
(*) Note. To avoid any overflow issue, the ADC output code should be limited to the range [2000 – E000].
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Preliminary
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
ADC
The MODE[1:0] bits controls the tradeoff between the duration of the counting phase and the resolution.
Mode 00 is the fastest but also the least accurate mode whereas the mode 11 is the most accurate but the
slowest. The LOW_POWER bit allows the user to reduce the power consumption of the analog
ADC parameter
Mode 00
Mode 01
Mode 10
Mode 11
9
10
11
12
bit
65
130
90
180
160
320
280
560
µs
ENOB: effective number of bits
Conversion time (*) in normal power mode
Conversion time (*) in low power mode
Units
(*): To get the sampling rate of the system, the initialization time must be added to the conversion time. This
time is programmable as it depends on the selected sensor (by default it is 150 µs).
6.8 VREG regulator, battery monitoring and Oscillators: electrical specifications
-40°C < Temp < 105°C, unless otherwise specified.
Parameter
Symbol
VREG REGULATOR
Output voltage
Vreg_Vlow
Vreg_Vhigh
Output max. current Vreg_Imax
External capacitor
Vreg_Capa
Conditions / Comment
Min
Typ
Max
UNITS
Low-voltage option
High-voltage option
Low-volt option
Drop 7% VREG
Drop 15% VREG
Stable smoothed signal
2.0
2.8
2.2
3.0
2.4
3.2
V
V
0
-
2.0
5.0
10
mA
mA
µF
1.7
1.9
2.3
V
BATTERY LEVEL MONITOR CIRCUIT
Threshold
Bmc_Thres
OSCILLATORS
Internal Low Frequency
Oscillator
Accuracy of the LFO
frequency
Crystal Frequency
Oscillator
Internal High Frequency
Oscillator
3901090129
Rev 004
fLFO
Factory calibration
AcLFO
fXLFO
With an external 32,768kHz
crystal
fHFO
4,3
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Preliminary
32,768
kHz
±15
%
32,768
kHz
5
5,6
MHz
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
7 General Description
7.1 Block diagram
The sensor signal conditioner is used to amplify, filter and convert the output voltage of resistive
sensors. They may be an external single-ended or differential resistive sensor, or the internal
temperature sensor. The two external sensors are supplied by a stable reference voltage, provided by an
integrated voltage regulator. The sensor output voltage is amplified thanks to a programmable-gain
amplifier, and has its offset voltage compensated. Then, the conditioned sensor signal fits the input range
of the A/D converter. The ADC converts the signal in a 16-bits code that can be stored or transmitted.
The power management unit deals with the different power modes of the chip: it monitors the battery
level, scavenges the energy coming from a RFID 13,56MHz field and makes the power-on reset signal. A
regulator is used to supply the digital parts, but can also be used to supply some other external devices.
The Oscillators block contains different kind of oscillators: a very low power, low frequency 1kHz RC
oscillator used as a wake-up timer, a low-power 32.768kHz quartz oscillator that can be used for an
accurate time basis, and a high frequency 5MHz RC oscillator used for the digital controller.
The Register File contains all the configuration parameters of the chip. It may be loaded from the
EEPROM after power-on, or as the result of a specific request from RFID or SPI.
The EE-Latches are used when device configuration parameters have to be immediately available.
The RFID front-end receives an external 13,56-MHz magnetic field, sensed on an external antenna coil.
The antenna design is made easy thanks to an internal programmable high-Q capacitance (tuned during
the test phase). From the antenna output voltage, it makes a stable clamped DC supply voltage, recovers
the clock, and controls the modulation of the carrier and the demodulation of the incoming signal.
The EEPROM is a 4-kbits non-volatile memory, organized as 256 words of 16 bits divided in 39 reserved
for configuration, 2 for default trimming value (EE-Latches #03,#04 and #09) backup and 215 available
for the application (around 3.4 kbits user memory). Its access is protected by several security levels.
Some EE-Latches are also used when the stored data have to be immediately available for use.
The Digital Controller manages the accesses of the different interfaces (SPI, RFID) with the different
memories (EEPROM, register file) and the sensor. It comprises the RFID ISO-15693 and SPI protocols,
controls the sensor signal conditioner and stores or sends the ADC output code. It can also run some
standalone applications, thanks to its unit called Direct Memory Access (DMA).
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Data Sheet
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MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
7.2 Digital Controller and memory domains
7.2.1 Digital controller
The main features of the digital part of
MLX90129, called Digital Controller are:
•
•
•
•
•
•
•
•
Slave / Master SPI interface
RFID interface
DMA: Direct Memory Access
Register File controller
EEPROM controller
Sensor interface controller
Clock and Power management
Core: transactions arbiter and
interrupt manager
The digital controller manages the
transactions between the communication
interfaces, the memories and the sensor. It
allows also a standalone mode with its DMA
unit. All these blocks are described in the
next chapters.
The SPI and RFID communication ways can be used concurrently. The Core transaction arbiter handles the
priorities and the interrupts. It updates some status bits that may be used by the external microcontroller or
the RFID base-station to optimize the communication.
The Digital Controller of the MLX90129 allows the user to do the following tasks, via SPI or RFID:
_ Configure the sensor interface and the communication media.
_ Manage the power consumption, the interrupts, the security items,…
_ Run A/D conversions of the selected sensors.
_ Store (or read) data in the internal or in an external EEPROM.
_ Configure and start a standalone process (sleep – sense – interrupt or store – sleep - …)
_ Get the status of the current process.
All these tasks may be done by simply reading or writing the different memories: EEPROM, registers, eeLatches, internal devices. Thus, several address domains are defined to access them in an easy way.
7.2.2 Address domains
Four address domains have been defined to designate the memory and the non-memory devices that act
during the requested transactions:
- EEPROM address domain:
This domain addresses the non-volatile EEPROM. It is used to store the user-defined data and the image of
the Register File that can be automatically downloaded after a power-on. This memory block is energy
independent and can store data even when the MLX90129 is no longer powered.
- Register File address domain:
This memory domain is used to store the current configuration information of all internal MLX90129 devices
(Sensor interface, Power management …). This memory is energy-dependent and must be updated each
time the MLX90129 is turned-on.
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MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
- Internal Devices address domain:
This domain allows accessing the registers linked to the so-called internal devices like the ADC buffers, the
status words of the Core Transaction Arbiter and the EE-Latches. They may be accessed with the
appropriate SPI / RFID commands including its address. The difference with the Register File is the fact that
they are not copied from the EEPROM at the start-up and they may be used during the requested
transaction.
- External memory address domain:
This domain addresses the external memory which can be connected to the MLX90129, using the SPI in
master mode.
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MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
7.3 Internal Devices
The term Internal Devices designates the registers used to configure the main “non-memory” digital units:
sensor interface, SPI / RFID interfaces, DMA … All these registers are part of the Internal Device Address
Domain:
The registers linked to the SPI and RFID interfaces, called SPI/RFID core control word and SPI/RFID core
interrupt/status word have the same definition, but are physically different and may contain some different
data. The content of these registers are explained in the following chapters (SPI, RFID). Some of these bits
may be used to avoid conflicts for the memories access, when communicating with SPI and RFID at the
same time. For that, they can be accessed at any time via SPI or RFID.
The SPI / RFID local buffers store the result data of the last transaction. They are useful for example when
the A/D conversion time is too long and does not fit the timing requirements of the RFID protocol.
The EE-Latches and the Contactless-tuning capacitance code contain some non-volatile data, immediately
available (no delay, no supply), used for the RFID capacitance trimming or for the options of the power
management.
The registers of the DMA unit called Current destination address are used to give a status of the process (the
number of words that have been registered).
The content of the ADC buffer depends on the selection byte (Address) used within the Read/Write Device
command: it may be the data from the internal temperature sensor, or from one of the two external sensors.
After receiving a Read Device command (from RFID or SPI, with the appropriate address), the MLX90129
supplies the selected sensor and its interface, converts its output in a digital format, and stores it in the
appropriate ADC Buffer. The data is also available in the SPI / RFID local buffer.
The CTC is the code used to program the RFID antenna capacitance, according to the specifications.
Map of the Internal Device Address Domain
Addr
0x00
0x01
0x02
From SPI side
From RFID side
SPI / RFID
SPI core control word
RFID core control word
SPI core interrupt/status word (read only)
RFID core interrupt/status word (read only)
SPI local buffer (read only)
RFID local buffer (read only)
Addr
0x03
0x04
0x05
0x06
0x07
0x08
0x09
Access by SPI and RFID
Non-volatile memory
EE-Latches word 0
EE-Latches word 1
Link
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Direct Memory Access (DMA)
Current destination address (read only)
Sensors
ADC buffer sensor 0
ADC buffer sensor 1
ADC buffer sensor 2
Contactless-tuning capacitance (CTC)
CTC code
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Note:
The internal devices having the addresses 0x00, 0x01, 0x02, 0x05 are registers. Those having the addresses 0x03, 0x04,
0x09 are EE-Latches, and those whose addresses are 0x06, 0x07, and 0x08 refer to the ADC output buffers. The read /
write delays are specified for all kind of internal devices, when accessing them via SPI.
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Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
7.3.1 EE-Latches
Another kind of non-volatile memory is used to store the trimming / configuration bits that should be
immediately available: the EE-Latch bank. They are mainly used for the trimming of the oscillators and the
capacitance of the antenna, for security and power management. It is important to read its value before reprogramming it, in order to not erase some trimming bits.
EE-Latches map: (Internal Devices Domain, Address #03, #04 and #09, read/write)
Bits
Name
#03 - EE-Latches word 0
4:0
LFO_Freq_Trim (Trimming bits)
6:5
Bias_Cur_Trim (Trimming bits)
7
DisableAutoLoading
10:8
13:11
14
15
HFO_Freq_Trim (Trimming bits)
VReg_Trim (Trimming bits)
RCb_Quartz
Disconnect_Vfield_Vbat
#04 - EE-Latches word 1
1:0
Mod_Res
2
3
7:4
14:8
VReg_Dis
VReg_LV
Reserved
RFID_EEPROM_Lock_Map**
15
Description (when the bit is asserted high)
(used by Melexis)
(used by Melexis)
Disables the automatic loading of the Register File with its image
from the EEPROM after a power-on reset from the battery
(used by Melexis)
(used by Melexis)
Selects the low-frequency RC-oscillator LFO (=0) or the quartzoscillator XLFO (=1)
Disconnects the pads VFIELD and VBAT, when not using the
energy from the field to supply the whole device.
00: modulator resistance = infinite
01: modulator resistance = 400Ω
10: modulator resistance = 250Ω
11: modulator resistance = 150Ω
Disables the VReg regulator and shorts-cut its output to Vbat
Low-voltage option for the VREG regulator and the sensor regulator
(Must be 0)
Map of pages in EEPROM, to be locked for RFID write, using the
“Lock” command
Locks the RFID device
RFID_Device_Lock**
#09 - CTC code
4:0
CTC_Trimming
Trimming of the integrated capacitance, part of the RFID antenna
15:5
Not used
(Must be 0)
(**) - following fields are not accessible for write from RFID interface via device write command.
EE-Latches backup in EEPROM
The content of EE-Latches (Internal devices #03, #04 and #09) are copied in the EEPROM for backup:
EEPROM #27 and #28
Bits
Description
#27 - Internal device backup word 1
15:0
Copy of internal device #03 bits [15:0]
#28 -Internal device backup word 2
3:0
Copy of internal device #04 bits [3:0]
15:4
random
3901090129
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Page 13 of 53
Preliminary
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
7.3.2 Sensors ADC buffers
In order to read the output data of a sensor, the SPI master or the RFID base-station has to access one of
the 3 words ADC buffer in the Internal Device address domain. Accessing (read command) this buffer makes:
• Load the selected sensor configuration into the register file
• Start the A/D conversion and the data processing.
Ex: The command read ADC buffer sensor 0 (Read Internal Device #06) sent by RFID or by SPI loads the
configuration of the sensor 0 from EEPROM (address #15 to #1A) into the register file and start the A/D
conversion. Then the command read ADC buffer sensor 2 (Read Internal Device #08) sent by RFID or by SPI
overwrite the register file with the configuration of the sensor 2 (EEPROM from #21 to #26).
To make sure that all operations are done, it is enough to:
• Wait for a specified period of time and read the internal device #02 (local buffer).
• Periodically monitor the SPI/RFID Core status word and check the bit: Sensor interrupt: Data ready.
Using RFID, it is usually needed to read internal device #02 to access the ADC data.
7.4 Configuration EEPROM & Register files
The MLX90129 embeds a 4kbits EEPROM memory and some EE-Latches bits. This non-volatile memory
contains the configuration parameters and some identification numbers. The configuration part of the
EEPROM consists of 45 words of 16 bits. The 210 other words are available for the specific needs of the
application or may be used for data-logging or for the configuration of the external devices. The read and
write access rights are defined for each page and depends on the device wanting to access it: a
microcontroller, a RFID base-station or the internal DMA unit of the MLX90129. The user can also lock and
unlock some pages by sending the appropriate RFID commands.
7.4.1 EEPROM Map
Address
Description
Link
UID (Unique Identifier)
#00
#01
#02
#03
UID: bits 15:0
UID: bits 31:16
UID: bits 47:32
UID: bits 63:48
#04
#05
#06
#07
#08
EEPROM security map
Device security map
Password RFID
Page 17
Page 17
Page 17
Page 17
Security configuration space
#09
#0A
#0B
#0C
#0D
#0E
#0F
#10
#11
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Page 47
(not used)
(not used)
DMA configuration space
DMA: Control word
DMA: Source address word
DMA: Destination address word
DMA: Length
SPI (External memory) configuration space
External memory: Control word
External memory: Command codes word
Timer (power control) configuration space
Timer: Period
Timer: control word
Address space always accessible from RFID interface
RFID user register: its purpose is user-defined.
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Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
Address
#12
#13
#14
#15
#16
#17
#18
#19
#1A
#1B
#1C
#1D
#1E
#1F
#20
#21
#22
#23
#24
#25
#26
#27
#28
Description
Sensors common configuration space
Sensor power configuration word
(reserved)
Sensor trimming and fault-detector configuration word
Sensor 0 configuration space
Sensor 0: Sensor control word
Sensor 0: Sensor low threshold word
Sensor 0: Sensor high threshold word
Sensor 0: Sensor signal conditioner configuration word
Sensor 0: Sensor connections configuration word
Sensor 0: Sensor resistance configuration word
Sensor 1 configuration space
Sensor 1: Sensor control word
Sensor 1: Sensor low threshold word
Sensor 1: Sensor high threshold word
Sensor 1: Sensor signal conditioner configuration word
Sensor 1: Sensor connections configuration word
Sensor 1: Sensor resistance configuration word
Sensor 2 configuration space
Sensor 2: Sensor control word
Sensor 2: Sensor low threshold word
Sensor 2: Sensor high threshold word
Sensor 2: Sensor signal conditioner configuration word
Sensor 2: Sensor connections configuration word
Sensor 2: Sensor resistance configuration word
EE-Latches backup space
Internal device backup word 1
Internal device backup word 2
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(**) In the register file, this configuration space is updated from the appropriate part of the Extended sensor
configuration space at each access to one of the three sensors. This configuration space and all others with
higher addresses are not updated during a Register File Update operation.
7.4.2 Update of the Register File
The EEPROM contains the initial image of
the Register File. This image is copied after
the power-on, upon a SPI / RFID Update
request. The sensor configuration in the
Register File depends on the currently
selected sensor. The sensor is selected
either manually by reading the ADC buffer
corresponding or automatically during a
standalone application.
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Preliminary
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
7.5 EE-Latches and EEPROM Melexis default configuration
The MLX90129 is pre-set with the following configuration.
Address
Default value
[#03 - #00]
#04
#05
[#0B - #06]
#0C
[#10 - #0D]
#11
#12
#13
#14
[#FF - #15]
0xXXXX
0xAAA8
0x3FF0
0x0000
0xXXXX
0x0000
0xXXXX
0x00FF
0x0000
0b0000.00TT.TT00.0000
0xXXXX
03
04
09
0b00TT.TTTT.0TTT.TTTT
0x0003
0b0000.0000.000T.TTTT
Description
EEPROM
Unique ID set by Melexis
Refer to EEPROM security map
Refer to device security register
Random value, can be replaced by 0x0000
Random value, can be replaced by 0x0000
Refer to sensor power configuration
Random value, can be replaced by 0x0000
EE-Latches
Data loading enabled / LFO selected / Vfield connected to Vbat
Reading gives 0x001F
‘T’ are Melexis trimming bits
In order to configure easily the registers of the MLX90129 a configuration tool can be downloaded from
the Melexis web site, www.melexis.com.
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Preliminary
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
8 Communication
8.1 RFID communication
8.1.1 RFID analog front-end
The MLX90129 RFID interface complies with the ISO-15693 layer1 requirements. It is accessed by the RFID
base-station (reader) in modulating the 13.56 MHz carrier frequency. The data are recovered from the signal
amplitude modulation (ASK, Amplitude Shift Keying 10% or 100%). The Data transfer rate is 26 kBit/s using
the 1/4 pulse-coding mode.
The outgoing data are generated by an antenna load variation, using the Manchester coding, and using one
or two sub-carrier frequencies at 423 kHz and 484 kHz. The data transfer rate is 26 k-Bit/s in the fast datarate mode. From the incoming field, the RFID interface recovers the clock and makes its own power supply.
The rectified voltage may also be used to supply the whole device in battery-less applications.
8.1.2 ISO-15693 Features and Command set
For complete information about the communication protocol, please refer to the standard document:
ISO/IEC FCD 15693-2 and ISO/IEC FCD 15693-3: Identification cards- contactless integrated circuit(s)
cards - Vicinity cards - It is available on the website: http://www.iso.org
Some of the features of the protocol are not supported. Furthermore, some “custom” commands have been
defined (see Command set). The MLX90129 is provided with a Unique IDentifier compliant with the ISO
standard.
Summary of the main, supported features
Features
Reader to Tag Modulation Index
Reader to Tag Coding
Tag to Reader Modulation
Tag to Reader Sub-Carrier
Tag to Reader Coding
Tag to Reader Data-rate
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Supported
10% and 100%
Pulse Position Modulation: 1 out of 4
Single and dual Sub-carrier
423 kHz / 484 kHz
Manchester
High Data-rate 26 kBit
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Preliminary
Not supported
PPM: 1 out of 256
Low Data-rate 6 kBit
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
Summary of the main, supported protocol parts
•
Data element
Data Element
UID (Unique Identifier)
AFI (Application Family Identifier)
DSFID (Data Storage Format Identifier)
CRC
Security status
•
Protocol
Request Flag
Sub-Carriers
Data-rates
Inventory
Protocol extension
Select
Address
Options
RFU
Response Flag
Error
•
Supported
Yes
No
No
Yes
No
Supported
Yes
No
Yes
No
Yes
Yes
No
No
Supported
Yes
Anti-collision: Supported
Command frame
The content of the data included in the frame of a communication request, and the response from the
MLX90129 to the base-station depends on the command opcode. The meaning of the flags, the equation of
the CRC, the description of the Start-Of-Frame, the End-Of-Frame and the unique identifier number (UID),
the meaning of the error codes… are included in the standard ISO-15693 layers 2 and 3.
Request format:
SOF
Flags
8 bits
00XX
0X1X
Command
8 bits
XXXXXXXX
(UID)
64 bits
Optional
(Data)
x bits
CRC 16
16 bits
EOF
CRC 16
16 bits
EOF
Response format (if no error):
SOF
Flags
8 bits
00
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(Data)
x bits
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Preliminary
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
Command set
The command set lists the mandatory commands defined in the standard ISO-15693 layer 3. It comprises
also some custom commands used for some specific applications: access the sensor buffer, access an
external device via SPI, handles the security options,…
ISO-15693 mandatory and optional commands
Commands
Inventory
Stay quiet
Read single block
Write single block
Lock Block
Read multiple block
Select
Reset to ready
code
01
02
20
21
22
23
25
26
Description
Enable an anti-collision sequence
Enable the ‘Stay Quiet’ mode
Read a single word from EEPROM
Write a single word to EEPROM
Lock a page of EEPROM
Read one or several contiguous blocks of the EEPROM
Enter the “Selected” state (anti-collision)
Return to the ‘Ready’ mode
Custom commands
Commands
Read register file
Write register file
Read internal device
Write internal device
Read external memory
Write external memory
Send specific command
code
Send addressed
specific command
Write external memory
status
Read external memory
status
Lock device
Unlock device
Update Register File
Unlock Block
A7
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Rev 004
A0
A1
A2
A3
A4
A5
A6
A8
A9
B0
B1
C0
F0
Description
Read one word from the Register file
Write one word to the Register file
Read the content of an internal device identified by an address byte
Write the register word of an internal device, identified by an address byte
Read a word from an external memory (via SPI)
Write a word into an external memory (via SPI)
Send a command via SPI to an external device, whose code is appended
to the frame (e.g. Write Enable for an external EEPROM).
Send a command via SPI to an external device, whose code and address
are appended to the frame (e.g. Lock Block for an external EEPROM)
Send a command via SPI, to write an external memory status register
(The op-code of this command is stored in a register)
Send a command via SPI, to read an external memory status register
(The op-code of this command is stored in a register)
Lock an internal device (EEPROM, ADC, …), preventing its access.
Unlock an internal device
Fill the Register File with the image from the EEPROM, without re-boot
Unlock a locked page of EEPROM.
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Preliminary
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
Frame content
Commands
Inventory
Stay quiet
Read single block
Read register file
Write single block
Write register file
Lock Block
Read multiple block
Reset to ready
Select
Read internal device
Write internal device
Read external memory
Write external memory
Send specific command
Send addressed specific
command
Write external memory
status
Read external memory
status
Lock device
Unlock device
Update Register File
Unlock Block
3901090129
Rev 004
Data in request
(in order of apparition)
Mask length (8 bits)
Mask value (0 – 64 bits)
UID (64 bits)
Optional: UID (64 bits)
Block address (8 bits)
Optional: UID (64 bits)
Block address (8 bits)
Data (16 bits)
Optional: UID (64 bits)
Block address (8 bits)
Optional: UID (64 bits)
First block address (8 bits)
Number of blocks (8 bits)
UID (64 bits)
UID (64 bits)
Optional: UID (64 bits)
Address (8 bits)
Optional: UID (64 bits)
Address (8 bits)
Data (16 bits)
Optional: UID (64 bits)
Read command op-code (8 bits)
Block address (16 bits)
Data in response
(when no error occurs)
UID (64 bits)
Possible error
codes
0X, AX
No response
Read block (16 bits)
None
0X, 10, AX
No data
0X, 10, 12, 13,
AX
No data
0X, 10, 11, AX
Read blocks (N*16 bits)
0X, 10, AX
No data
No data
Data (16 bits)
0X, AX
0X, AX
0X, AX
No data
0X, AX
Data (16 bits)
0X, AX
Optional: UID (64 bits)
Write command op-code (8 bits)
Block address (16 bits)
Data (16 bits)
Optional: UID (64 bits)
Command op-code (8 bits)
Optional: UID (64 bits)
Command op-code (8 bits)
Address (16 bits)
Optional: UID (64 bits)
Command op-code (8 bits)
Data (8 bits)
Optional: UID (64 bits)
Command op-code (8 bits)
Optional: UID (64 bits)
Address (8 bits)
Optional: UID (64 bits)
Security password (16 bits)
Address (8 bits)
Optional: UID (64 bits)
Optional: UID (64 bits)
Security password (16 bits)
Address (8 bits)
No data
0X, AX
No data
0X, AX
No data
0X, AX
No data
0X, AX
Data (8 bits)
0X, AX
No data
0X, AX
Response data (16 bits)
03, 0X, AX
No data
Always an error code
03, A0, A1
01
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Preliminary
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
Response error code
If the flag Error_flag of the response is set by the MLX90129, the error code is transmitted to provide some
information about the error that occurred. Most of them are described in the standard ISO15693. The last
ones are some custom codes.
Error
code
01
02
03
0F
10
11
12
A0
A1
Meaning
FWT
Command
The command is not supported, i.e. the request code is not recognized
The command is not recognized, for example: a format error occurred
The option is not supported
Unknown error
The specified block is not available (does not exist)
The specified block is already locked and thus cannot be locked again
The specified block is locked and its content cannot be changed
The selected Internal Device is locked
The selected Internal Device is busy (*)
Short
Short
Short
Short
Short
Short
Short
Short
Short
A2
The access to the selected Internal Device is denied
Short
All
All
All
All
Read/Write/Lock
Lock
Write
Write int. device
Read/Write
internal device
Read/Write
internal device
(*) “Device is busy” error code occurring during a write operation means that the MLX90129 is still
performing the last write operation. Then, the base-station has to wait for some time and send the command
again. For read operation, it means that the selected Internal device (sensor ADC, …) cannot read the data
and respond immediately.
The purpose of the address #11 in EEPROM is user-defined. For example, it may be used for some fast
handshakes between the microcontroller and the RFID base-station.
8.1.3 Internal Devices dedicated to RFID communication
Using the RFID (and SPI) commands called Read-internal-device and Write-internal-device, it is possible to
access some registers of the Device Address Domain. These registers contain some status information,
some settings and options, the ADC buffer of the selected sensor, the ee-Latches, etc… This so-called
Internal Device is selected thanks to the address byte included in the command. The addresses and the
access rights of the Internal Devices are listed in the chapter: Core transaction arbiter.
The following words are parts of the Device address domain:
• The RFID core control word is read/write. It contains a bit used to lock the non-RFID transactions.
• The RFID interrupt & status word is read-only, using the RFID command Read internal device, and
the address 0x00. It contains the status of the security units, of the pending accesses to the
memories, and of the system current activity.
RFID core control word (Devices address domain, address #00, read/write)
Bits Name
Description (if bit=1)
#00 – RFID core control word
15:1 Unused (must be 0)
0
Core_Lock
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When set to ‘1’, it locks any transactions including the SPI interface or the DMA. This
allows having an access from the RFID interface at any time. If the base station sets
this bit, but the last transaction has not been accomplished yet, this latter is not
interrupted. But it is still possible to access the Device Address Domain, via SPI.
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Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
RFID interrupt & status word (Devices address domain, address #01, read-only)
Bits Name
#01 – RFID interrupt & status word
15
(reserved)
Irq_LowBattery
14
Irq_SensorFault
13
Irq_ExternalEvent
12
11
10:8
7
(reserved)
(unused)
Irq_Sensor_Threshold
2
Irq_Timer_WakeUp
Irq_DMA_ready
Irq_EEPROM_Full
(unused)
Transaction_Error_Flag
1
Last_Transaction_Status
0
Core_Main_Status
6
5
4
3
Description (if bit=1)
Low battery voltage detected
Sensor fault detected (bridge is broken or short-cut)
An external event has been detected (rising edge on pin AT). (The
event detector must be activated and enabled)
The output data from the sensor has crossed the defined threshold
level or window
The count-down of the wake-up is over
The DMA transaction has been completed
The internal or external non-volatile memory if full
One of the previously executed commands has failed (delay not
fulfilled, denied access, data not processed …). This bit is
automatically cleared after power-on or after read of the RFID interrupt
& status word.
This bit indicates whether the last request has been processed (‘0’) or
not (‘1’). In this latter case, the MLX90129 ignores any new request.
The system is busy with an internal operation and the request from
RFID cannot be processed.
Modulator setting: refer to chapter 7.3.1 ee-latches #04, bits [1:0].
8.1.4 Registers dedicated to RFID communication
RFID configuration register (Register-File address domain, address #08, read-write)
Bits Name
#08 – RFID configuration word
0
Not used
Demodulator gain *
3:1
15:4
Not used
Description (if bit=1)
Must be 0
000: maximum gain
111: minimum gain
Must be 0
*: Note. Low values of Demodulator-gain are not suitable in case of high fields. Use values of Demodulatorgain higher than 100 to have a full communication range.
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Preliminary
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
8.2 Serial Peripheral Interface (SPI)
8.2.1 SPI : modes of operation
The SPI implemented in the MLX90129 works in Slave or Master mode.
• When the MLX90129 SPI is configured in the Slave mode, the SPI master (being a microcontroller, a
Zigbee End Device, …) controls the serial clock signal SCK, the Slave Select signal SS and transmits
the data to the slave via the Master-Out-Slave-In signal MOSI. As a slave, the MLX90129 answers
with the Master-In-Slave-Out signal MISO, synchronized on SCK.
• When configured in the Master mode, the MLX90129 SPI can select an external slave, typically an
external serial EEPROM, and use it for data logging. The command op-codes and delays between
request and response are programmed in the SPI configuration register. The master SPI controls the
Slave Select, the Serial Clock signal, sends the data on MOSI and read data on MISO. It is possible
to control the SPI as master thanks to custom RFID commands.
SPI is compliant with the following control options:
• Master mode and Slave mode
• CPOL=0: The clock is active-high: in the idle mode, SCK is low.
• CPHA=0: Sampling of data occurs on rising edges of SCK. Toggling of data occurs on falling edges.
• MSB first (on MISO and MOSI)
• Baud-rate: 1MHz
Detailed signal description:
• MOSI : this pin is used to transmit data out of the SPI module when it is configured as a Master and
receive data when it is configured as a Slave.
• MISO : this pin is used to transmit data out of the SPI module when it is configured as a Slave and
receive data when it is configured as a Master.
• SS : when the MLX90129 is configured as a SPI master, it controls the SS pin to select an external
peripheral with which a data transfer will take place. When configured as a Slave, it is used as an
input to receive the Slave Select signal.
• SCK : this pin is used to output or receive the clock.
• IRQ : this pin is used to interrupt the SPI master (microcontroller) process.
When the MLX90129 is not selected by the SPI master or when the received command code is not
supported, the pin MISO is in tri-state. When the MLX90129 uses the SPI in the master mode (to access an
external memory), it complies with the same rules for any external SPI masters.
8.2.2 Slave SPI command set
SPI command set
Command
EEP_RD
EEP_WR
REG_RD
REG_WR
DEV_RD
DEV_WR
REG_UPDT
3901090129
Rev 004
Code
0x0F
0x0E
0x0D
0x09
0x10
0x18
0x1C
Operation
Read the addressed EEPROM word
Write the addressed EEPROM word
Read the addressed register in the Register File
Write the addressed register in the Register File
Read a word from the selected internal device (Control, status, ADC,…)
Write a word into the selected internal device (Control, ee-Latches )
Fills the Register File with its image stored in the EEPROM (without reboot)
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Preliminary
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
8.2.3 Internal devices dedicated to SPI communication
The SPI and the RFID interfaces share the access to the memory. In order to prevent any access conflicts,
and to manage the communications via SPI and RFID, two registers have been defined in the Device
Address Domain: the SPI Core control word and the SPI interrupt/status word. They are always immediately
accessible for read or write operations, even if the system is busy.
The SPI I/O signals are accompanied of an output interrupt signal IRQ. This signal may be used to wake up
or to warn the SPI master (micro-controller) about some access conflicts or some general problems (low
battery level, sensor fault, external event …). It is set once one of the selected events occur. It is reset once
the SPI master has read the SPI Core interrupt / status word, or has set the bit Disable IRQ setting of the SPI
Core control word.
SPI Core control word (Device address domain, address #00, read/write)
Bits Name
#00 – SPI Core control word
15:7 -
Description (if bit=1)
6:4
6
5
4
Irq_Rfid_Field_En
Irq_Rfid_EEp_Access_En
Irq_Rfid_ Reg_Access_En
RFID interrupts control:
Enable RFID Interrupt 2 (Access to Register file).
Enable RFID Interrupt 1 (Access to EEPROM).
Enable RFID Interrupt 0 (RFID field is detected).
3
Irq_Last_Trans_En
End of transaction
Enable interrupt indicating the completion of the last requested
transaction. To de-assert this interrupt, the user will request another
transaction, read the SPI local data buffer (in device address
domain), disable this interrupt or block IRQ assertion.
2
Irq_Dis
Disabled IRQ setting.
Disable the setting of the IRQ signal.
1
Core_Sts_Irq_En
Core status interrupt enabled.
Enable the interrupt on IRQ telling that the system is free.
0
Core_Lock
Core lock.
Lock any transactions between the different internal devices and the
non-SPI interfaces. This allows having an access from SPI to any
registers at any time. The last pending transaction is always
completed.
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Reserved (must be 0)
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MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
SPI interrupt & status word (Devices address domain, address #01, read only)
Bits Name
#01 – SPI interrupt & status word
(reserved)
15
Irq_LowBattery
14
Irq_SensorFault
13
Irq_ExternalEvent
12
(reserved)
11
Irq_Rfid_Reg_Access
10
Irq_Rfid_EEp_Access
9
Irq_Rfid_Field
8
Irq_Sensor_Threshold
7
6
5
4
3
Irq_Timer_WakeUp
Irq_Dma_Ready
Irq_Memory_Full
Irq_Write_Failure
2
Transaction_Error
1
Last_Transaction_Status
0
Core_Main_Status
Description (if bit=1)
Low battery voltage detected
Sensor failure detected (broken or short-cut)
An external event has been detected (rising edge on pin AT)
The RFID interface is accessing the Register File
The RFID interface is accessing the EEPROM
The magnetic field is high enough to start a RFID communication
The output data from the sensor has crossed the defined threshold
level or window
The count-down of the wake-up is over
The DMA transaction has been completed (in the non-loop mode)
The internal or external non-volatile memory is full
The non-volatile block has been badly or weakly written: the data is
wrong or its long-term retention is not guaranteed
One of the previously executed commands has failed (read delay,
denied access, data not processed,…). This bit is automatically cleared
after reboot or after read of the SPI interrupt & status word.
This bit indicates whether the last request from SPI has been
processed (‘0’) or not (‘1’). In this latter case, the MLX90129 ignores
any new request from SPI.
The system is busy with an internal operation and the request from SPI
cannot be processed immediately.
In the application cases where a microcontroller, a RFID base-station or the DMA may access the memories
or the internal devices at the same time, it could be useful to check the state of the bit Core main status. If the
system is busy for a too long time, it is possible to stop the on-going process with the following sequence:
1. Set the bit Core lock in the SPI Core control word.
2. Set the bit Core interrupt enable (to get an interrupt after the completion of the last on-going
transaction).
3. Wait for an interrupt on IRQ.
4. Reset the bit Core interrupt enable.
5. Do all necessary actions.
6. Reset the bit Core lock in the SPI Core control word.
In application where the SPI is used for several subsequent commands, it could be useful to check the Last
transaction status to be sure that the system is ready before a new transaction.
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8.2.4 Interrupts
The following table summaries the information about the interrupts. For each bit of the SPI interrupt & status
word, the condition to assert high or low the status flag, and to assert high the interrupt request on IRQ, are
described. All interrupts can be disabled in asserting high the bit Irq_Dis of the SPI Core control word.
Bit
0
1
2
Interrupt
name
Core_Main_
Status
Last_
Transaction_
Status
Transaction_
Error
3
Irq_Write_
Failure
4
Irq_Memory_
Full
5
Irq_Dma_
Ready
Status flag assertion HIGH :
conditions
The Core is not busy with
transactions between different
internal devices
The last requested transaction
with the Core has been
completed. E.g. ADC is ready
When one of previously
requested commands was not
executed
When one of the previously
requested write-operations to a
non-volatile memory has failed
Conditions to be fulfilled:
- the DMA is busy
- loop enable and IRQ enable
bits are set in DMA control
- the allocated memory is full
The DMA unit has completed
the last requested transaction
Status flag assertion LOW :
conditions
The Core is busy with a
transaction between different
internal devices.
A request for a new
transaction is pending
IRQ enable
conditions
Core_Sts_Irq_En
=1
The user reads the
SPI interrupt & status word
(Never)
The user reads the
SPI interrupt & status word
Always
The user halts the DMA
processing or disables the IRQ
enable bit in DMA control word
Always
The user reads the
SPI interrupt & status word
Dma_IrqDataRea
dy_En =1 in the
Irq_Last_Trans_
En =1
DMA configuration
register
6
7
8
Irq_Timer_
WakeUp
The timer has completed its
counting phase
The timer is requested to start
a new counting phase (during
the automatic logging mode)
Irq_Sensor_
Threshold
The last ADC output code
crosses the defined threshold
level or window
The chip is requested to read a
new value of the sensor
A RFID field has been
detected, and is strong enough
to start a RFID communication
A RFID reader is accessing
the EEPROM
The RFID field has been
removed, or is too low for a
RFID communication
The user reads the
SPI interrupt & status word
A RFID reader is accessing
the register file
The user reads the
SPI interrupt & status word
Irq_Rfid_
Field
9
Irq_Rfid_EEp
_Access
10
Irq_Rfid_
Reg_
Access
Irq_External
Event
WUT_Irq_En =1
in the Power
management
configuration word.
Sensor_Irq_En
=1
in the Sensor control
word
Irq_Rfid_Field =1
in the SPI Core
control word
Irq_Rfid_EEp_Ac
cess=1 in the SPI
Core control word
12
13
14
Irq_Sensor
Fault
Irq_
LowBattery
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Irq_Rfid_ Reg_
Access =1 in the
SPI Core control word
An event occurs and the event
detector is enabled, using the
appropriate ee-Latch
A failure has been detected on
the currently selected external
sensor
The battery voltage level is too
low (close to the power-on
reset level)
The event detector is disabled
in the appropriate ee-Latch
Always
A new sensor (without failure)
is selected or the failure
disappears
After charging or replacement
of the battery
Sensor_Irq_En=1
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word
LowBattery_Irq_
En=1
Data Sheet
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MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
8.3 Management of communication conflicts
Core Transaction Arbiter
Part of the Digital Controller, the “Core transaction arbiter” deals with several tasks:
• Grant or deny accesses of the communication interfaces to the different memories
• Manage the interrupts
• Update the status of the current operations
Memory access conflicts between SPI, RFID and DMA
The two communication channels, SPI and RFID, and the internal DMA (Direct Memory Access) are able to
access the memories (EEPROM, registers…) or the sensor ADC buffer, at the same time. The potential
access conflicts are managed by the Core transaction arbiter. A DMA transaction may be interrupted by a
RFID or a SPI starting communication. The RFID (resp. SPI) transaction cannot be interrupted by a starting
SPI (resp. RFID) communication, or a DMA operation. In each case, the current transaction is completed.
The priority order is the following:
1. SPI (highest priority)
2. RFID
3. DMA
Management of two subsequent transactions, from the same communication channel:
A transaction initiated via RFID or SPI should be completed before starting a new one. If a request is sent to
the MLX90129 by a SPI master, or by a RFID base-station, and the current transaction is not completed, then
it is dealt differently depending on its nature:
_ the reading of the Core interrupt / status word is allowed at any time and its content is sent in the response.
_ the reading of a memory (a register or an EEPROM word) is denied and an error-message response may
be sent. For the SPI, it contains 0xFFFF. For the RFID, the content of the response is described in the
standard protocol.
_ if the request is not understood, it is not processed, and a flag is set in the Core interrupt / status word .
This flag is reset once it has been read.
The Core interrupt / status word (Internal device #01)
The Core transaction arbiter updates its Core interrupt / status word at each transaction. This status word is
read-only and contains some information about the processing of the incoming request. It indicates:
_ whether the system is busy or not
_ whether the last request has been processed
_ whether the processing of the last request has failed
_ the source(s) of the interrupt, if the interrupt signal on pin IRQ is asserted ‘1’.
One Core interrupt / status word is associated to each communication way (SPI or RFID). Its content is
explained in the chapters dedicated to RFID and to SPI.
The Core Control Word (Internal device #00)
The Core transaction arbiter updates its Core control word at each transaction. This status word is read/write
and contains the settings used to control the interrupt signal IRQ, and the potential interrupts from other
communication channel. One Core control word is associated to each communication way (SPI or RFID). Its
content is explained in the chapters dedicated to RFID and to SPI.
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9 Device Configuration
9.1 Standalone datalogger
9.1.1 Main features
The Datalogger application is managed by the DMA (Direct Memory Access) unit. This block controls the
standalone applications, without any external microcontroller. It handles the start-up operations, and sends
the data from a programmed source towards a programmed destination, using flexible protocol and interrupt
conditions. Typically, it may get the data from the sensor interface and store it in an EEPROM. It works on
defined time periods controlled by a wake-up timer.
Its main features are the following:
• The configuration registers are filled from the EEPROM at the start-up (when enabled)
• The duty-cycle (ratio between active and sleep mode) is controlled by a wake-up timer (WUT) that
wakes the system up after a programmed delay
• Programmed behaviour (source, destination, interrupt options, master-SPI options, …)
• Programmable command-set to address any kind of external SPI memory
• Programmable timings used in the SPI protocol of the external memory (between the request and the
response)
• Calculation of the address of the destination.
9.1.2 DMA operations
Loading of the register file from the EEPROM data.
_ At the power-up of the battery, the DMA automatically loads the Register File with its image from the
EEPROM. A bit stored in the EE-Latch bank, called Disable Automatic Loading, can be set to disable this
automatic loading.
_ At any time, the RFID or the SPI interface can send an Update command to update the content of the
Register File with the values stored in the EEPROM.
_ The configuration may be chosen is such a way that DMA operations starts automatically at power-up.
Data logging in the internal or external EEPROM
_ After power-up, the DMA loads the Register File with the data stored in the EEPROM (it also loads its own
configuration).
_ The wake-up timer (WUT) starts counting to a programmed value. During this counting, the MLX90129
works in a sleep mode, consuming a very low power. To save power, the duty cycle should be as low as
possible.
_ At the end of the counting, the WUT wakes the DMA up.
_ The DMA loads the configuration registers of the selected sensor, and starts a sensor acquisition.
_ The result data is then stored in the EEPROM, at an address calculated from a programmed value.
_ Depending on the options, the DMA may configure and start an acquisition of another sensor, or may let
the system enter the sleep mode. If another sensor is selected, then the DMA loads the new sensor
configuration before starting the acquisition.
At any moment, this process may be interrupted by an external microcontroller, to read the data collection.
For that, it asserts low the bit Processing Control of the DMA configuration register. Then, the process may
be hold or reset. In order to store only the latest data from ADC, the bit Loop enable must be set. In this case,
the old data is rewritten by the DMA unit with the new one when the memory border has been reached. When
the memory is completely filled, a Full Memory interrupt appears on the pad IRQ. It is also possible to send
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an interrupt request (IRQ) to the external microcontroller after each Wake-up timer period. Then, the microcontroller may decide to read the sensor output data and process it.
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Interrupt of DMA process
The microcontroller or the RFID base-station can read the DMA status register and access the DMA
configuration register to start and control the DMA processing. At any time, they can hold the DMA process
and check the current status of the copied data (telling how many words have been copied). Then, they can
change the DMA configuration to a new one or continue the processing. While the DMA is processing data or
is on hold, any change of the parameters in the DMA configuration words does not cause the expected
changes in the behaviour.
End of DMA process
At the end of the sequence, the MLX90129 may enter its sleep mode or its stand-by mode. During the Sleep
mode, the system may be interrupted by a RFID field, or by a SPI “SS=0” event.
9.1.3 Setup of the Automatic Logging Mode
Setup
In order to enable the automatic logging mode, the following sequence must be run:
_ Setup the DMA configuration word
_ Setup the DMA source start address, DMA destination start address and the DMA length.
_ If an external EEPROM is used, setup the SPI-master configuration and command word
_ setup the sensor interface configurations in the EEPROM.
_ Setup the Sensor control word and the Sensor thresholds words (if required)
_ Setup the Wake-up Timer configuration word
_ Setup the logging period in the wake-up timer
_ To enable the DMA operation, the bit Processing Control of the DMA configuration register must be reset.
_ Set the bit Automatic Logging enable in the wake-up timer configuration to ’1’.
All these actions can be performed automatically after the system boot: the required configuration can be set
in the EEPROM. Then, after power-on, the system reads this configuration and performs the programmed
actions. It is not mandatory to store all the data from a sensor at each iteration, but only the data fitting the
conditions defined in the bits Data logging control of the register word called Sensor[x] Control word.
Logging several sensors and time-stamp
When more than one sensor is selected as a source of automatic logging, the DMA stores subsequently all
the sensor output data in the selected memory. The stored data has a prefix to identify them:
Bit
Definition
15:14
Prefix
13:0
ADC output code
The prefix code is defined in the following table:
Prefix code
00
01
10
11
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Related sensor or parameter
Sensor 0
Sensor 1
Sensor 2
Iteration index (Time stamp)
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13.56MHZ SENSOR TAG / DATALOGGER IC
9.1.4 Direct Memory Access configuration
DMA configuration words (EEPROM & Register, address #09 to #0C, read/write)
Bits
Name
#09 – DMA Control word
15:12
DMA_Time_Incl
15
DMA_Sensor2_Incl
14
DMA_Sensor1_Incl
13
DMA_Sensor0_Incl
12
Description (when bit = ‘1’)
10:11
Reserved (must be 00)
9
DMA_LastWordMask
8
DMA_FirstWordMask
7:6
DMA_DestinationCode
5:4
DMA_SourceCode
3
DMA_LoopEn
2
DMA_IrqDataReady_En
1
DMA_Hold
0
DMA_Processing_Control
#0A – DMA: Source start address
DMA_Source_Address
15:0
#0B – DMA: Destination start address
DMA_Destination_Address
15:0
#0C – DMA: Length
DMA_Data_Length
15:0
Sensing sequence
include the iteration index (time stamp) in the memory
include the measurement and the storing of sensor 2
include the measurement and the storing of sensor 1
include the measurement and the storing of sensor 0
Disable the copying of the LSB (byte) of the current word in the
external memory
Disable the copying of the MSB (byte) of the current word in the
external memory
Destination of the data transfer
00 : register file
01 : internal EEPROM*
10 : SPI as master (external EEPROM)
11 : (reserved)
Source of the data transfer
00 : (reserved)
01 : internal EEPROM
10 : (reserved)
11 : Sensor interface
Enable an eternal loop of data logging. In this case, after having
copied Length words, the DMA unit does not stop its operation but
sets its address to the initial one and goes on copying data.
IRQ Data-transfer enabled. The IRQ signal is set when the data
transfer has been completed.
Hold. The DMA holds its operation till it this bit goes low. The
current ongoing DMA transaction is always completed.
Manual processing control.
‘0’: Manual stop of DMA (used for automatic data-logging )
‘1’: Manual start of DMA (not for automatic data-logging)
Address of the first word to be copied from the source device.
Address of the first word to be filled into the destination device.*
Length of the block to be copied (in words).*
* /!\ in case of datalogger application with sensor data logged into the MLX90129 internal EEPROM, care
should be taken to not overwrite the configuration value in EEPROM [from #00 to #28]. For this reason:
• DMA_Destination_Address should be at least 0x29
• DMA_Data_Length should have the maximum value of 0xD5 ( in case of DMA_Destination_Address
is 0x29) in order to not exceed the address 0xFF
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13.56MHZ SENSOR TAG / DATALOGGER IC
DMA status register (Device Address Domain, #05, read only)
Bits Name
#05 - DMA status register
15:0 DMA_Current_Destination
_Address
Description
Address of the block of memory in the destination address domain
(which is still not filled with data from the source device).
9.1.5 Wake-up timer / Power management configuration
The Wake-up timer is used for two purposes:
- to wake-up the microcontroller after a defined delay via the IRQ pin
- to enable and sequence the periodical logging of data from the sensor
- to enter the stand-by mode after a programmed delay
The following table contains the control options of this timer:
Wake-up timer (WUT) / Power management configuration words
(EEPROM & register, addresses #0F and #10, read / write)
Bits
Name
Description (when =1)
#10 – Timer Control word
15:6
-
Reserved (must be 0)
5:4
WUT_Precision
Precision. Defines the time unit for the specified timer wake-up period
(called Count-down period).
00: time in ms
01: time in s
10: time in min
11: time in hours
3
WUT_AutoStandby_En
Automatic stand-by enabled. Allow the MLX90129 to automatically
enter the stand-by mode after the end of the wake-up timer count-down,
or after completion of the automatic logging (if it is enabled).
2
WUT_AutoLog_En
Automatic logging mode enabled. If this bit is set to ‘1’, the wake-up
timer loads its value from the Register file and starts a count-down. As
soon as it reaches 00h, it allows to run one or several sensor
acquisitions and to store the data in the programmed destination. Then,
it loads its count-down period again and starts counting. This process
may be halted by resetting this bit to ‘0’.
1
LowBattery_Irq_En
Low-battery interrupt enabled. Enable interrupts from Low-battery
detector.
0
WUT_Irq_En
Timer IRQ enabled. The timer starts its operation and generates IRQ
signal after passing specified period.
#0F – Timer period
15:0 WUT_CountDownPeriod
Combined with the WUT_Precision, this parameter defines the period
between two measurements. If N is the conversion into decimal value of
the WUT_CountDownPeriod hexadecimal value, the nominal logging
period will be:
WUT_Precision = 00 -> Period = N * 0.9765625 ms
WUT_Precision = 01 -> Period = N * 1 s
WUT_Precision = 10 -> Period = N * 1 min
WUT_Precision = 11 -> Period = N * 1 hour
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9.1.6 Master SPI configuration
A bit of the Device security map is used to set the SPI as master. Then, the MLX90129 controls the clock
SCK, the slave-select SS (output), and the communication I/O MOSI (output) and MOSI (input).
The SPI configuration words are used to setup the parameters of the SPI-master interface, in order to access
an external memory (a serial SPI EEPROM). In master mode, the SPI may be used by the internal DMA unit
(Direct Memory Access) to store the output data of the sensor. The stored data may be read back by a RFID
base-station.
Address
provided to
90129
Adress of
eeprom
"even byte"
Adress of
eeprom
"odd byte"
#00
#01
#02
#00
#02
#04
#01
#03
#05
#n/2
#n
#n+1
Storing a 16-bit word {MS-Byte; LS-Byte} in the external EEPROM:
The RFID reader sends a command to the MLX90129, containing an address #n/2 (in red). Then MLX90129
will send a sequence of commands to the external EEPROM. This sequence is composed of:
_ Optionally a Write Enable command
_ The address #n/2 of the first byte to write (LSByte)
_ The LS-Byte
_ The MS-Byte
Thus, the LS-Byte will be written in the EEPROM address #n, and the MS-Byte in the EEPROM address
#(n+1).
The Master-SPI configuration register must be filled to register #0D to handle the specific protocol of the
external EEPROM.
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Master SPI configuration words (EEPROM & Register, #0D and #0E, read/write)
Bits
Name
Description
#0D – External memory control word
15:8
SPI_WriteEn_Code
Write enabled command code. Command op-code of the “write enable”
operation, used toward an external EEPROM.
7
SPI_BurstMode_En
Burst mode enable: enable the write burst mode used in some SPI serial
EEPROM. (*)
6:4
SPI_WriteDelay
Write delay. Delay which is inserted between a write command and another
subsequent command. Precision is 4 ms. Minimal write delay calculation
equation, when value of this field is non-zero: tWC = 4 x WriteDelay - 1 (ms).
3:2
SPI_WriteEn_Ctrl
Write enable operation control. Defines when the Write Enable command
must be applied:
00 - never
01 - before first write only
10 - before every write operation
11 - reserved
1:0
SPI_AddressMode
Addressing mode. Defines the address length to be passed via SPI for a
proper EEPROM addressing.
00 - 8-bit address is used
01 - 16-bit address is used
10 - 24-bit address is used (8 MSB are filled with 00 or 01)
11 - reserved
#0E – External memory command codes word
15:8
SPI_WriteCode
7:0
SPI_ReadCode
Write command code. Command op-code used by MLX90129 to write in an
external memory block
Read command code. Command op-code used by MLX90129 to read from
an external memory block
(*) Note:
The setting of the bit Burst mode enable switches all subsequent transactions with an external memory into
burst mode. It means, that only the first memory access transaction requires to send a command and an
address. After completion of this first transaction, the master SPI of the MLX90129 does not set the SS signal
to ‘1’. When a new block has to be read / written, the SPI master skips the command and address phases
and immediately sends or receives data to or from the external memory (it allows a page access).
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9.2 Sensor Signal Conditioner
9.2.1 Block description
The sensor signal conditioner amplifies and filters the sensor output signal, before converting it to a digital
format.
These are its main features:
• Two programmable gain amplifiers (PGA1 and PGA2)
• Programmable offset level (DAC)
• 16-bit A/D converter
• Internal temperature sensor
• Two selectable external differential or single-ended sensors
• Voltage regulator, to supply internal and external devices
• Sensor fault detector
• Programmable serial resistor connected to the external sensors
VBAT
VSS
Voltage
regulator
SensSup1
DAC
Sens1
Sens2
Sens3
Sens4
Sensors supplies
&
Serial resistance
network
Internal
temperature
sensor
Input Multiplexor
SensSup2
PGA1
+
PGA2
ADC
Sensor Digital
Controller
Sensor fault
detector
Common configuration for all sensors
Specific configuration for each sensor
Mix between common and specific configuration
Voltage regulator
This block provides the signal conditioner chain and the external sensors with a programmable, stable
voltage for a wide range of sourced currents.
Internal temperature sensor
This block gives a temperature-dependent voltage. As all other sensors, it must be calibrated to give accurate
data.
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Sensor supplies & Resistor network
Many combinations of resistors connections with the external sensors are possible. All the switches figured
on the following schematic are independently programmable via register #1A. The supply VDDA is the
stabilized output of the voltage regulator. The configuration register #19 is used to connect an external sensor
or internal resistance to the inputs of the analogical chain (called MUX OUT1 and MUX OUT2).
Input multiplexer
This block allows selecting the sensor signal which will be connected to the first amplifier of the signal
conditioner. It is possible to select the external sensor(s) connected to SENS1, SENS2, SENS3 and SENS4,
or the internal temperature sensor.
Programmable amplifier 1 (PGA1)
This block is the first programmable amplifier of the analog chain. It has a wide range of gain and is fully
differential. It is compliant with a wide range of input common-mode voltage.
∆PGA1_Out = Gain1 * ∆ PGA1_In
Where:
∆PGA1_Out is the differential output voltage of the Programmable Amplifier 1
Gain1 is the gain of the Programmable Amplifier 1
D/A converter (DAC)
This block is used to compensate the offset of the sensor and of PGA1, amplified by PGA1. It is also used to
choose the value of the physical sensed value, for which the ADC will give its middle code.
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Programmable amplifier 2 (PGA2)
This block amplifies (with a programmable gain) the output voltages of PGA1 and of the DAC, following the
equation:
∆PGA2_Out = Gain2 * [∆ PGA1_Out – ∆DAC_Out ]
Where:
∆PGA1_Out is the differential output voltage of the Programmable Amplifier 1
∆PGA2_Out is the differential output voltage of the Programmable Amplifier 2
∆DAC_Out is the differential output voltage of D/A converter
Gain2 is the gain of the Programmable Amplifier 2
A/D converter (ADC)
This block converts into a digital format the output voltage of PGA2.
Sensor fault detector
A detector may be used to detect a failure in the external sensor. The sensor supply and outputs may be
broken or short-cut.
All the potential failures can be tested by selecting the sensor terminal and comparing it with the appropriate
voltage reference. This can be done by programming the configuration register #14 of the Analog
Configuration Space. The comparison result is stored in the RFID/SPI Core interrupt/status word.
If it is enabled, the detection of a failure causes an interrupt on IRQ. The nature of the failure may be
deduced from the configuration bits that were used when it has been detected.
VDD
3-bit
RefP1
RefP2
RefP1
RefP2
VrefDiv2
VDD
RefN1
RefN2
Sens2
DacOut
COMP
VrefDiv2
RefN1
CmpOut
Sens1
Sens2
Sens4
SensSup1
SensSup2
RefN2
3-bit
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13.56MHZ SENSOR TAG / DATALOGGER IC
Sensor Digital Controller
The main features of the sensor digital controller block are:
•
•
•
•
Initialization of the sensor interface, and running of the A/D conversions
Buffer the ADC output code (in one of the 3 ADC buffers) when conversion has been completed
Digital data processing: mean calculation, comparison with thresholds values
Take the decision to store the data, and/or configure the conditions to generate an interrupt on IRQ.
Before any A/D conversion, the configuration of the sensors must be stored in the register file at addresses
from #12 to #1A. Each sensor has its configuration stored in EEPROM. Depending on the selected sensor,
the appropriate data will be copied from EEPROM to the register file.
The configuration of the selected sensor is automatically loaded from EEPROM when:
• Using commands Read Internal Device #07, Read Internal Device #08, for the first time.
• Using a command Read Internal Device #XX different from the previous one.
The configuration of the selected sensor is not automatically loaded from EEPROM when:
• Using command Read Internal Device #06, for the first time.
• Using the same command Read Internal Device as the previous one.
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13.56MHZ SENSOR TAG / DATALOGGER IC
9.2.2 Sensors common configuration
The following registers manage the sensor power configuration, the sensor fault detector and the trimming of
the internal resistor. This configuration is applicable for all the sensors.
Sensors power configuration words (EEPROM & Register, #12, read / write)
The sensors power configuration register allows disabling unused blocks in order to save power.
Bits
Name
Content
0= not powered (disabled)
1= powered (enabled)
#12 – Sensors power configuration word
Sensor_Pga1_En
0
PGA1 enable bit
Sensor_Pga2_En
1
PGA2 enable bit
Sensor_Dac_En
2
DAC enable bit
Sensor_Adc_En
3
ADC enable bit
Sensor_Reg_En
4
Voltage Regulator enable bit
Sensor_DacBuf_En
5
DAC buffer enable bit
Sensor_Bias_En
6
Bias block enable bit
Sensor_Temp_En
7
Temperature sensor enable bit
Sensor_Sfd_En
8
Sensor fault detector enable bit
Sensor_Ats_Pwr_En
9
Event detector power-on bit
(not used, must be 0)
10
Sensor_Ats_En
11
Event detector enable bit
Sensor_BatMon_En
12
Battery monitor enable bit
ExtSupplyMode
13
0: the regulator always supplies the external device
1: the regulator supplies it only in its watchful state (to save power)
15:14 (not used, must be 0)
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13.56MHZ SENSOR TAG / DATALOGGER IC
Sensors common configuration words (EEPROM & Register, #13 and #14, read / write)
This EEPROM-word is used to trim the value of the programmable serial resistance connected to the sensor.
Serial resistance Rv1 and Rv2 have the same value. It is also used to program the connection between the
external sensor and the sensor fault detector.
Bits
Name
Content
#13 - Reserved
15:0
Reserved
Must be filled with 0x0000
#14 - Sensor trimming and fault-detector configuration word (Common for all sensors)
Sensor_Res_Trim Trimming of the sensor serial resistor:
5:0
Bits[5-0]=0 : the serial resistance is 0.5kΩ
Bit[0]=1 → add 0.5kΩ to the serial resistance
Bit[1]=1 → add 2kΩ to the serial resistance
Bit[2]=1 → add 4kΩ to the serial resistance
Bit[3]=1 → add 8kΩ to the serial resistance
Bit[4]=1 → add 16kΩ to the serial resistance
Bit[5]=1 → add 32kΩ to the serial resistance
9:6
Melexis calibration: do not change this value
Sensor_Fault_Cfg Sensor fault detector: selection bits
15:10
Comparator input “+” is connected to:
Bit[15:13]=000: VSS
Bit[15:13]=001: 0.95*VDD
Bit[15:13]=010: 0.75*VDD
Bit[15:13]=011: 0.5*VDD
Bit[15:13]=100: 0.25*VDD
Bit[15:13]=101: 0.05*VDD
Bit[15:13]=110: SENS2
Bit[15:13]=]=111: DAC output
Comparator input “-“ is connected to:
Bit[12:10]=000: VSS
Bit[12:10]=001: SENS1
Bit[12:10]=010: SENS2
Bit[12:10]=011: not used
Bit[12:10]=100: SENS4
Bit[12:10]=101: SENSSUP1
Bit[12:10]=110: SENSSUP2
Bit[12:10]=111: VSS
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13.56MHZ SENSOR TAG / DATALOGGER IC
9.2.3 Sensor specific configuration
The following registers configure the sensor acquisition chain. This configuration is sensor specific.
Sensor control word (EEPROM & Register, address #15. EEPROM only, addresses #1B, #21)
Bits
Name
Description (when =1)
#15 - Sensor control word
15:14 ADC_Mode
ADC mode
00: higher speed, but lower accuracy
01, 10: intermediate modes
11: lower speed, but higher accuracy
13:12
Sensor0_InitTime
Sensor initialization time
00: 150µs
(= default initialization time for the internal sensor)
01: 2ms
10: 16ms
11: 128ms
11
Sensor0_Irq_En
Fault interrupt enabled. Enable the interrupt from sensor fault detector
10
Sensor0_Irq_Above
9
Sensor0_Irq_Betwn
8
Sensor0_Irq_Below
7
ADC_LowPower
Low power mode. Enable the low power mode of the ADC.
6
5
4
ADC_DataLogAbove
ADC_DataLogBetwn
ADC_DataLogBelow
Data logging control
- store the calculated samples above the high threshold
- store the calculated samples between the high and low thresholds
- store the calculated samples below the low threshold
3:2
1:0
Interrupt conditions control
- generate an interrupt when the last sample is above the programmed
high threshold
- generate an interrupt when the last sample is between the programmed
high and low thresholds
- generate an interrupt when the last calculated sample is below the
programmed low threshold
Reserved (00)
ADC_Proc_Ctrl
#1B - Sensor 1 control word
15:0
Same as above
#21 - Sensor 2 control word
15:0
Same as above
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Samples processing control
Defines the rules for the calculation of the value which will be stored in the
ADC buffer
00 - single sample
01 - average of 2 samples
10 - average of 8 samples
11 - average of 32 samples
Same as above
Same as above
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13.56MHZ SENSOR TAG / DATALOGGER IC
Sensor thresholds (EEPROM & Register, addresses #16 and #17. EEPROM only #1C, #1D and #22, #23)
Bits
Name
Description
#16 - Sensor 0 low threshold
Sensor0_ThresLow
15:0
Sensor 0 low threshold word
#17 - Sensor 0 high threshold
Sensor0_ThresHigh
15:0
Sensor 0 high threshold word
#1C – Sensor 1 low threshold
15:0
Sensor1_ThresLow
Sensor 1 low threshold word
#1D – Sensor 1 high threshold
15:0
Sensor1_ThresHigh
Sensor 1 high threshold word
#22 – Sensor 2 low threshold
15:0
Sensor2_ThresLow
Sensor 2 low threshold word
#23 – Sensor 2 high threshold
15:0
Sensor2_ThresHigh
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Sensor 2 high threshold word
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13.56MHZ SENSOR TAG / DATALOGGER IC
Signal Conditioner words (EEPROM & Register, addresses #18. EEPROM only #1E and #24)
The MLX90129 can handle 2 different external sensors and 1 internal sensor. Each of these sensor output
signals can be conditioned in a different way, using different values of gains and DC levels (offset). The
chopper option can be used to get rid of the internal offset of the programmable amplifiers, but it requires to
use the averaging option of ADC, making the conversion longer (register #15 bit[1:0] ≠ 00).
Bits
Name
Content
#18 - Sensor 0: Signal Conditioner configuration word
Sensor0_DacCode
7:0
DAC code, for Sensor0 (offset or level shifter):
00000000: 0
01111111: Vref/2
10000000: 0
11111111: -Vref/2
Sensor0_Pga1Gain
11:8
Gain of PGA1: 0000: Gain=8
0001: Gain=10
0010: Gain=12.6
0011: Gain=15.5
0100: Gain=19.6
0101: Gain=24.5
0110: Gain=30.8
0111: Gain=38.1
1000: Gain=47.6
1001: Gain=59.4
1010 to 1111: Gain=75
Sensor0_Pga2Gain
14:12
Gain of PGA2: 000: Gain=1
001: Gain=2
010: Gain=3
011: Gain=4
100: Gain=5
101: Gain=6
110: Gain=7
111: Gain=8
Sensor0_Chopper_En
15
Chopper enable 1: enabled
#1E - Sensor 1: Signal Conditioner configuration word
15:0
Same as above
Same as above
#24 - Sensor 2: Signal Conditioner configuration word
15:0
Same as above
Same as above
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13.56MHZ SENSOR TAG / DATALOGGER IC
Sensor connection words (EEPROM & Register, addresses #19. EEPROM only #1F and #25)
The first amplifier (PGA1) of the conditioning chain may be connected to the internal / external sensors in
some different ways. Each sensor has its own connections, programmed in the following EEPROM words:
Bits
Name
Content
#19 - Sensor 0: Connections configuration word
Sensor0_MuxCfg
9:0
Input multiplexer selection bits
(connecting the multiplexer inputs to the first amplifier PGA1)
Bit[0] = 0 → Mux out1= SENS1 (default)
Bit[1] = 1 → Mux out1= SENS3
Bit[2] (not used = 0)
Bit[3] = 1 → Mux out1= VCM (=VDD/2)
Bit[4] = 1 → Mux out1=Temp. sensor output1
Bit[5] = 0 → Mux out2= SENS2 (default)
Bit[6] = 1 → Mux out2= SENS4
Bit[7] = 1 → Mux out2= SENSSUP2
Bit[8] = 1 → Mux out2= VCM
Bit[9] = 1 → Mux out2=Temp. sensor output2
Reserved, Must be 00000
15:10
#1F - Sensor 1: Connections configuration word
Sensor1_MuxCfg
9:0
Same as above
#25 - Sensor 2: Connections configuration word
Sensor2_MuxCfg
9:0
Same as above
Sensor serial resistance conditioner words (EEPROM & Register, addresses #1A. EEPROM only #20
and #26)
Each of the 3 sensors called Sensor0, Sensor1, and Sensor2 can be connected to some serial resistances in
order to reduce their current consumption, or to set their common-mode level.
Bits
Name
Content
#1A - Sensor 0 serial resistance configuration word
Sensor0_Temp_ En
15
Bit[15]=1 -> enables the temperature sensor
Sensor0_Res_Cfg
14:0
Resistance network configuration:
Bit[0] (not used=0)
Bit[1]=1 → SENSSUP2 = VDDA
Bit[2]=1 → SENS3 = VDDA
Bit[3] (not used=0)
Bit[4]=1 → SENSSUP2 = VSS
Bit[5]=1 → SENS4 = VSS
Bit[6]=1 → VCM = VDD/2 (enabled)
Bit[7]=1 → connects programmable resistance 1 to VDD
Bit[8]=1 → connects programmable resistance 2 to VSS
Bit[9] (not used=0)
Bit[10]=1 → connects programmable resistance 1 to SENSSUP2
Bit[11]=1 → connects programmable resistance 1 to SENS3
Bit[12] (not used=0)
Bit[13]=1 → connects programmable resistance 2 to SENSSUP2
Bit[14]=1 → connects programmable resistance 2 to SENS4
#20 - Sensor 1 serial resistance configuration word
15:0
Same as above
Same as above
#26 - Sensor 2 serial resistance configuration word
15:0
Same as above
Same as above
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MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
9.3 Power management
The power management unit controls the following features of the MLX90129:
• Start-up modes (with or without battery)
• Power modes (stand-by, sleep, watchful or run mode)
• Energy scavenging for battery-less applications
• Oscillators management (digital clock, wake-up timer)
9.3.1 Power modes
Power-off mode
No battery, no field. The MLX90129 can quit this
mode when a battery is connected or when a RF
field is applied.
Watchful mode
This mode is the initial state, after power-on. In
this state, the digital part is activated; the
MLX90129 can receive commands from the
RFID or SPI.
Run mode
Depending on the command from SPI or RFID,
or on request from DMA, the MLX90129 enters
the Run mode, where all the blocks implied in
the transaction are powered. This state is not
low-power, but time-limited.
Stand-by mode
In the stand-by mode, the supply voltage is
applied, but the MLX90129 consumes a
minimum current. Typically, this mode is used
after the module has been assembled and tested.
Then, it can be stored for a long time without
wasting the battery energy.
The Digital Controller can not exit this mode by itself. It can only exit it by an external interrupt: emission of a
RFID field or asserting low the Slave Select input of the SPI (during a specified time)
The MLX90129 may re-enter this mode upon request from SPI or RFID (in writing the Wake-up Timer
configuration word). It is possible to enter this mode after a programmed count-down from the Wake-up timer,
or after a logging sequence.
Sleep mode
In the Sleep mode, only the wake-up timer works and sends an IRQ pulse (Interrupt Request) to the
microcontroller after a programmable time period. The MLX90129 may leave this mode in the following
cases:
_ emission of a RFID field
_ asserting low the Slave Select input of the SPI (during a specified time)
_ DMA request to run an acquisition after a defined time period.
In the sleep and the stand-by modes, it is possible to power-down the external device supplied by VREG.
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13.56MHZ SENSOR TAG / DATALOGGER IC
9.3.2 Oscillators management
The MLX90129 contains 3 oscillators:
• A low-power low-frequency RC-oscillator (that may be used as a wake-up timer)
• A low-power low-frequency quartz oscillator (that may also be used as an accurate wake-up timer)
• A 5MHz RC-oscillator for the digital clock
The two RC-oscillators have their frequency adjustable, by programming the EE-Latches bank. The use of
the quartz oscillator is optional. If it is chosen instead of the RC-oscillator, then a 32.768kHz crystal should be
connected between the pads XIN and XOUT.
9.3.3 Energy scavenging
The MLX90129 embeds power supply management capabilities which allow a strong flexibility to design data
logger devices with strong power consumption constraints. It is possible to store the energy from the
incoming magnetic field into an external capacitor, on pad VFIELD or to run from a coin cell battery.
The power management mode is defined by the switches Cmd1 and Cmd2 and is configurable through the
EEPROM and EE-Latch.
• For the battery-less applications, VFIELD pad can be used to supply the MLX90129 if the switch
between VFIELD and VBAT (Cmd1) is closed.
• For battery applications, the switch between VFIELD and VBAT should (Cmd1) be open
• For both kind of application, it is possible to supply the external device via VREG, either at any time,
or only in watchful state (Cmd2)
The commands of these switches are defined as:
Cmd1: Disconnect_Vfield_Vbat = EElatch #03, bit 15
Cmd2: ExtSupply_En = EEPROM #12, bit 13
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13.56MHZ SENSOR TAG / DATALOGGER IC
9.4 Security
9.4.1 Communication security
The Device Security Register is stored in the EEPROM. It contains the access rights to the different
memories by the RFID interface. It allows a partial or complete disabling of the RFID interface. In addition, it
controls the functionality of the SPI by making it master or slave.
Device security map configuration register (EEPROM & Register, address #05, Read/Write)
Bits
Name
Description (when bit = 1)
#05 - Device security map
15:14 Reserved (must be 00)
13
12
Rfid_Page0Read
Rfid_Page0Write
Allow read access to Register file page 0 for RFID.
Allow write access to Register file page 0 for RFID.*
11
Rfid_EEpViaDma
Allows RFID access to internal EEPROM via DMA.
10
Rfid_Adc_Access
Allow access to ADC buffer for RFID
9
8
Rfid_ Int_Read
Rfid_ Int_Write
Allow a read access to the internal memory by RFID
Allow a read & write access to the internal memory by RFID *
7
6
Rfid_EEl_Read
Rfid_EEl_Write
Allow a read access to EE-Latches by RFID
Allow a read & write access to EE-Latches by RFID *
5
4
Rfid_Reg_Read
Rfid_Reg_Write
Allow a read access to the Register file page 1by RFID
Allow a read & write access to the Register file page 1 by RFID *
3
2
1
0
Rfid_Lock_Dis
Disable the RFID Core-lock access function
Rfid_LockUn_En Disable the RFID Lock / Unlock functions (for memory)
Rfid_Dis
Disable the RFID communication media
Spi_Master
SPI slave disable. Disables SPI-slave and enables activity of SPI-master.
note: if the write-access is allowed, the read-access is also allowed, independently of the value of the
read access bit
•
9.4.2 EEPROM Access security
The access to the EEPROM words is protected depending on their content. Four security levels have been
defined and can be chosen for any EEPROM page. If any external device tries to access via SPI a memory
location without permission, it obtains value 0xFFFF as result. Via RFID, the error response is defined by the
standard ISO15693.
•
Definition of the different security levels
Security
level
L0
L1
L2
Code
Write access
Read access
Typical application
00
01
10
SPI, DMA
SPI, DMA
SPI, RFID, DMA
SPI, DMA
SPI, RFID, DMA
SPI, RFID, DMA
UID and security configuration
L3
11
Reserved
Reserved
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Register file initial configuration, data logging
Customer ID, Unlocked User Data
Data Sheet
July. 2009
MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
• EEPROM security access levels
The user data are separated in 8 pages, whose access levels (L0 to L3) are defined thanks to 2 bits, stored in
the ‘Security Map Register’ of the EEPROM.
EEPROM security map
Page
0
1
2
3
4
5
6
7
Address (hex)
0x00 - 0x08
0x09 - 0x26
0x27 - 0x3F
0x40 - 0x5F
0x60 - 0x7F
0x80 - 0x9F
0xA0 - 0xBF
0xC0 - 0xFF
Access level
L0
programmable
programmable
programmable
programmable
programmable
programmable
programmable
Words
9
30
25
32
32
32
32
64
Description
Page 0: Melexis ID and device security
Page 1: Register file initial image
Page 2: User defined data, Customer ID
Page 3: User defined data
Page 4: User defined data
Page 5: User defined data
Page 6: User defined data
Page 7: User defined data
EEPROM security map register (EEPROM, address #04)
Bits (security level)
[15:14]
[13:12]
[11:10]
[ 9 : 8]
[ 7 : 6]
[ 5 : 4]
[ 3 : 2]
[ 1 : 0]
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Description
Access level for EEPROM Page 7
Access level for EEPROM Page 6
Access level for EEPROM Page 5
Access level for EEPROM Page 4
Access level for EEPROM Page 3
Access level for EEPROM Page 2
Access level for EEPROM Page 1
Reserved (must be 0x00)
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MLX90129
13.56MHZ SENSOR TAG / DATALOGGER IC
10 Application Information
1. RFID temperature sensor tag
The MLX90129 may be used as a 13.56
MHz sensor transponder. The LC
antenna is easy to implement and to
tune
thanks
to
the
integrated
programmable capacitance. The internal
sensor
allows
monitoring
the
temperature without external component
2. RFID multi sensors tag
Thanks to the multi sensor interface of
the MLX90129, two differentials sensors
can be added. In this configuration 3
sensors value can be read by RFID
3. Data logger
The MLX90129 may be used in a
standalone way as a data logger. The
data may be stored in the internal
EEPROM or in an external serial SPI
EEPROM. Using the automatic logging
mode, the MLX91029 wakes-up each
programmed time period, converts the
sensor data and stores it in the selected
memory. This process may be hold or
stopped by an external SPI master
(microcontroller,…) or a RFID basestation. The data stored in EEPROM
may be read via RFID.
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4. Micro-controller based applications
Numerous flexible applications using a microcontroller can be imagined. The microcontroller may manage
the MLX90129 to sense, store or send the data via RFID. It may also control a RF transceiver as the
TH7122 and an external non-volatile memory or a LCD.
5. Padlock application
When the event detection system is enabled,
a padlock may be made with a wire connected
between the pins AT and VSS. If this wire is
broken, this event is memorized, and an
interrupt can (optionally) be sent to the
external micro-controller. Instead of the wire, a
light sensor (solar cell) may be connected.
When powered, it sets an IRQ to the
controller.
6. Serial resistor connected to the external
sensor(s)
Numerous connections are possible between
the external sensor and the internal resistors.
The following figure shows an example of
these possibilities.
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11 Reliability Information
Standard information regarding manufacturability of Melexis products with different soldering processes
Our products are classified and qualified regarding soldering technology, solderability and moisture sensitivity
level according to following test methods:
Reflow Soldering SMD’s (Surface Mount Devices)
•
•
IPC/JEDEC J-STD-020
Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices
(classification reflow profiles according to table 5-2)
EIA/JEDEC JESD22-A113
Preconditioning of Nonhermetic Surface Mount Devices Prior to Reliability Testing
(reflow profiles according to table 2)
Wave Soldering SMD’s (Surface Mount Devices) and THD’s (Through Hole Devices)
•
•
EN60749-20
Resistance of plastic- encapsulated SMD’s to combined effect of moisture and soldering heat
EIA/JEDEC JESD22-B106 and EN60749-15
Resistance to soldering temperature for through-hole mounted devices
Iron Soldering THD’s (Through Hole Devices)
•
EN60749-15
Resistance to soldering temperature for through-hole mounted devices
Solderability SMD’s (Surface Mount Devices) and THD’s (Through Hole Devices)
•
EIA/JEDEC JESD22-B102 and EN60749-21
Solderability
For all soldering technologies deviating from above mentioned standard conditions (regarding peak
temperature, temperature gradient, temperature profile etc) additional classification and qualification tests
have to be agreed upon with Melexis.
The application of Wave Soldering for SMD’s is allowed only after consulting Melexis regarding assurance of
adhesive strength between device and board.
Melexis is contributing to global environmental conservation by PROMoting lead free solutions. For more
information on qualifications of RoHS compliant products (RoHS = European directive on the Restriction Of
the use of certain Hazardous Substances) please visit the quality page on our website:
http://www.melexis.com/quality.aspx.
12 ESD Precautions
Electronic semiconductor products are sensitive to Electro Static Discharge (ESD).
Always observe Electro Static Discharge control procedures whenever handling semiconductor products.
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13 Package Information
TSSOP20:
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14 Disclaimer
1) The information included in this documentation is subject to Melexis intellectual and other property rights.
Reproduction of information is permissible only if the information will not be altered and is accompanied
by all associated conditions, limitations and notices.
2) Any use of the documentation without the prior written consent of Melexis other than the one set forth in
clause 1 is an unfair and deceptive business practice. Melexis is not responsible or liable for such altered
documentation.
3) The information furnished by Melexis in this documentation is provided ’as is’. Except as expressly
warranted in any other applicable license agreement, Melexis disclaims all warranties either express,
implied, statutory or otherwise including but not limited to the merchantability, fitness for a particular
purpose, title and non-infringement with regard to the content of this documentation.
4) Notwithstanding the fact that Melexis endeavors to take care of the concept and content of this
documentation, it may include technical or factual inaccuracies or typographical errors. Melexis disclaims
any responsibility in connection herewith.
5) Melexis reserves the right to change the documentation, the specifications and prices at any time and
without notice. Therefore, prior to designing this product into a system, it is necessary to check with
Melexis for current information.
6) Melexis shall not be liable to recipient or any third party for any damages, including but not limited to
personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special
incidental or consequential damages, of any kind, in connection with or arising out of the furnishing,
performance or use of the information in this documentation.
7) The product described in this documentation is intended for use in normal commercial applications.
Applications requiring operation beyond ranges specified in this documentation, unusual environmental
requirements, or high reliability applications, such as military, medical life-support or life-sustaining
equipment are specifically not recommended without additional processing by Melexis for each
application.
8) Any supply of products by Melexis will be governed by the Melexis Terms of Sale, published on
www.melexis.com.
© Melexis NV. All rights reserved.
For the latest version of this document, go to our website at:
www.melexis.com
Or for additional information contact Melexis Direct:
Europe, Africa:
Americas:
Asia:
Phone: +32 1367 0495
E-mail: [email protected]
Phone: +1 603 223 2362
E-mail: [email protected]
Phone: +32 1367 0495
E-mail: [email protected]
3901090129
Rev 004
Page 53 of 53
Preliminary
Data Sheet
July. 2009