ZNBG3118

A Product Line of
Diodes Incorporated
ZNBG3118
LNA GaAs FET BIAS CONTROLLER WITH POLARIZATION AND BAND SELECT
Summary
The ZNBG3118 is a bias and control solution designed for Satellite Low Noise Blocks (LNB’s). Providing three bias stages to
power control and protect the GaAs or HEMT FET low noise amplifier’s (LNA’s). The ZNBG3118 integrates an accurate voltage
detector to select the LNB polarisation channel and an advanced tone detector to select the local oscillator (LO) for band
switching.
Pin Assignments
•
Drain current set by external resistor
G1
LB
•
Regulated negative rail generator requires only 2 external
capacitors
GND
HB
CNB1
Accurate voltage detector and polarisation switch for
LNB’s
VCC
CNB2
LOV
•
Band switch supports both Discrete, MIMIC and PLL
local oscillators
•
Compliant with ASTRA control specifications
•
Low current for power efficient systems
•
Wide operating supply range of 3.3V to 8V
Top View
CSUB
Application
•
Single Output LNB’s
•
Two single type twin LNB’s
•
Low power LNB’s
•
PLL Single LNB’s
VPOL
22kHz tone detection for band switching with rejection of
unwanted signals
FIN
G2
•
RCAL
•
G3
Dynamic FET protection and temperature compensation
D3
Provides bias for up to three GaAs and HEMT FETs
•
D12
•
CSUB
NEW PRODUCT
Features
Bottom View
Single Universal LNB System Diagram
ZNBG3118
Document number: DS32049 Rev. 2 - 2
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ZNBG3118
Device Description
NEW PRODUCT
The ZNBG series of devices are designed to meet the bias
requirements of GaAs and HEMT FETs commonly used in
satellite receiver LNBs with a minimum of external
components.
With the addition of two capacitors and a resistor the devices
provide drain voltage and current control for three external
grounded source FETs, generating the regulated negative
rail required for FET gate biasing whilst operating from a
single supply. This negative bias, at -2.5 volts, can also be
used to supply other external circuits.
The ZNBG3118 includes bias circuits to drive up to three
external FETs. The voltage applied to the VPOL pin
determines which one of first two FETs is operational, the
third FET is permanently active. This feature is normally
used as an LNB polarisation switch to select the required
polarisation. Specific to Universal LNB applications is the
oscillator band select. This is achieved by detecting a 22kHz
tone which enables or disables the relevant local oscillator.
The ZNBG3118 has been designed to control various
oscillators and down converter designs including Discrete
(Bi-polar or MOSFET), MIMIC oscillators and IF amplifier /
down-converters IC’s with logic enabled phase lock loop
(PLL) oscillators.
The ZNBG3118 has been designed to cope with DiSEqC™
ready set top boxes and rejects transients from channel
switching.
ZNBG3118
Document number: DS32049 Rev. 2 - 2
Drain current setting of the ZNBG3118 is user selectable over
the range 0 to 15mA, achieved with addition of a single
resistor. The drain voltage for all the FET’s is set internally to
2 volts. To minimise the pin out and package size FET 1 and
FET 2 share a common drain pin.
These devices are unconditionally stable over the full working
temperature with the FETs in place, subject to the inclusion of
the recommended gate and drain capacitors. These ensure
RF stability and minimal injected noise.
It is possible to use less than the devices full complement of
FET bias controls, unused drain and gate connections can be
left open circuit without affecting operation of the remaining
bias circuits.
To protect the external FETs the circuits have been designed
to ensure that, under any conditions including power up/down
transients, the gate drive from the bias circuits cannot exceed
-3V. Additionally each stage has its own individual current
limiter. Furthermore if the negative rail experiences a fault
condition, such as overload or short circuit, the drain supply to
the FETs will shut down avoiding excessive current flow.
To minimise PCB space ZNBG3118 is packaged in the 16 pin
3mm x 3mm QFN package.
Device operating temperature is -40 to 85°C to suit a wide
range of environmental conditions.
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ZNBG3118
Maximum Ratings
NEW PRODUCT
Parameter
Supply Voltage
Supply Current
Power Dissipation
VPOL Input Voltage
Operating Temperature Range
Storage Temperature Range
Electrical Characteristics
Rating
-0.6 to +12
100
500
25 Continuous
-40 to +85
-40 to +150
Measured at Tamb = 25°C, Vcc = 5V, Rcal = 39k (setting Id to 10mA) unless otherwise specified.
Parameter
Supply Voltage
Operating Range
Supply Current
Substrate Voltage
Conditions
+/-5% Supply tolerance permitted
Id1 = Id2 = Id3 = 0
Id1 = 0, Id2 = Id3 = 10mA, Vpol = 15.5V
Id2 = 0, Id1 = Id3 = 10mA, Vpol = 14V
Id1 = Id2 = Id3 = 0, Ilb = 10mA
Id1 = Id2 = Id3 = 0, Ihb = 10mA
(Internally generated), Isub=0
Isub = -200uA
Gate characteristics
Gate 1 Output
Voltage Off
Voltage Low
Voltage High
Gate 2 Output
Voltage Off
Voltage Low
Voltage High
Gate 3 Output
Voltage Low
Voltage High
Drain characteristics
Drain 12 Output
Voltage High 1
Voltage High 2
Drain 3 Output
Voltage High
Drains 12 and 3
delta Vd vs Vcc
delta Vd vs Tj
D1,2 and 3
Current Range
Current
delta Id vs Vcc
delta Id vs Tj
Min
3.3
Limits
Typ.
Max
8.0
Units
V
-3.0
1.5
22
22
12
12
-2.5
150
270
Vpol = 14.75V (Applied via a 10k resistor)
(Applied via a 10k resistor)
30
14.0
42
14.75
52.5
15.5
100
uA
V
us
Id12 = 0, Vpol = 14V, Ig1 = 0
Id12 = 12mA, Vpol = 15.5V, Ig1 = -10uA
Id12 = 8mA, Vpol = 15.5V, Ig1 = 0
-3.0
-3.0
0.4
-2.5
-2.5
0.75
-2.0
-2.0
1.0
V
V
V
Id12 = 0, Vpol = 15.5V, Ig2 = 0
Id12 = 12mA, Vpol = 14V, Ig2 = -10uA
Id12 = 8mA, Vpol = 14V, Ig2 = 0
-3.0
-3.0
0.4
-2.5
-2.5
0.75
-2.0
-2.0
1.0
V
V
V
Id3 = 12mA, Ig3 = -10uA
Id3 = 8mA, Ig3 = 0
-3.0
0.4
-2.5
0.75
-2.0
1.0
V
V
Id12 = 10mA, Vpol = 15.5V
Id12 = 10mA, Vpol = 14V
1.8
1.8
2.0
2.0
2.2
2.2
V
V
Id3 = 10mA
1.8
2.0
2.2
V
Oscillator Freq.
Vpol Input
Current
V Threshold
Switching Speed
Unit
V
mA
mW
V
°C
°C
Vcc = 3.3 to 8V
Tj = -40 to +85°C
0
8
Vcc = 3.3 to 8V
Tj = -40 to +85°C
Document number: DS32049 Rev. 2 - 2
mA
mA
mA
mA
mA
V
V
kHz
0.5
50
(Set by Rcal)
ZNBG3118
2.5
24
24
14
14
-2.0
-2.0
800
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10
2.5
0.05
%/V
ppm
15
12
mA
mA
%/V
%/°C
February 2010
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ZNBG3118
Electrical Characteristics (Continued)
NEW PRODUCT
Parameter
Measured at Tamb = 25°C, Vcc = 5V, Rcal = 39k (setting Id to 10mA) unless otherwise specified.
Conditions
Output Noise
Drain Voltage
Gate Voltage
Cgate-gnd = 4.7nF, Cdrain-gnd = 10nF
ICgate-gnd = 4.7nF, Cdrain-gnd = 10nF
Tone Detector
Threshold
22kHz sq.wave, trise = tfall = 10us
Noise Rejection
LO Output Stage
Lov Voltage Rng.
Lov Bias Cur.
I_LB/HB Max
I_LB/HB Max
Min
Limits
Typ.
Units
Max
0.02
0.005
100
150
Square wave signal, 1Vpk-pk
1.0
5.0
Note 1
Vlov = 0
Vlov = -0.5V to Vcc – 1.0V
Vlov = Vcc – 1.0V to Vcc
-0.5
0
0.25
Vpk-pk
Vpk-pk
mV
pk-pk
kHz
300
Vcc
1.0
35
V
uA
mA
uA
100
LB Vout Low
LB Vout High
HB Vout Low
HB Vout High
Vlov = 0, Il = 0, Rlb-csub = 1MΩ, Tone enabled
Vlov = 0, Il = 10mA, Tone disabled
Vlov = 0, Il = 0, Rhb-csub = 1MΩ, Tone disabled
Vlov = 0, Il = 10mA, Tone enabled
-3.0
-0.025
-3.0
-0.025
-2.5
0
-2.5
0
-2.0
0.025
-2.0
0.025
V
V
V
V
LB Vout Low
LB Vout High
HB Vout Low
HB Vout High
Vlov = 4.0, Il = 0, Rlb-gnd = 1MΩ, Tone enabled
Vlov = 4.0, Il = 35mA, Tone disabled
Vlov = 4.0, Il = 0, Rhb-gnd = 1MΩ, Tone disabled
Vlov = 4.0, Il = 35mA, Tone enabled
-0.1
3.9
-0.1
3.9
0
4.0
0
4.0
0.1
4.1
0.1
4.1
V
V
V
V
LB Vout Low
LB Vout High
HB Vout Low
HB Vout High
Vlov = Vcc, Il = 0, Rlb-gnd = 1MΩ, Tone enabled
Vlov = Vcc, Il = 100uA, Tone disabled
Vlov = Vcc, Il = 0, Rhb-gnd = 1MΩ, Tone disabled
Vlov = Vcc, Il = 100uA, Tone enabled
-0.1
Vcc-0.1
-0.1
Vcc-0.1
0
Vcc
0
Vcc
0.1
Vcc+0.1
0.1
Vcc+0.1
V
V
V
V
Notes:
1. V_Lov – V_LB or V_HB should not be allowed to exceed 6.0V. Care should be taken concerning the Off-state voltages of outputs LB and HB if V_Lov is
set to greater than 6.0V. Similarly, Vcc – V_LB or V_HB should not be allowed to exceed 8.5V.
2. ESD sensitive, handling precautions are recommended.
ZNBG3118
Document number: DS32049 Rev. 2 - 2
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ZNBG3118
Typical Characteristics
(Measured at TAMB = 25°C, VCC = 5V, RCAL = 39k (setting ID to 10mA) unless otherwise stated)
2.5
16
2.4
14
NEW PRODUCT
Drain Voltage (V)
Drain Current (mA)
2.3
12
10
8
6
4
2.2
2.1
2
1.9
1.8
1.7
2
1.6
1.5
0
0
20
40
60
80
100
120
140
160
180
200
0
2
4
6
8
10
12
14
16
Drain Current (mA)
RCAL Value (kΩ )
Drain Current vs RCAL Value
Drain Voltage vs Drain Current
Single Universal Block Diagram
Figure 1 shows the main elements of a typical single universal LNB. The ZNBG3118 is compliant with virtually all markets including
the fleet of Astra satellites. The simple but flexible solution provides the negative rail, FET bias control, polarisation switch control,
tone detection and band switching with the minimum of external components. The ZNBG3118 can be also used in other DBS
applications such a twin output, mono-block and Low power LNB’s.
Figure 1 Typical single universal LNB system diagram
Polarization and band switching on the ZNBG3118 uses the standard 13V-17V and 22kHz as defined by Astra. The exception is
that the devices voltage detector has a much tighter tolerance than defined to increase field reliability. The tone detector has been
designed to cope with distorted 22kHz tones so reliability is maintained with regional differences and variations on set-top box
designs.
Tone detection and band switching has been designed to meet various different system architectures. The following diagrams
(figures 2 to 4) show how this feature operates in an LNB and the external components required. The presence or absence of a
22kHz tone applied to pin FIN enables one of two outputs, LB and HB. A tone present enables HB and tone absent enables LB.
The LB and HB outputs are designed to be compatible with MMIC, Discrete (bipolar or FET) and PLL based local oscillator
applications and are easily configured by the LOV pin.
Bi-polar or FET local oscillators
Referring to Figure 2 wiring pin LOV to a positive voltage source (e.g. a potential divider across VCC and ground set to the required
oscillator supply voltage, VOSC) will force the LB and HB outputs to provide the required oscillator supply. VOSC when enabled and
0V when disabled. Driving loads of up to 35mA, the maximum allowed programmed output voltage of LB and HB is VCC -1V. If a
greater supply voltage is required for the oscillators then it may be possible to use an oscillator circuit.
ZNBG3118
Document number: DS32049 Rev. 2 - 2
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ZNBG3118
MIMIC local oscillators
Referring to Figure 3 wiring pin LOV to ground will force LB and HB to switch between -2.5V (disabled) and 0V (enabled). Note
that Vcc(max) should not exceed 6.0V when using this configuration.
Logic enabled PLL local oscillators
Referring to Figure 4 connecting the LOV pin to Vcc will pull the LB and HB to VCC when enabled and 0V when disabled. Using the
same supply voltage for the ZNBG3118 and the PLL local oscillator block, the LB and HB outputs will provide a suitable logic signal
of up to 100uA to drive the LO select pin of a PLL system.
D3
G3
D12
NEW PRODUCT
G2
Local Oscillator Configurations
G1
RLB1
LB
ZNBG3118
Gnd
RHB1
HB
Cnb1
Vcc
Cnb2
Lov
RLB2
Q2
CHB
Vpol
Fin
Rcal
Csub
CSUB 47nF
CLB
RHB2
RLV1
CNB 47nF
Q1
RLV2
RCAL 39k
9.75GHz Local Osc.
CFIN
330pF
10.6GHz Local Osc.
Vcc
RPOL
10k
LNB Downf eed
Vcc
D3
G3
D12
G2
Figure 2 Applications circuit for the ZNBG3118 using Bi-polar oscillators
G1
LB
ZNBG3118
Gnd
RLB1
Cnb1
Vcc
Cnb2
Lov
G1
RHB1
HB
Local
Osc.
MMIC
G2
RHB2
240k
Vpol
Fin
CSUB 47nF
Rcal
Csub
CNB 47nF
RLB2
240k
CLB
CHB
RCAL 39k
CFIN
330pF
RPOL
10k
LNB Downf eed
Figure 3 Applications circuit for the ZNBG3118 using MIMIC local oscillators
ZNBG3118
Document number: DS32049 Rev. 2 - 2
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Vcc
D3
G3
D12
G2
ZNBG3118
G1
LB
ZNBG3118
Gnd
HB
HB
Cnb1
Vcc
Cnb2
Lov
CNB 47nF
Vpol
Fin
Rcal
Csub
RHB
CSUB 47nF
NEW PRODUCT
Local
Osc.
PLL
RCAL 39k
CFIN
330pF
RPOL
10k
LNB Downf eed
Figure 4 Applications circuit for the ZNBG3118 using logic controlled PLL local oscillators at 3.3V
Functional Tables
ZNBG3118 System Function
Inputs
Vin (V)
<14.0
>15.5
<14.0
>15.5
Fin (kHz)
0
0
22
22
FET 1
Disabled
Active
Disabled
Active
Outputs
FET 3
Active
Active
Active
Active
FET 2
Active
Disabled
Active
Disabled
LB(1)
Active
Active
Disabled
Disabled
HB(1)
Disabled
Disabled
Active
Active
Note 1: See LO description above and the table below for explanation of Active and Disabled.
Tone Detection Function
Lov
Gnd
Vosc
Vcc
Fin (kHz)
0
22
0
22
0
22
LB
HB
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
LB
Gnd
-2.5V
Vosc
Note (2)
Vcc – 0.1V
Note (2)
HB
-2.5V
Gnd
Note (2)
Vosc
Note (2)
Vcc – 0.1V
Note 2: 0 Volts in a typical LNB application but dependant on the external circuits
ZNBG3118
Document number: DS32049 Rev. 2 - 2
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ZNBG3118
Applications Information
* L1
* L3
C2
10nF
* C1
J1
J3
* L2
G1
RLB1
LB
ZNBG3118
Gnd
RHB1
HB
Cnb1
Vcc
Cnb2
Lov
RLB2
* Stripline Elements
RLV1
CLB
RHB2
Q5
CHB
Vpol
Fin
Rcal
CNB 47nF
CSUB 47nF
* C10
D3
C9
10nF
G3
C4
10nF
* C3
G2
* C5
* L4
Csub
NEW PRODUCT
C6
10nF
* C8
J2
D12
* L3
C7
10nF
RLV2
Q4
RCAL 39k
9.75GHz Local Osc.
CFIN
330pF
10.6GHz Local Osc.
RPOL
10k
Vcc
LNB Downf eed
Figure 5 Applications circuit for the ZNBG3118 using Bi-polar local oscillators
Figure 5 is a typical applications circuit for the ZNBG3118, showing all the external components required for appropriate biasing.
The bias circuits are unconditionally stable over the full temperature range with the associated FETs and gate and drain
capacitors in circuit. Capacitors C2, C4, C6, C7 and C9 ensure that residual power supply and substrate generator noise is not
allowed to affect external circuits which may be sensitive to interference. They also serve to suppress any potential RF feed
through between stages via the ZNBG3118. These capacitors are required for all stages used. Values around 10nF are
recommended however this is design dependent and any value between 1nF and 100nF could be used. The capacitor CSUB is an
integral part of the ZNBG3118 negative supply generator. The negative bias voltage is generated on-chip using an internal
oscillator. The required value of capacitor CSUB is 47nF. This generator produces a low current supply of approximately -2.5V.
Although this generator is intended purely to bias the external FETs, it can be used to power other external low current circuits via
the CSUB pin. Note that the exposed pad of the package must be either left floating or connected to Csub.
Resistor RCAL sets the drain current at which all external amplifier FETs are operated. To minimize the pin-count and package size
Drain 1 (D1) and Drain 2 (D2) share a common pin. If any bias control circuit is not required, its related drain and gate connections
may be left open circuit without affecting the operation of the remaining bias circuits.
The ZNBG3118 has been designed to protect the external FETs from adverse operating conditions. With a JFET connected to
any bias circuit, the gate output voltage of the bias circuit can not exceed the range -3V under any conditions, including power up
and power down transients. Should the negative bias generator be shorted or overloaded so that the drain current of the external
FETs can no longer be controlled, the drain supply to FETs is shut down to avoid damage to the FETs by excessive drain current.
ZNBG3118
Document number: DS32049 Rev. 2 - 2
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ZNBG3118
Package Outline Dimensions
E
A1
QFN16 3x3
Dim
Min
Max
A
0.55
0.65
A1
0.00
0.05
A3
0.15 Typ
b
0.18
0.28
D
2.95
3.05
D2
1.40
1.60
e
0.50 BSC
E
2.95
3.05
E2
1.40
1.60
L
0.35
0.45
Z
0.625 Typ
All Dimensions in mm
D
A3
E2
Pin #1 ID
NEW PRODUCT
A
L
D2
e
b
Z
Note: Controlling dimensions are in millimetres. Approximate dimensions are provided in inches.
The package appearance may vary as shown, for further details please contact your local Diodes sales office.
Ordering Information
(Note x)
Device
Package
ZNBG3118JA16TC
QFN1633
Reel Size
(inches)
13
Tape Width
(mm)
8
Quantity
(per reel)
3000
Marking Information
Pin 1
ZNBG
3118
YYWW
ZNBG3118
Document number: DS32049 Rev. 2 - 2
Part Name
Date Code
Year/Week
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ZNBG3118
IMPORTANT NOTICE
NEW PRODUCT
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ZNBG3118
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