TM January 2012 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Provide overview and highlight the new features introduced with the QorIQ P1010 family of processors • Provide the detail and guidance on migrating designs from PowerQUICC II Pro to the QorIQ P1010 family TM 2 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Introduction to P1010 QorIQ Platforms • Challenges of Migration • Device Features • Hardware Design Guide • Software Design Guide − Code migration − Migration • to dual core Application Study TM 3 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Designed to enable the development of the next era of networking applications by delivering: − Improved processing performance—high-performance Power Architecture® based multicore solutions − Power efficiency—45 nm process technology for industryleading power-to-performance solution − Programmability—programming tools, ecosystem partners, common software and pin-compatible processors Note that the P1010/P1014 family of products is not pincompatible with the rest of the P1 or P2 family TM 4 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. 4 PowerQUICC II Pro to QorIQ Evolution e500 @800 MHz-1200 MHz Dual Core / Single Core 512 KB L2 Cache, 3 x GigE (SGMII), 2x PCI-Exp, 2x SRIO, 2 x USB, DDR2/3, SD Flash, Security, 8W @ DC 1200 MHz P2020E Legend 45nm P2010E Performance & Power 90nm 130nm MPC8378E P1020E MPC8379E MPC8377E MPC8349E 400-800 MHz 2 x GigE (SGMII) PCI , PCI-Exp USB, DDR1/2, Security, SATA <5.0W @ 667 MHz MPC8347E MPC8343E 266-667 MHz 2 x GigE 2 x PCI USB, DDR1/2, Security <5.0W @ 667 MHz 2006 Proposal P1011E e500 @533 MHz-800 MHz Single/Dual Core P1010/P1014E e500 @533 MHz-800 MHz Single Core Trust, CAN, IFC, <3W MPC8315E MPC8314E MPC8313E 400 MHz 2 x GigE (SGMII) PCI, PCI-Exp USB, DDR1/2, Security <2.0W @ 400 MHz 333 MHz 2 x GigE (SGMII) PCI, USB, DDR1/2, Security <2.0W @ 333 MHz 2007 Planning 2008 Execution TM P1022E / 13E 2009 2010 e500 @400 MHz-1 GHz Dual Core / Single Core 256 KB L2 Cache, GigE (SGMII), PCI-Exp, SATA 2011Core 1 GHz Typical 3.0W for Dual Production 5 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. P1010 Block Diagram • e500v2 533 MHz up to 800 MHz • Power consumption less than 3.0 W at 800 MHz core speed • 45-nm SOI process technology • Data rate of up to 800 Mbps/pin for DDR3 and DDR3L • Supply voltage 1.0V • Operating temperature (Ta–Tj) range: 0–125°C and –40 to 125°C (industrial specification) • 19 × 19 mm 425-pin TEPBGA I (temperatureenhanced plastic BGA) TM 6 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • New IPs/blocks − Integrated Flash Controller (IFC)—replacing the eLBC − Integrated USB PHY—first in 45nm devices − Secure boot—first in the P1 series − DDR3L—first in Freescale devices − FlexCAN—first − Sec in NMG devices 4.x—first in P1 series TM 9 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. TM Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Completion Unit L1: 32 KB, 8-way set associative, parity • Cache line locking supported • MESI cache coherence • Peak IPC 2 instructions plus 1 branch • Out of order execution • Multiple book E APUs • 16 TLB variable page sizes • 512-entry 4K pages • 36-bit physical address Branch Processing Unit Dispatch Unit L2: Front side, 8-way set associative, ECC Memory Unit Sequencer Fetcher Instruction Queue (12) L1 Instruction MMU I-TLBs Tags • Instruction Unit 32KB Instruction Cache Tags • Up to 1.2 GHz (800 MHz in P1010) MAS • 32KB Data Cache L2 Unified MMUs L1 Data MMU DTLBs GPR Issue (2) GPRs CFX SFX1 SFX2 LSU Rename Buffers Core Complex Bus 36-bit Address Bus 128-bit Rd/Wr Data Bus TM 11 Book E APUs: Performance Monitor, SPE, DPFP Isel, BTB, Cache Line Locking, Machine Check Shared 512 kB Unified Front Side L2 Cache Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Shared 256 KB / 512 KB unified front side L2 cache w/8-way associativity (each way: 64 KB) • −L2 e500 Core 1 e500 Core 0 is 256 KB in the P1010/P1014 e500v2 Core32KB Stash Only • Assignment granularity −One, two, four or all eight “ways” of the cache can be assigned as the following: −SRAM −Stash only −CPU0 L2 only −CPU1 L2 only −Both CPU0 and CPU1 L2 32 KB I-cache w/Parity CPU0 & 1 L2 CPU1 L2 D-cache 32 KB w/Parity D-cache w/Parity Core RD1Complex RD2 WRBus RD_IN DOUT WR_IN RD1 RD2 WR 64 • Stash-only regions can now be defined −Prevents 128 stash data from polluting processor data and vice versa −One, two or four “ways” of the cache can be dedicated as stash only • 128 Stash allocate disable mode added −Allows update of all resident cache lines without allocation of new lines TM 12 Example Coherency Module Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • DDR memory controller − DDR3 with support for a 32-/16-bit data interface (32-bit without ECC and 16-bit with ECC), up to 800 Mbps data rate DDR3 memory controller −4 chip selects All 4 chip selects can be used if interfaced with dual/quad stacked memories Only 2 chip selects can be used if interfaced with memories supporting single chip-select − Four layer boards can be designed with discrete DDR memories For DIMMs six layer boards are recommended TM 13 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • DDR 3—new feature − Lower power performance – ~25% compared to DDR2 ( Source - JEDEC) − Supply voltage reduced from 1.8V to 1.5V − Support for “fly by” routing • Results in fewer stubs and improved signal integrity for faster clock speeds − Introduced additional registers for write-levelling control for DDR3 − Asynchronous reset pin for cold or warm reset of memories − Separate voltage reference pins for address and data signals for noise reduction − Improved pin-out for signal integrity and reduced skew − Dynamic ODT for also aids signal integrity DDR clocking—ability to asynchronously clock from platform clock supported for higher speed memory devices TM 14 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. •eTSEC MAC controllers support 10 Mbps, 100 Mbps, 1 Gbps Ethernet /IEEE 802.3 interfaces −Similar in specification to MPC831x & MPC837x devices •Backwards •Support compatible with TSEC controllers used on MPC834x following PHY interfaces −RGMII −SGMII interfaces •Advanced share available SerDes lanes functions part of enhanced controller: −TCP/IP acceleration −QOS support for up to 8 queues −MAC address recognitions −CRC generation & checking −Extraction and allocation of data to L2 −Remote monitoring statistics support •IEEE® cache 1588 timer support •Interrupt virtualisation added to P1 devices −eTSEC controllers and interrupts can be grouped, to be assigned to a particular core by software −Further available information in software section TM 15 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • • RSA and Diffie-Hellman (to 4096b) − Elliptic curve cryptography (1023b) − Supports run-time equalization Data encryption standard accelerators (DESA) − DES, 3DES (2K, 3K) − ECB, CBC, OFB modes ARC four hardware accelerators (AFHA) − • • • Advanced encryption standard accelerators (AESA) Compatible with RC4 algorithm Kasumi/F8 hardware accelerators (KFHA) − F8 , F9 as required for 3GPP − A5/3 for GSM and EDGE − GEA-3 for GPRS Snow 3G hardware accelerators (STHA) − Implements Snow 3.0 CRC unit − Key lengths of 128-, 192- and 256-bit • Random number generator, random IV generation − ECB, CBC, CTR, CCM, GCM, CMAC • Header & trailer off load for the following security protocols: − OFB, CFB and XTS Message digest hardware accelerators (MDHA) − SHA-1, SHA-2 256,384,512-bit digests − MD5 128-bit digest − HMAC with all algorithms TM • Job Queue Controller Descriptor Controller CRC32, CRC32C, 802.16e OFDMA CRC − − Job Ring I/F RTIC • − • DMA • Public key hardware accelerators (PKHA) CHAs IPSec, 802.1ae, SSL/TLS, SRTP, 802.11i, 802.16e 1-2 Gbps 16 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Dual SATA 3 Gbps controllers with integrated PHY − SATA controllers supports SATA 2.0 − Supports TM 1.5 Gbps and 3 Gbps data rates 17 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • PCI Express controller − Two PEX controller/interfaces compliant with “PCI Express Base Specification Revision 1.1” − Each supports only by x1 interface − MAX_PAYLOAD_SIZE has been reduced from 256 bytes to 128 bytes (every other 85xx and QorIQ devices have 256) − Few changes in the P1010 programming model to support secure trust architecture − Inbound TM window 0 is now programmable 18 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Pin multiplexing is available between following interfaces: − IFC/eSDHC/ULPI Address-only lines of IFC are multiplexed NAND interface signals are not multiplexed LCLK0 is muxed with CS3 − CAN/UART/TDM UART0 is non-muxed − TSEC1 • (RGMII)/1588 Doesn’t disable 1588 Pin multiplexing can be configured through PMUXCR1/2 registers TM 19 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Integrated flash controller (replacement for eLBC) − Flash controller with four chip-selects − AXI V1.0 slave interface − Sky blue bus interface for register access − Support for error and debug registers − Functional muxing of pins between NAND (512 to 4K Bytes Page, NOR and GPCM) − Support memory banks of size 64 KByte to 4 Gbytes − Write protection capability − Provision of software reset TM 20 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • SerDes I/O port multiplexing (through POR configs) TM 21 Not in P1014 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Memory card interface available on QorIQ platforms − • • Similar in specification to the eSDHC on MPC837x Provides high-speed, flexible data storage capability to a system Embedded Embedded DMA DMA System System Interface Interface Register Register Bank Bank Status Status Register Register&& Interrupt Interrupt Controller Controller Designed to work with various SD & MMC card formats − SD, SDHC, miniSD, SD combo, MMC, MMCplus & RS-MMC cards • Supports capacities of up to 32 GB, with different speeds • Boot interface support—new feature − Logic Logic CMD CMD Control Control Channel Channel State State Machine Machine CRC CRC Controller Controller &&Buffer Buffer RAM RAM Logic Logic Data Data Control Control Channel Channel State State Machine Machine CRC CRC SD SDBus Bus Monitor Monitor&& Gating Gating CMD CMD/ CMD/ Data Data Channel Channel TX/RX TX/RX Handler Handler DAT4 DAT3 DAT2 DAT1 eSDHC eSDHC Controller Controller Clock Clock Controller Controller&& Reset Reset Manager Manager DAT0 SD_CLK SD_CD SD_WP Revision 1.0 of the P1010 has an errata that prevents boot from SD. Although a work around exists there are no plans to revise the device and fix the errata TM 22 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • USB 2.0 host and device controller with an on-chip, high-speed PHY − Supports ULPI and UTMI − Provides four wire USB bus interface (internal PHY, UTMI mode) − PHY supply needs to follow power sequencing and ramp rate constraints (refer to H/W spec for more info) TM 23 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. TM Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Power sequencing is different from PowerQUICC II Pro • P1 devices requires power rails to be applied in a specific sequence in order to ensure proper device operation. These requirements are as follows for power-up: • − VDD, AVDD_n, BVDD, LVDD, OVDD,CVDD, XVDD_SRDS and XVDD_SRDS − GVDD − NOTE: Items on the same line have no ordering requirement with respect to one another − NOTE: If any of the I/O power supplies ramp prior to VDD core supplies, the associated I/O supply may drive a logic one or zero during power-up thus causing excessive current to be drawn by the device. All supplies must be at their stable values within 50 milliseconds TM 25 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Provide independent filter circuit to each of the AVDD pins − AVDD_PLAT, AVDD_CORE[0:1], AVDD_DDR, and AVDD_LBIU, respectively − Independent circuits reduces chance of noise injection between PLLs R VDD AVDD C2 C1 R = 5 W ± 5% C1 = 10mF ± 10%, 0603, X5R, with ESL <= 0.5 nH C2 = 1.0 mF ± 10%, 0402, X5R, with ESL <= 0.5 nH Low ESL surface mount capacitors GND − Circuit will filter noise in 500 KHz to 10 MHz range − Use surface mount capacitors with a low effective series inductance (ESL) − Place as close to AVDD as possible to reduce noise • See HW guide for filter specs TM 26 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. •There are three different supplies used for SerDes block, consistent with PowerQUICC devices: −SVDD: Core power supply for SerDes transceivers −XVDD: Pad power supply for SerDes transceivers −AVDD_SRDS: SerDes PLL supply • Need clean, tightly regulated power supply with low jitter • Additional SerDes supply decoupling requirements −See HW manual for details •Design guidelines consistent with “High Speed Digital Design: A Handbook of Black Magic” •Unused SERDES lanes −Leave outputs unconnected with inputs connected to GND TM 27 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • P1/P2 platforms have power on reset (POR) signals used for device configuration − • The settings for the following POR pins will determine CPU boot enable, PLL ratios and boot device selection: − − LA[29:31] - cfg_sys_pll[0:2] LBCTL, LALE, LGPL2 - cfg_core0_pll[0:2] LWE0, UART_SOUT1, READY_P1 - cfg_core1_pll[0:2] TSEC1_TXD[6:4],TSEC1_TX_ER - cfg_rom_loc[0:3] LA[27] - cfg_cpu0_boot LA[16] - cfg_cpu1_boot − LGPL3, LGPL5 - cfg_boot_seq[0:1] − − − − • Further configuration signals may be used in the future to control functionality. It is advised that boards are built with the ability to pull up or pull down these pins. − − − − − − − − • Signals are muxed with existing I/O pins LA[20] - cfg_eng_use[00] LA[21] - cfg_eng_use[01] LA[22] -cfg_eng_use[02] UART_SOUT[00]- cfg_eng_use[03] TRIG_OUT -cfg_eng_use[04] MSRCID[01] -cfg_eng_use[05] MSRCID[04]- cfg_eng_use[06] DMA1_DDONE[00]- cfg_eng_use[07] POR signals are sampled on HRESET negation TM 28 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. POR Configuration Pins Termination Requirements • The following pins must NOT be pulled down during power-on reset, otherwise it may trigger the internal test mode: − DMA1_DACK[00] − USB1_STP − HRESET_REQ − MSRCID[2:3] − MDVAL − ASLEEP TM 29 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • DDR3 guidelines available from AN108 − “Designing for DDR3 Memory on Freescale Microprocessors” • DDRCLK input − Input is only required when the DDR controller is running in asynchronous mode − Not required if DDR controller is selected to work in synchronous mode, via POR setting cfg_ddr_pll[0:2]=111 − It is recommended to tie it off to GND when DDR controller is running in synchronous mode − DDR3 is only supported in asynchronous mode TM 30 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. eTSEC Pin Termination • • Addition termination requirements for eTSECs compared to PowerQUICC II Pro − When eTSEC1 and eTSEC2 are used as parallel interfaces, pins TSEC1_TX_EN and TSEC2_TX_EN requires an external 4.7-kΩ pulldown resistor to prevent PHY from seeing a valid transmit enable before it is actively driven − TSEC2_TXD[01] is used as cfg_dram_type. It must be valid at powerup, even before HRESET assertion Unused eTSEC pin termination For I/Os, tie signals high or low through a resistor; recommended resistor values are 2–10K ohm For inputs, tie signals to their inactive state through a resistor; clock inputs may be tied high or low; recommended resistor values are 2–10 K ohm TM 31 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Following applies for both PowerQUICC II Pro and QorIQ devices: • For prototype board, suggest isolating power supplies and have independent controls over: − − − − − − − − • The voltage range should be adjustable − − • VDD, AVDDs ( Core and PLLs) SVDD (SerDes core) XVDD (SerDes pad) OVDD (DUART, I2C, JTAG etc...) LVDD (eTSECs) GVDD (DDR) BVDD (local bus) CVDD (USB, eSPI, eSDHC) Particularly for VDD, AVDDs, SVDD and XVDD, they should be adjustable at least between 1.0V to 1.1 V nominal; also allows for easier migration between device families Have test points near processor for these supplies Have visibility of all processor BGA pins on the back of card TM 32 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • QorIQ P1 / P2 devices have specific debug assist pins − − − • General list of signals to have accessible for analysis on all devices − − − − − − • DDR3—address, data, control & clock signals Local bus—address, data, control & clock signals Machine check & interrupt signals SerDes—transmission lanes & reference clock signals HRESET# / HRESET_B SD_PLL_TPA, & SD_PLL_TPD (SerDes analog and digital PLL lock indication) Debug signals specific to the MPC831x/MPC837x − − − • TRIG_OUT/READY (this helps to verify the end of the reset sequence) TRIG_IN (trigger in to trigger the watchpoint and trace buffers) MSRCID [0:4] & MDVAL—memory debug signals CFG_RESET[0:3] source signals SRESET_B PORESET_B Debug signals specific to the P1 / P2 platforms − − − − − − − HRESET_REQ (this helps to verify proper boot sequencer functions and reset requests) ASLEEP (this helps to verify the end of the reset sequence) SYSCLK (to verify input clock at the device pin) CLK_OUT (this helps to verify the CCB clock) DDRCLK (to verify DDR Clk when in asynchronous mode) CKSTP_OUT[0:1] (e500 checkstop indication) Debug assist pins TM 33 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. TM Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • QorIQ P1 / P2 devices use power-on reset (POR) configuration pins, which are sampled during the assertion of HRESET_B • All POR configuration pins are typically multiplexed with the output signals • All POR configuration pins have internal pull-up resistor (~20 KΩ) and those resistors are activated only during the POR configuration • During HRESET, all other signal drivers connected to these POR configuration signals must be in the high-impedance state − Reason: If other devices also drive POR pin during HRESET, device may sample the wrong POR configuration information from the POR pin TM 35 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • • Power-on reset sequence is significantly different to PowerQUICC II Pro family − HRESET# —now input only and replaces PORESET# input − HRESET_REQ# —output, used to request reset − SRESET# —input only − READY_P0 / TRIG_OUT —Core 0 ready output / external trigger output − READY_P1 —Core 1 ready output (if available) Signals no longer available − CFG_RESET_SOURCE[0:3] —used to load configuration words; function replaced by POR configuration pins − CFG_CLKIN_DIV# —clock division selection is carried out by POR PLL config pins TM 36 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Stable SYSCLK Signal Stable PLL Configuration Input POR Configuration Input TM 37 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Supports DDR asynchronous mode through separate DDR PLL • No separate clock input required for async mode TM 38 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Possible boot interfaces − IFC (NOR, NAND, MLC, SLC) − DDR3/3L memory controller − PCI Express interface − eSPI interface − eSDHC interface (errata on P1010 prevents boot on SD) • Boot sequencer—migrated from PowerQUICC II Pro • Boot hold-off—registers used to suspend core booting • New boot interfaces supported on P1 − Used when booting two cores; CPU0 boots while CPU1 waits − Used when external master boots device over eg. RapidIO or PCIe Reset - e500 begins execution from fixed location of 0xFFFF_FFFC TM 39 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. TM Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • e500v2 based QorIQ devices deploy a 36-bit local address space • Local Access Windows (LAWs) • • − Support multiple access windows like e300 devices − Maximum window size increased from 2 GBytes to 32 GBytes ATMU—Address Translation & Mapping Unit − Used for translating between local & external address spaces − Further ATMUs added on QorIQ platforms for additional PCIe controllers & SRIO CCSR—Command, Configuration & Status Registers − Replacement to IMMR space registers on PowerQUICC II Pro − All registers contained within a 1 MByte address region − Offers additional flexibility—can be relocated, and provides easier external access TM 41 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Power Architecture cores operate in either of the following two modes Supervisor mode: This is the highest privilege mode where entire programming model is available for the software. Operating systems and boot loaders operate on this mode. User mode: Resources, which can affect whole system, are not available in this mode. User-level applications or non-trustable programs operate on this mode. TM 42 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. e500v2 0 31 32 63 GPR0 GPR1 -----GPR30 GPR31 L1 Cache (Read Only) General Purpose Registers CR L1CFG0 SPE Register CTR L1CFG1 SPEFSCR LR ACC XER ATBL TBL ATBU TBU General SPRs (Read Only) FPU Registers FPSCR Instruction Accessible Registers User General SPR USPRG0 e300 Time-Base Registers 0 63 FPR0 FPR1 -----FPR30 FPR31 (Read Only) SPRG3 SPRG4 SPRG5 SPRG6 SPRG7 PMGC0 PMC0 PMC1 PMC2 PMC3 PMLCb0 PMLCb1 PMLCb2 PMLCb3 Branch Buffer Registers BBEAR BBTAR TM Performance Monitor Registers (Read Only) PMLCa0 PMLCa1 PMLCa2 PMLCa3 43 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. e500v2 L1 Cache PIR L1CSR0 MSR PVR SVR HID0 HID1 L1CSR1 Branch Buffer Registers BBEAR TCR DEC TBL BBTAR TSR DECAR TBU BUCSR PMGC0 PMC0 PMC1 PMC2 PMC3 General SPRs SPRG0 SPRG1 ---SPRG7 PMLCb0 PMLCb1 PMLCb2 PMLCb3 MMU PID0 PID1 PID2 MMUCSR0 MAS0 MAS1 ---MAS7 MMUCFG TLB0CFG TLB1CFG Time-Base Registers Performance Monitor Registers PMLCa0 PMLCa1 PMLCa2 PMLCa3 IVOR0 IVOR1 *** IVOR15 DBSR IAC1 IAC2 IVOR32 *** IVOR35 DAC1 DAC2 MCAR MCARU TM Interrupt Registers MCSRR0 MCSSR1 SRR0 SRR1 MCSR CSRR0 CSSR1 ESR DEAR Debug DABR DABR2 IABR IABR2 IBCR DBCR MMU Debug DBCR0 DBCR1 DBCR2 e300 Miscellaneous DAR DSISR IBAT0U IBAT0L *** IBAT7U IBAT7L DBAT0U DBAT0L *** DBAT7U DBAT7L SR0 SR1 *** SR15 SDR1 DMISS IMISS HASH1 HASH2 DCMP ICMP RPA IVPR 44 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • While exceptions had fixed vector addresses in e300, they are programmable in e500v2 except reset vector • In e300, reset vectors at 0x0000_0100 while it vectors at 0xFFFF_FFFC in e500v2 • e500v2 has a new category of exception via machine check TM 45 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. PC → CSRR0 MSR → CSRR1 PC → SRR0 MSR → SRR1 Main Program Interrupt Service Routine PC ← SRR0 MSR ← SRR1 PC → MCSRR0 MSR → MCSRR1 Critical Interrupt Service Routine Machine Check Interrupt Service Routine PC ← CSRR0 PC ← MCSRR0 MSR ← CSRR1 MSR ← MCSRR1 e300 e500v2 A new category of machine check interrupt has been added in e500v2 TM 46 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • e300 supports BAT and page translations while e500v2 has 512 entries of fixed 4k pages and 16 entry variable size pages • e300 endian mode is controlled on system basis while e500v2 allows endian configuration per page basis • • Unlike e300, MMU is always on in e500v2 After reset, a default entry in MMU maps logical address 0xffff_f000 to physical address 0xffff_f000 TM 47 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Effective Address e500v2 Translations e300 Translations Real Addressing Mode Address Space | PID | byte Address Segment Descriptor Match with BAT Registers Page Address Translation Virtual Address Block Address Translation Segment Descriptor Physical Address TM Physical Address 48 Physical Address Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • e300 has 16/32k L1 I/D cache while e500v2 has 32k L1 I/D cache and 256k L2 cache • e300 supports way-locking while e500v2 supports linelocking • e500v2 has non-blocking caches (support hit under misses and miss under misses) • e500v2 supports stashing on L2 TM 49 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Integer arithmetic, compare, logical, rotate and shift − Unchanged between e300 and e500v2 − e500v2 implements the Power ISA™ integer select (isel) instruction − e500v2 also supports integer instructions in the signal processing engine (SPE) APU • Integer load / store − e500v2 − All does not implement load / store string operations other load / store instructions are unchanged − e500v2 SPE APU allows double word loads and stores Refer to Appendix B TM 50 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Floating Point − e300 used a dedicated floating point unit (FPU) for 32-/ 64-bit floating point registers (Note: e300c2 does not have a FPU) − e500v2 implements scalar single-precision, vector singleprecision and scalar double-precision embedded floating point categories through the SPE APU − e500v2 uses general purpose registers, extended to 64 bits to accommodate vector and double precision operations − e300 and e500v2 floating point opcodes are not the same Refer to Appendix B TM 51 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Processor control − All move to / from SPR, CR, XER, TB, MSR, PMR are unchanged (note e300c1 and c2 do not have performance monitors) − e500v2 does not have segment registers or a FPSCR − e500v2 implements the Power ISA™ write MSR external enable instruction (wrtee[i]) • Memory synchronisation − Reservation − Instruction instructions (lwarx, stwcx.) are unchanged synchronise (isync) is unchanged − Memory synchronise is defined as sync for the e300 and msync for the e500v2. Power™ ISA defines msync as a simplified mnemonic of sync − Enforce in order execution of I/O is supported as eieio on the e300 and maps to the mbar instruction on the e500v2 Refer to Appendix B TM 52 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Memory control − Cache User level cache instructions (touch, touch for store, allocate, clear, zero, store and flush) are unchanged e500v2 implements Power ISA™ cache lock instructions (icblc, icbtls, dcblc, dcbtls, dcbstls) e500v2 cache instructions can specify target cache as L1 or L2 − MMU e300 and e500v2 MMUs are architecturally different e500v2 uses MMU Assist registers to access the translation lookaside buffers (TLBs) e300 directly updates the TLBs TLB invalidation and synchronisation remains unchanged Refer to Appendix B TM 53 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Reset Branch to FFFFF000 Invalidate, Initialize & enable cache Enable machine check Jump out of 4k Enable Branch Prediction Initialize L2 cache Configure a TLB with AS=1 Setup Interrupt Vector Table Initialize Decrementer TM (pointing to same physical address) Create TLB entry for Flash with AS=0 Switch execution to AS1 Create TLB entries for other memory space Lock cache (to be used as ram), create TLB Initialize stack pointer Initialization Complete Refer to Appendix A 54 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • e500v2 imposes numerous changes to classic PowerPC operating systems • Areas affected include: − Instruction set use − Context switching − Exception handling − MMU operation − Reset • Necessary changes have already been made by PowerPC OS vendors • Linux BSPs with gcc based toolchain available from Freescale − http://www.freescale.com/linux TM 55 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Operating Systems, Software TM Linux IDE, Compilers, Debuggers, Build Tools, Probes Drivers, Protocol Stacks, Translators T M Linux GNU Tools Evaluation boards, Systems and Design Services TM TM 56 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. TM Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. To WAN PHY PHY PHY PHY PHY GbE Switch • DDR2 Memory Flash − e300 Ethernet Security UART, SPI, GPIO MPC8313E / MPC8314E To LAN 802.11n Chipset core, 400 MHz max DDR / DDR2 memory • WAN • SGMII SGMII Based on MPC8313E/14E (GMII based) − Dedicated GbE interface • USB PCI − VDSL2 − 4x • Power Management Debug LAN 100/1000BT w/ RJ45 Wireless − 802.11n LED interface via PCI Security • Onboard flash memory • 1 x USB 2.0 • Power modes • TM 58 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Flash To WAN PHY PHY PHY PHY PHY GbE Switch DDR3 Memory • − Ethernet 802.11n Chipset PCIe 802.11n Chipset PCIe UART, SPI, GPIO Security QorIQ P1010 To LAN DDR3 memory support • WAN − • PHY USB 4x 10/100/1000 w/ RJ45 Wireless − 2 x 802.11n via 1x PCIe interfaces − Support for 2x2 MIMO eSDHC • Debug Dedicated GbE interface LAN − • Power Management • LED • ► 800 MHz max freq • SGMII SGMII Based on P1010 • Security Onboard flash memory USB 2.0 eSDHC interface Power modes Benefits • • Increased performance per core • Existing interfaces supported • Ability to support 2x2 MIMO, enhanced network performance of up to 300 Mbps • eSDHC for onboard storage TM 59 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. HDD HDD Memory Local Bus WiFi 802.11b/g/n To LAN Flash 1x SATA PCIe MPC8377E MII/GMII/ RGMII/RTBI Ethernet Switch Ethernet with PHY Security USB GPIO GMII/RGMII PHY PHY Debug To WAN LED • e300 based platform, up to 800 MHz performance, 1.92 DMIPS/MHz performance, <5W @ 800 MHz • Integrated SATA controller used to connect up to 2x HDD • Gigabit Ethernet LAN and WAN interface • Wireless capability available through PCIe card • USB interface accessible through external PHY TM 60 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • Performance improvement with e500 core − − • • Flash SSD SSD WiFi Up to 800 MHz performance per CPU PCI Express® 1x Card 802.11b/g/n IFC 1x PCIe 1x Memory eSDHC eSDHC Security 2.4DMIPS/MHz L2 cache available to improve Ethernet packet processing Storage capability: P1010 MII/GMII/ RGMII/RTBI To LAN Ethernet Switch with PHY Ethernet USB PHY GPIO SGMII/RGMII − SSD on PCIe − eSDHC interface PHY To WAN • Gigabit Ethernet LAN and WAN interface maintained ► Potential to add additional services using extra CPU processing capability TM 61 Debug LED Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. ►New board design required for QorIQ device Issue Solution with QorIQ P1 /P2 Power supply Same voltage architecture. Adjustable supplies will ease migration from 1.1V on PowerQUICC II Pro to 1.0V for QorIQ P1 Existing interfaces Re-use design for existing interfaces such as Ethernet, eSPI, JTAG and USB New interfaces Use application notes, evaluation boards and other resources from www.freescale.com Power performance Best-in-class power performance, enable fanless “green” design; advanced power management Simulation IBIS models available for all devices TM 62 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Network attached storage / digital video surveillance Hard Drives 63 Video Card 802.11n To LAN To WAN PCI Express PCIe GE PHY 2xGE Flash SATA Industrial networking applications enjoy the unique product differentiation of a trusted architecture that enables complete code signing and secure boot. Coupled with the integration of industrial interfaces (CAN) and outstanding performance in a power envelope of less than 1.1W, provides the ingredients for the most innovative designs in the segment. TM Memory IFC Flash Ethernet Switch DDR3 PCI Express 802.11n P1014 SLIC TDM Codec UART, SPI, GPIO Flash Ethernet Switch 802.11abg 802.11n PCI Express To LAN DDR3 P1010E USB Hard Drive, Printer, or External CE Device Industrial networking Memory IFC 3x GE To LAN USB+PHY Hard Drive, Printer, or External CE Device (NAS/DVR) systems benefit from leading performance and integration (PCI Express and SATA interconnects), enabling higher storage throughput in low BOM systems. Cost-efficient routing applications SATA DUART, SPI, GPIO Cost-sensitive routing applications enjoy the benefits of software data path acceleration to increase networking performance. A small package (19 x 19 mm) and low power will enable low bill of materials— fanless designs Memory Security Boot P1010E 3x GE USB Hard Drive, Printer, or External CE Device 63 CAN UART, SPI, GPIO Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. ►Migration from e300 to e500 based platform Issue Solution with QorIQ P1 /P2 Code base migration General code compatibility with exceptions in certain areas—floating point, interrupts, supervisor instructions. See resources at www.freescale.com Operating systems & tools Established ecosystem of operating systems BSPs, tools and drivers for e500 based platforms, thus reducing development time Software compatibility for reused interfaces Code used for existing interfaces such as Ethernet and security block will migrate New interfaces and features Driver-level source code available for Freescale evaluation platforms from www.freescale.com TM 64 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. TM • e300 − e300 Power Architecture® Core Family Reference Manual, which describes functionality specific to the e300 − Programming Environments Manual for 32-Bit Implementations of the PowerPC® Architecture (referred to as the PEM), which describes the functionality common to all PowerPC devices • e500v2 − e500 Power Architecture Core Family Reference Manual, which describes functionality specific to the e500 cores − EREF: A Programmer’s Reference Manual for Freescale Embedded Devices, which describes the functionality common to all Freescale Power ISA™ embedded devices TM 66 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Interrupt Type e300 e500 Interrupt Type e300 e500 System reset 0x100 - Data store translation miss 0x1100 - Critical interrupt 0xa00 IVOR0 Data load translation miss 0x1200 - Machine check 0x200 IVOR1 Instruction address breakpoint 0x1300 - Data storage interrupt 0x300 IVOR2 System management interrupt 0x1400 - Instruction storage interrupt 0x400 IVOR3 Performance monitor 0xf00 IVOR35 External interrupt 0x500 IVOR4 Fixed interval timer - IVOR11 Alignment 0x600 IVOR5 Watchdog timer - IVOR12 Program 0x700 IVOR6 Data TLB error - IVOR13 Floating point unavailable 0x800 IVOR7 Instruction TLB error - IVOR14 Decrementer 0x900 IVOR10 Debug - IVOR15 System call 0xc00 IVOR8 Vector unavailable - IVOR32 Trace 0xd00 - Embedded floating point data - IVOR33 Instruction translation miss 0x1000 - Embedded floating point round - IVOR34 TM 67 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • e500v2 has a simpler page-based MMU than classic PowerPC − Software-managed TLBs, no hardware table walking − No segments, no BATs, no page table definition − Software can use its own page table format − TLB misses and faults cause exceptions, no hashing • No real mode (translation is always on) − Real mode can be emulated by creating global TLB entries for address space 0 that map all physical memory 1 to 1 − On reset, one 4 KB page is mapped • Instructions architected to read/write and search/invalidate TLB entries TM 68 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • • • After reset, by default, the first entry in MMU L2 TLB1 has logical address 0xffff_f000 mapped to physical address 0xffff_f000 Core issues first instruction fetch on 0xffff_fffc The address should contain a branch instruction .section .resetvec,"ax" b _start_e500 Cache initialization: • − Invalidate I & D caches li r0,2 mtspr L1CSR0,r0 − − Configure L1CSR0 Enable caches lis r2,L1CSR0_CPE@H /* enable parity */ ori r2,r2,L1CSR0_DCE mtspr L1CSR0,r2 /* enable L1 Dcache */ isync mtspr L1CSR1,r2 /* enable L1 Icache */ isync msync TM 69 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Setup interrupt vector table • lis r1,TEXT_BASE@h mtspr IVPR,r1 li r1,0x0100 mtspr IVOR0,r1 /* 0: Critical input */ Initialize decrementer, enable machine check & branch prediction • li lis r0,0x0000 r1,0xffff mtspr DEC,r0 mttbl r0 /* prevent dec exceptions */ /* prevent fit & wdt exceptions */ mttbu r0 mtspr TSR,r1 /* clear all timer exception status */ mtspr TCR,r0 /* disable all */ mtspr ESR,r0 /* clear exception syndrome register */ mtspr MCSR,r0 mtxer r0 /* machine check syndrome register */ /* clear integer exception register */ /* Enable Time Base and Select Time Base Clock */ lis r0,HID0_EMCP@h ori r0,r0,HID0_ENMAS7@l ori r0,r0,HID0_TBEN@l /* Enable machine check */ /* Enable 36 bit phys MAS7 */ /* Enable Timebase */ mtspr HID0,r0 /* Enable Branch Prediction */ li r0,0x201 /* BBFI = 1, BPEN = 1 */ mtspr BUCSR,r0 TM 70 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • AS=0 -> AS=1 /* create a temp mapping in AS=1 to the 4M boot window */ lis r6,FSL_BOOKE_MAS0(1, 15, 0)@h ori r6,r6,FSL_BOOKE_MAS0(1, 15, 0)@l lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@h ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@l lis r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@h ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@l /* The 85xx has the default boot window 0xff800000 - 0xffffffff */ lis r9,FSL_BOOKE_MAS3(0xffc00000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h ori r9,r9,FSL_BOOKE_MAS3(0xffc00000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l mtspr MAS0,r6 mtspr MAS1,r7 mtspr MAS2,r8 mtspr MAS3,r9 isync msync tlbwe /* lis r6,MSR_CE|MSR_ME|MSR_DE|MSR_IS|MSR_DS@h ori r6,r6,MSR_CE|MSR_ME|MSR_DE|MSR_IS|MSR_DS@l lis r7,switch_as@h ori r7,r7,switch_as@l mtspr SPRN_SRR0,r7 mtspr SPRN_SRR1,r6 rfi TM 71 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. • RAM is not available yet; it’s good idea to lock cache to be used as RAM during this period lis r3,CONFIG_SYS_INIT_RAM_ADDR@h ori r3,r3,CONFIG_SYS_INIT_RAM_ADDR@l mfspr r2, L1CFG0 andi. r2, r2, 0x1ff /* cache size * 1024 / (2 * L1 line size) */ slwi r2, r2, (10 - 1 - L1_CACHE_SHIFT) mtctr r2 li r0,0 1: dcbz r0,r3 dcbtls 0,r0,r3 addi r3,r3,CONFIG_SYS_CACHELINE_SIZE bdnz 1b TM 72 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Mnemonic e300 e500 Mnemonic e300 e500 eieio √ Replaced with mbar fmuls √ X fabs √ X fmul √ X fadds √ X fnabs √ X fadd √ X fneg √ X fcfid √ X fnmadds √ X fcmpo √ X fnmadd √ X fcmpu √ X fnmsubs √ X fctidz √ X fnmsub √ X fctid √ X fres √ X fctiwz √ X frsp √ X fctiw √ X frsqrte √ X fdivs √ X fsel √ X fdiv √ X fsqrts √ X fmadds √ X fsqrt √ X fmadd √ X fsubs √ X fmr √ X fsub √ X fmsubs √ X lfd √ X fmsub √ X lfdu √ X TM 73 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. Mnemonic e300 e500 Mnemonic e300 e500 lfdux √ X stfdux √ X lfdx √ X stfdx √ X lfs √ X stfiwx √ X lfsu √ X stfs √ X lfsux √ X stfsu √ X lfsx √ X stfsux √ X lswi √ X stfsx √ X lswx √ X stswi √ X mcrfs √ X stswx √ X mfapidi √ X mfdcr √ X mtdcr √ X mtfsb0 √ X mtfsb1 √ X mtfsfi √ X mtfsf √ X stfd √ X stfdu √ X TM 74 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, the Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMARTMOS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2011 Freescale Semiconductor, Inc. TM