50 mA Iout SEPIC-Cuk Reference Design PRD1175 FEATURES 50 mA Iout Low Output Ripple (40 mV) Low Cost Small Size High Efficiency DESCRIPTION This design is a so called cascoded coupled SEPIC-Cuk converter producing clean ±9 V rails from a 12V input. A SEPIC-Cuk is simply a SEPIC and a Cuk converter designed to share the regulator and power switch. Using coupled inductors for each converter increases the efficiency and improves the frequency response. The “cascode” in the name refers to Q1 which is a FET in series with the internal FET of the ADP1613. This enables us to use this 20 V max rated chip at a higher switch node voltage. This is required because in a SEPIC or a Cuk converter, the switch node goes to Vin + Vout. Table 1. User Target Specs, Vout Spec Vinmin Vinmax Units Vout1 +9V +9V Volts Vout2 -9V -9V Volts Iout 0.050 0.050 Amps Tamb Vinmin 55 11.6 55 11.6 degC Volts Vinmax 12.4 12.4 Volts Vout Ripple Max 0.0134 0.0128 Volts Rev. 0 Reference designs are as supplied “as is” and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. No license is granted by implication or otherwise under any patents or other intellectual property by application or use of reference designs. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Analog Devices reserves the right to change devices or specifications at any time without notice. Trademarks and registered trademarks are the property of their respective owners. Reference designs are not authorized to be used in life support devices or systems. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved. Reference Design PRD1175 TABLE OF CONTENTS Features ......................................................................................................................................................................1 Description .................................................................................................................................................................1 Revision History .........................................................................................................................................................2 Schematic ...................................................................................................................................................................3 Bill of Materials..........................................................................................................................................................3 Simulation Results ......................................................................................................................................................5 TABLE OF FIGURES Figure 1. Schematic ...............................................................................................................................................3 Figure 2. Bode Plot ...............................................................................................................................................5 REVISION HISTORY 11/02/2009—Revision 1: Initial Version Rev. 1 | Page 2 of 6 Reference Design PRD1175 SCHEMATIC Figure 1. Schematic BILL OF MATERIALS Table 2. Des Bill of Materials MFG U1 ADI L1 Coilcraft L2 Coilcraft Q1 ON D1 DiodesIn c DiodesIn c Murata D2 Cout 1 Component Specs Part Number Pkg Qty Area (mm²) Height (mm) Integrated Switching Regulator 68uH, 3190mΩ, 0.33Apk 68uH, 3190mΩ, 0.33Apk 35 mΩ, 2.6 Vth,30 V ADP1613ARMZ-R7 MSOP-8 1 14.7 1.1 0.7 LPD4012-683 1 16.1 1.2 0.6 1 16.1 1.2 0.6 NTGS4141NG 4mm x 4mm x 1.2mm 4mm x 4mm x 1.2mm SOT23-6 1 9.3 1.1 0.16 0.35 A, 40 V SD103AW SOD123 1 6.6 1.4 0.35 A, 40 V SD103AW SOD123 1 6.6 1.4 1uF, 16V, 4mΩ GRM21BR71C10 5K 0805 1 2.5 1.2 0.049 2 0.049 2 0.013 LPD4012-683 Rev. 1 | Page 3 of 6 Cost* Reference Design Cout 2 Cout 3 Cin Murata 1uF, 16V, 4mΩ Murata 1uF, 16V, 4mΩ Murata 1uF, 16V, 4mΩ C1 Murata 1uF, 16V, 4mΩ C2 Murata 1uF, 16V, 4mΩ Rc1 Cc0 Cc1 Vishay Vishay Vishay 3.09 kOhms 10 pF 22 nF Rf1 Rf2 Cv5 Vishay Vishay Murata 102 kohm 16.2 kohm 1uF,10V,X5R Css Rb0 Vishay Vishay Z1 Diodes Inc. Rfilt Susumu PRD1175 GRM21BR71C10 5K GRM21BR71C10 5K GRM21BR71C10 5K GRM21BR71C10 5K GRM21BR71C10 5K 5% tolerance 10% tolerance 10% tolerance 0805 1 2.5 1.2 0.013 0805 1 2.5 1.2 0.013 0805 1 2.5 1.2 0.013 0805 1 2.5 1.2 0.013 0805 1 2.5 1.2 0.013 0805 0805 0805 1 1 1 2.5 2.5 2.5 0.5 0.5 0.5 0.005 0.005 0.005 0805 0805 0603 1 1 1 2.5 2.5 1.3 0.5 0.5 0.6 0.005 0.005 0.01 10 nF 1.58 kOhms 1% tolerance 1% tolerance GRM188R61A10 5K 10% tolerance 5% tolerance 0805 0805 1 1 2.5 2.5 0.5 0.5 0.005 0.005 5.1V, 500 mW Zener DDZ9689 SOD-123 1 3.40 1.35 0.026 0.3 Ohms RL1220S-0R30-G 0805 Totals 1 20 2.5 109.2 0.5 1.4 0.036 2.34 Rev. 1 | Page 4 of 6 Reference Design PRD1175 SIMULATION RESULTS Figure 2. Legend: / Bode Plot Gain Vout1 (+9 V) / Phase Margin Vout1 (+9V) at Iout = 50 mA for both channels, Vin = 11.4 V Rev. 1 | Page 5 of 6 Reference Design PRD1175 NOTES ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Error! Unknown document property name. Rev. 1 | Page 6 of 6