BSZ040N04LS G OptiMOS™3 Power-Transistor Product Summary Features V DS 40 V • Fast switching MOSFET for SMPS R DS(on),max 4.0 mΩ • Optimized technology for DC/DC converters ID 40 A • Qualified according to JEDEC1) for target applications PG-TSDSON-8 • N-channel; Logic level • Excellent gate charge x R DS(on) product (FOM) • Very low on-resistance R DS(on) • Superior thermal resistance • 100% Avalanche tested • Pb-free plating; RoHS compliant • Halogen-free according to IEC61249-2-21 Type Package Marking BSZ040N04LS G PG-TSDSON-8 040N04L Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value V GS=10 V, T C=25 °C 40 V GS=10 V, T C=100 °C 40 V GS=4.5 V, T C=25 °C 40 V GS=4.5 V, T C=100 °C 40 V GS=10 V, T A=25 °C, R thJA=60 K/W 2) Unit A 18 Pulsed drain current3) I D,pulse T C=25 °C 160 Avalanche current, single pulse 4) I AS T C=25 °C 20 Avalanche energy, single pulse E AS I D=20 A, R GS=25 Ω 130 mJ Gate source voltage V GS ±20 V 1) Rev. 1.3 J-STD20 and JESD22 page 1 2009-11-05 BSZ040N04LS G Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Power dissipation P tot Value T C=25 °C 69 T A=25 °C, T j, T stg -55 ... 150 IEC climatic category; DIN IEC 68-1 Parameter W 2.1 R thJA=60 K/W 2) Operating and storage temperature Unit °C 55/150/56 Values Symbol Conditions Unit min. typ. max. - - 1.8 - - 60 40 - - Thermal characteristics Thermal resistance, junction - case R thJC Device on PCB R thJA 6 cm2 cooling area2) K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA Gate threshold voltage V GS(th) V DS=V GS, I D=36 µA 1.2 - 2 Zero gate voltage drain current I DSS V DS=40 V, V GS=0 V, T j=25 °C - 0.1 1 V DS=40 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=20 A - 4.5 5.6 mΩ V GS=10 V, I D=20 A - 3.3 4 - 1.8 - Ω 40 79 - S Gate resistance RG Transconductance g fs |V DS|>2|I D|R DS(on)max, I D=20 A 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 3) See figure 3 for more detailed information 4) See figure 13 for more detailed information Rev. 1.3 page 2 2009-11-05 BSZ040N04LS G Parameter Values Symbol Conditions Unit min. typ. max. - 3800 5100 - 830 1100 Dynamic characteristics Input capacitance C iss V GS=0 V, V DS=20 V, f =1 MHz Output capacitance C oss Reverse transfer capacitance Crss - 45 - Turn-on delay time t d(on) - 8.5 - Rise time tr - 4.8 - Turn-off delay time t d(off) - 33 - Fall time tf - 5.4 - Gate to source charge Q gs - 11 - Gate charge at threshold Q g(th) - 6.1 - Gate to drain charge Q gd - 4.9 - Switching charge Q sw - 10 - Gate charge total Qg - 48 64 Gate plateau voltage V plateau - 3.0 - Gate charge total Qg V DD=20 V, I D=20 A, V GS=0 to 4.5 V - 23 31 Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 10 V - 45 - Output charge Q oss V DD=20 V, V GS=0 V - 31 - - - 40 - - 160 V DD=20 V, V GS=10 V, I D=20 A, R G=1.6 Ω pF ns Gate Charge Characteristics 5) V DD=20 V, I D=20 A, V GS=0 to 10 V nC V nC Reverse Diode Diode continuous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=20 A, T j=25 °C - 0.8 1.2 Reverse recovery charge Q rr V R=20 V, I F=I S, di F/dt =400 A/µs - 26 - 5) Rev. 1.3 T C=25 °C A V nC See figure 16 for gate charge parameter definition page 3 2009-11-05 BSZ040N04LS G 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 80 50 40 60 I D [A] P tot [W] 30 40 20 20 10 0 0 0 40 80 120 160 0 40 80 T C [°C] 120 160 T C [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 103 10 limited by on-state resistance 1 µs 102 10 µs 1 100 µs 0.5 101 Z thJC [K/W] I D [A] DC 1 ms 0.2 0.1 10 ms 0.05 0.1 0.02 100 0.01 single pulse 10-1 10-1 100 101 102 0 0 0 0 0 0 1 10-6 10-5 10-4 10-3 10-2 10-1 100 t p [s] V DS [V] Rev. 1.3 0.01 page 4 2009-11-05 BSZ040N04LS G 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 200 12 10 V 5V 4.5 V 10 160 3.2 V 4V 8 I D [A] R DS(on) [mΩ] 120 80 3.5 V 40 3.5 V 6 4V 4.5 V 5V 4 3.2 V 10 V 2 3V 2.8 V 0 0 0 1 2 3 0 10 20 V DS [V] 30 40 50 I D [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 200 160 160 120 120 I D [A] g fs [S] 200 80 80 40 40 150 °C 25 °C 0 0 0 1 2 3 4 5 Rev. 1.3 0 40 80 120 160 I D [A] V GS [V] page 5 2009-11-05 BSZ040N04LS G 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=20 A; V GS=10 V V GS(th)=f(T j); V GS=V DS; I D=36 µA 8 2.5 2 V GS(th) [V] R DS(on) [mΩ] 6 98 % 4 typ 1.5 1 2 0.5 0 0 -60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 1000 10000 Ciss 25 °C Coss 1000 100 150 °C, 98% I F [A] C [pF] 103 150 °C 102 25 °C, 98% 10 100 Crss 101 1 10 0 10 20 30 40 Rev. 1.3 0.0 0.5 1.0 1.5 2.0 V SD [V] V DS [V] page 6 2009-11-05 BSZ040N04LS G 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 Ω V GS=f(Q gate); I D=20 A pulsed parameter: T j(start) parameter: V DD 100 12 20 V 10 8V 32 V 25 °C 10 V GS [V] I AV [A] 8 100 °C 125 °C 6 4 2 1 0 1 10 100 1000 0 10 20 30 40 50 Q gate [nC] t AV [µs] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 45 V GS Qg V BR(DSS) [V] 40 35 V g s(th) 30 25 Q g(th) Q sw Q gs 20 -60 -20 20 60 100 140 Q g ate Q gd 180 T j [°C] Rev. 1.3 page 7 2009-11-05 BSZ040N04LS G Package Outline Rev. 1.3 PG-TSDSON-8 page 8 2009-11-05 BSZ040N04LS G Published by Infineon Technologies AG 81726 Munich, Germany © 2009 Infineon Technologies AG All Rights Reserved. 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Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.3 page 9 2009-11-05