SC4205 Very Low Dropout 1 Amp Regulator With Enable POWER MANAGEMENT Description Features The SC4205 is a high performance positive voltage regulator designed for use in applications requiring very low dropout voltage at up to 1 Amp. Since it has superior dropout characteristics compared to regular LDOs, it can be used to supply 2.5V on motherboards or 2.8V on peripheral cards from the 3.3V supply thus allowing the elimination of costly heatsinks. Additionally, the SC4205 has an enable pin to further reduce power dissipation while shut down. The SC4205 provides excellent regulation over variations in line, load and temperature. 350mV dropout @ 1A Adjustable output from 1.2V to 4.8V 2.5V and 1.8V options (adjustable externally The SC4205 is available in the SOIC-8EDP package with internally preset outputs that are also adjustable using external resistors. Applications Typical Application Circuits using resistors) Over current and over temperature protection Enable pin 10µA quiescent current in shutdown Low reverse leakage (output to input) Surface mount and through-hole packages Full industrial temperature range Available in SOIC-8EDP package Battery powered systems Motherboards Peripheral cards Network cards Set Top Boxes Medical Equipment Notebook Computers SC4205 4 3 VIN 2 ENABLE 1 NC NC VIN VO EN ADJ NC GND 5 6 VO 7 8 R1 VO U1 C1 = 1.2 (R1 + R2) Volts R2 C2 R2 SC4205 4 3 VIN 2 ENABLE 1 C1 SC4205 NC NC VIN VO EN ADJ NC GND U1 5 4 6 VO 3 VIN 7 2 ENABLE 8 1 C2 NC NC VIN VO EN ADJ NC GND C1 U1 5 6 VO 7 8 C2 Notes: (1) Maximum VO setpoint for 1.8V parts = 5.4V. (2) This device is designed to operate with ceramic input and output capacitors. Revision: June 28, 2004 1 www.semtech.com SC4205 POWER MANAGEMENT Absolute Maximum Ratings Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Parameter Symbol Max Units Input Voltage VIN 7 V Power Dissipation PD Internally Limited W Thermal Resistance Junction to Ambient SOIC-8EDP(1) θJA 36 °C/W Thermal Resistance Junction to Case SOIC-8EDP(1) θJC 5.5 °C/W Operating Ambient Temperature Range TA -40 to +85 °C Operating Junction Temperature Range TJ -40 to +150 °C Storage Temperature Range TSTG -65 to +150 °C Lead Temperature (Soldering) 10 Sec. TLEAD 300 °C ESD Rating (Human Body Model) V ESD 4 kV Note: (1) 1 square inch of FR-4, double sided, 1 oz. minimum copper weight. Electrical Characteristics Unless specified: VEN = VIN. Adjustable Option (VADJ > VTH(ADJ)): VIN = 2.2V to 5.5V and IO = 10µA to 1A. Fixed Options (VADJ = GND): VIN = (VO + 0.5V) to 5.5V and IO = 0A to 1A. Values in bold apply over TJ = -40°C to 125°C Parameter Symbol Test Conditions Min Typ Max Units 5.5 V VIN Operating Voltage Range VIN Quiescent Current IQ 2.2 VIN = 3.3V 0.75 1.75 mA VIN = 5.5V, VEN = 0V 10 35 µA VO +1% V VO Output Voltage(1) -1% VO IO = 10mA Line Regulation(1) REG(LINE) IOUT = 10mA 0.035 0.3 % Load Regulation(1) REG(LOAD) IOUT = 10mA to 1A 0.2 0.4 % VD IO = 10mA 2.5 10 (Internal Fixed Voltage) Dropout Voltage(1)(2) -2% +2% 20 IO = 500mA 90 300 400 IO = 1A 180 400 500 2004 Semtech Corp. 2 mV mV mV www.semtech.com SC4205 POWER MANAGEMENT Electrical Characteristics (Cont.) Unless specified: VEN = VIN. Adjustable Option (VADJ > VTH(ADJ)): VIN = 2.2V to 5.5V and IO = 10µA to 1A. Fixed Options (VADJ = GND): VIN = (VO + 0.5V) to 5.5V and IO = 0A to 1A. Values in bold apply over TJ = -40°C to 125°C Parameter Symbol Test Conditions Min Typ Max Units 1 10 µA 1.6 1.33 3.5 A 1.188 1.200 1.212 V VO (Cont.) Minimum Load Current(3) IO Current Limit ICL ADJ Reference Voltage(1) VREF VIN = 2.2V, VADJ = VOUT, IO = 10mA 1.176 Adjust Pin Current(4) Adjust Pin Threshold(5) IADJ VADJ = VREF VTH(ADJ) 0.05 1.224 30 200 nA 0.20 0.40 V 1.5 10 µA EN Enable Pin Current IEN VEN = 0V, VIN = 3.3V Enable Pin Threshold VIH VIN = 3.3V VIL VIN = 3.3V 1.6 V 0.4 Over Temperature Protection High Trip level Hysteresis THI 170 °C THYST 20 °C Notes: (1) Low duty cycle pulse testing with Kelvin connections required. (2) Defined as the input to output differential at which the output voltage drops to 1% below the value measured at a differential of 0.7V. (3) Required to maintain regulation. Voltage set resistors R1 and R2 are usually utilized to meet this requirement. Adjustable versions only. (4) Guaranteed by design. (5) When VADJ exceeds this threshold, the “Sense Select” switch disconnects the internal feedback chain from the error amplifier and connects VADJ instead. 2004 Semtech Corp. 3 www.semtech.com SC4205 POWER MANAGEMENT Ordering Information Part Number SC4205IS-X.XTR P ackag e Temp. Range (TA) SOIC-8EDP -40 to +85 OC (1)(2) SC4205IS-X.XTRT(1)(2)(3) S C 4205E V B Evaluation Board Notes: (1) Where -X.X denotes voltage options. Available voltages are: 2.5V and 1.8V. Output voltage can be adjusted using external resistors, see Pin Descriptions on page 5. (2) Only available in tape and reel packaging. A reel contains 2500 devices. (3) Lead free product Pin Configuration Top View Bottom View GND NC GND GND 8 EN ADJ ADJ 7 VIN VO VO 6 NC NC NC 5 SOIC-8EDP Exposed Die Pad 1 NC 2 EN 3 VIN 4 NC SOIC-8EDP Pin Descriptions Pin N ame Pin D esciption AD J Thi s pi n, when grounded, sets the output voltage to that set by the i nternal feedback resi stors. If external feedback resi stors are used, the output voltage wi ll be (See Appli cati on C i rcui ts on page 1): VO = 1.200 (R1 + R2) R2 Volts EN Enable Input. Pulli ng thi s pi n below 0.4V turns the regulator off, reduci ng the qui escent current to a fracti on of i ts operati ng value. The devi ce wi ll be enabled i f thi s pi n i s left open. C onnect to VIN i f not bei ng used. GND Reference ground. Note: The GND pi n and the exposed di e pad must be connected together at the IC pi n. Use the exposed di e pad on the devi ce for heatsi nki ng. VIN Input voltage. For regulati on at full load, the i nput to thi s pi n must be between (VO + 0.5V) and 5.5V. Mi ni mum VIN = 2.2V. VO The pi n i s the power output of the devi ce. 2004 Semtech Corp. 4 www.semtech.com SC4205 POWER MANAGEMENT Block Diagram 2004 Semtech Corp. 5 www.semtech.com SC4205 POWER MANAGEMENT Applications Information Introduction Thermal Considerations The SC4205 is intended for applications such as graphics cards where high current capability and very low dropout voltage are required. It provides a very simple, low cost solution that uses very little pcb real estate. Additional features include an enable pin to allow for a very low power consumption standby mode, and a fully adjustable output. The power dissipation in the SC4205 is approximately equal to the product of the output current and the input to output voltage differential: Component Selection PD ( MAX ) = (VIN ( MAX ) − VOUT( MIN ) )• I O ( MAX ) + VIN ( MAX ) • I Q ( MAX ) PD ≈ (VIN − VOUT )• I O The absolute worst-case dissipation is given by: Input capacitor: a 4.7µF ceramic capacitor is recommended. This allows for the device being some distance from any bulk capacitance on the rail. Additionally, input droop due to load transients is reduced, improving load transient response. Additional capacitance may be added if required by the application. For a typical scenario, VIN = 3.3V ± 5%, VOUT = 2.8V and IO = 1A, therefore: VIN(MAX) = 3.465V, VOUT(MIN) = 2.744V and IQ(MAX) = 1.75mA, Thus PD(MAX) = 727mW. Output capacitor: a minimum bulk capacitance of 2.2µF, along with a 0.1µF ceramic decoupling capacitor is recommended. Increasing the bulk capacitance will improve the overall transient response. The use of multiple lower value ceramic capacitors in parallel to achieve the desired bulk capacitance will not cause stability issues. Although designed for use with ceramic output capacitors, the SC4205 is extremely tolerant of output capacitor ESR values and thus will also work comfortably with tantalum output capacitors. For reference, the phase-margin contour of Figure 1 can be used to choose an appropriate output capacitor for a given stability requirement. Using this figure, and assuming TA(MAX) = 70°C, we can calculate the maximum thermal impedance allowable to maintain TJ ≤ 150°C: RTH ( J − A)( MAX ) = (T J ( MAX ) − TA( MAX ) ) PD ( MAX ) = (150 − 70) = 110°C / W .727 This should be achievable for the SOIC-8EDP package using pcb copper area to aid in conducting the heat away, such as one square inch of copper connected to the pins of the device. Internal ground/power planes and air flow will also assist in removing heat. For higher ambient temperatures it may be necessary to use additional copper area. Noise immunity: in very electrically noisy environments, it is recommended that 0.1µF ceramic capacitors be placed from IN to GND and OUT to GND as close to the device pins as possible. External voltage selection resistors: the use of 1% resistors, and designing for a current flow ≥ 10µA is recommended to ensure a well regulated output (thus R2 ≤ 120kΩ). 2004 Semtech Corp. 6 www.semtech.com SC4205 POWER MANAGEMENT Outline Drawing - SOIC-8EDP Land Pattern - SOIC-8EDP 2004 Semtech Corp. 7 www.semtech.com SC4205 POWER MANAGEMENT Contact Information Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804 2004 Semtech Corp. 8 www.semtech.com