Programmable Analog Functions

AND8413/D
Former Catalyst Document Number AN7
Programmable Analog
Functions
Abstract
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Analog circuits are made programmable by using digital
potentiometers (POTs) to vary the key circuit parameters.
This application note provides the analog design engineer
with basic reference designs and circuit ideas for controlling
the key parameters of analog circuits using digital POTs
connected to a computer bus or microcontroller.
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APPLICATION NOTE
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Bringing Digital to the Analog World
Programmable Voltage Amplifier
Programmable Instrumentation Amplifier
Programmable Dual-Gain Amplifiers
Programmable Square Wave Oscillator (555)
Programmable Duty Cycle
Programmable Bandpass Filter
Programmable Voltage Regulator
Programmable Current Source/Sink
Programmable Schmitt Triggers
Programmable Transimpedance Amplifier
BRINGING DIGITAL TO THE ANALOG WORLD
The potentiometer is a three-terminal, variable, resistive
divider analog device. It is used primarily to control,
regulate, or adjust a characteristic or parameter of an analog
circuit. The changing of the potentiometer’s wiper’s
position along the resistive divider provides the variability
in a circuit. As opposed to the mechanical potentiometer
where the control of the mechanical potentiometer’s wiper
is physical, the control of the electronic potentiometer’s
wiper is digital. The digital control signals of the electronic
potentiometer are commonly connected to a computer bus
where the computer’s power of high speed programming,
control, and computation are brought to bear in the analog
circuit. The potentiometer varies an analog function; digital
signals vary the potentiometer; thus, computer generated
digital signals vary the analog function. Figure 1 illustrates
the concept of computerizing an analog function in block
diagram form. Any analog circuit whose parameters depend
on a resistance is a candidate for application of a digital POT.
The potentiometer can be configured as a two-terminal
variable resistance or a three-terminal resistance divider and
is used to control voltage, current, resistance, inductance,
capacitance, power, frequency, time, duty cycle, gain, Q,
bandwidth, etc. The mixed signal digital POT provides the
design engineer with a superior analog component that is
digitally controlled, programmable, flexible, small size, and
low weight. The digital POT provides the manufacturing
engineer with a cost effective component that has a short
programming time, is reliable, compatible with automated
assembly test techniques, and has low field service costs.
 Semiconductor Components Industries, LLC, 2013
July, 2013 − Rev. 1
VIN
ANALOG
FUNCTION
VOUT
Serial Bus
Figure 1. Programmable Analog Functions
The number of basic functions in the analog domain are
limited; they are amplification, oscillation, regulation,
filtering, and conversion and the circuits which implement
these functions are amplifiers, oscillators, regulators, filters,
and converters. The most important of these circuits is, of
course, the amplifier. These fundamental circuits are the
basic building blocks in analog systems. Typical examples
of each of these circuits will illustrate the computerization
of the analog functions. Hence, they become programmable
analog circuits. While the number of basic analog circuits
are limited, they are repeatedly and uniquely used as
building blocks to implement more advanced analog
functions at the system or end product level. The designs
feature the use of the 32-tap CAT5114 and CAT5112 digital
POTs with an increment/decrement interface in single
supply applications.
1
Publication Order Number:
AND8413/D
AND8413/D
PROGRAMMABLE VOLTAGE AMPLIFIER
The circuit in Figure 2 is a noninverting, single-supply,
voltage amplifier circuit whose voltage gain is programmed
using a digital POT. The voltage gain is established by a
traditional noninverting operational amplifier circuit and the
circuit’s lower cutoff frequency is established by a
first-order, R3C low pass filter implementing the bias
network. Variability through the movement of the wiper and
programmability through the pot’s instruction set are added
to the circuit by the ON Semiconductor digital POT.
The ac voltage gain for the circuit has the form of
Vo
Vs
+
where p reflects the proportionate position of the wiper from
one end of the pot (0) to the other end of the pot (1). The gain
versus p or wiper position, shown in Figure 3, is
logarithmic-like and is programmable from 1 to 31 for a
32-tap pot. The gain of this noninverting amplifier is
relatively stable with respect to temperature because the
gain depends on the wiper position and not RPOT. The
temperature dependence of RPOT is relatively high and is not
guaranteed. The amplifier’s lower cutoff frequency fC is
established by the input R3-C network:
G o jw
fc +
jw ) w c
wc
2P
+
1
2PǒR 3ń2ǓC
G0 is the programmable closed-loop passband gain
G0 + 1 )
R2
R1
+1)
(1 * p)R POT
pR POT
+
1
p
0 v p v 1, 1 v G v 31
R3
R3
100 kW
100 kW
+5 V
VS
+
C
0.1 mF
−
VO
+5 V
CAT5114
(1−p) RPOT
R2
p RPOT
R1
CLGE
Figure 2. Programmable Voltage Amplifier
Voltage
Gain
1......P
(32......Tap)
Figure 3. Gain versus Wiper Setting
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+ 32 Hz
AND8413/D
PROGRAMMABLE INSTRUMENTATION AMPLIFIER
The circuit in Figure 4 is a three-amplifier
implementation of an instrumentation amplifier in a
single-supply circuit. The implementation, in essence,
consists of two noninverting amplifiers (A1 and A2) and a
differential amplifier (A3). The voltage gain of the circuit is
programmed by a digital POT R1 and is given as
Vo
V2 * V1
+1)
R1 is configured as a variable resistance. The practical
gain for the amplifier with a 32 tap digital POT varies from
2 to about 25. For higher resolution and higher gain
applications, the 100 tap version of the digital POT should
be used.
The instrumentation amplifier is ideally suited for bridge,
sensor, and data acquisition amplifier applications where
high gain, high common mode rejection ratio and high input
resistance are required.
10 kW
R1
3
V1
(−)
2
+
A1
R3
1
R4
−
+5 V
Digital
POT
+5 V
U/D
INC
CS
R1
9
R2
10
R2
6
V2
(+)
5
−
A2
R3
7
−
4
+
A3
11
VO
8
R4
+
+2.5 V
A1 = A2 = A3 = 1/4 LM 6064
R2 = R3 = R4 = 5 kW
RPOT = 10 kW
Figure 4. Programmable Instrumentation Amplifier
PROGRAMMABLE DUAL-GAIN AMPLIFIERS
The circuit in Figure 5 is an inverting amplifier and, for a
given potentiometer setting, has two values of gain; one for
positive input voltages (VO1/VS) and the other for negative
input voltages (VO2/VS). The steering diodes D1 and D2 of
this circuit establish the polarity of the output voltages and
select the gain channel. For single supply circuits, the use of
Schottky diodes extends the useable output voltage range.
The diodes are within the closed loop and do not impact the
value of the gain. The circuit gains in terms of the
programming of the digital POT 1 are
V O1
VS
+ G1 + *
(1 * p)R POT
R
where p varies from 0 to 1 and represents the relative pot
setting and RPOT represents the end to end resistance. For the
values shown in the schematic of this single supply circuit,
the gains are individually programmable from 0 to −10.
They are however complementary, i.e., there sum equals
−10.
The transfer characteristic (VO versus VS) in Figure 6
illustrates graphically the programmable dual-gain aspect of
the circuit. Figure 7 shows another version of the dual gain
amplifier. This version uses a second potentiometer and
provides independent values of gain for each polarity of the
input voltage.
for V S u 0
and
V O2
VS
+ G2 + *
(p)R POT
R
for V S t 0
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AND8413/D
+5 V
VO2
}
}
SERIAL
BUS
p RPOT
(1−p) RPOT
D2
+5 V
2
VS
R
1 kW
3
−
+
A1
4
1
11
D1
+2.5 V
VO1
A1 = 1/4 LM6064
Figure 5. Dual Gain Amplifier
VO
increasing p
G2
VS
G1
increasing p
Figure 6. Transfer Characteristic
VS
VO1
VO2
−
+
Figure 7. Dual Independent Gain Amplifier
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AND8413/D
PROGRAMMABLE SQUARE WAVE OSCILLATOR (555)
For R1 = R2 = 0, RPOT = 10 kW, and C = 0.01 mF,
The circuit in Figure 8 is a square wave oscillator with
programmable control of frequency (fOSC) and duty cycle
(DC). The circuit uses the ubiquitous 555 timer IC
connected in the astable mode and ON Semiconductor’s
CAT5114 digital POT. For this traditional configuration,
resistances RA and RB and capacitor C establish the
frequency of oscillation and duty cycle. They are given as
f OSC +
1.44
ǒR A ) 2R BǓC
, DC +
7.20 kHz v f OSC v 14.4 kHz and 0.5 v DC v 1.
The nominal value of fOSC is 10.8 kHz with about a 33%
adjustment range. The duty cycle is fully adjustable.
If R1 = R2 = RPOT = 10 kW and C = 0.003 mF,
9.66 kHz v f OSC v 12.0 kHz and 0.6 v DC v 0.75
RA ) RB
The nominal value of fOSC is again 10.8 kHz but with a
20% adjustment range. The adjustment of the duty cycle is
limited in this case from 0.6 to 0.75. The desired
programming resolution for frequency of oscillation and
duty cycle can be achieved either through the
potentiometer’s number of taps (programming steps) or the
use of R1 and R2.
The circuit uses ON Semiconductor’s CAT5114 32-tap
digital POT. This circuit can be used as a general purpose,
programmable oscillator or the oscillator circuit with its
simple, asynchronous increment/decrement interface can be
used as a building block in real time, closed-loop feedback
type applications.
R A ) 2R B
If RA and RB are replaced by R1, R2, and the potentiometer
resistances pRPOT (wiper resistance to one end) and (1−p)
RPOT (wiper resistance to the other end),
DC +
R 1 ) R 2 ) R POT
R 1 ) 2R 2 ) R POT (2 * P)
The factor p is a dimensionless number that reflects the
relative position of the wiper from one end (0) of the
potentiometer to the other end (1) and RPOT is the pot’s
end-to-end resistance. The role of resistors R1 and R2 is to
control the range over which the frequency and duty cycle
can be adjusted. The larger R1 and R2 are relative to the
RPOT, the greater the ‘effective’ resolution but the narrower
the range of adjustment. The greatest range of adjustment
occurs for R1 = R2 = 0. For this case,
f OSC +
1.44
1
, DC +
(2 * p)
R POT(2 * p)C
+5 V
+5 V
8
U/D
INC
CS
2
1
7
RA
4
R1
6
3
RB
k RPOT
5
7
4
8
3
(1−k) RPOT
R2
555
6
5
2
C
0.01 mF,
0.003 mF
1
0.01 mF
Figure 8. Dual Independent Gain Amplifier
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AND8413/D
PROGRAMMABLE DUTY CYCLE
The circuit in Figure 9 is a modification of the traditional
one-comparator implementation of a square wave oscillator.
The positive feedback network establishes the upper
(+3.75 V) and lower voltage (+1.25 V) limits for the
comparator while the negative feedback network provides a
rising and falling exponential waveform. The digital POT 1
and the steering diodes D1 and D2 establish independent
charge and discharge paths for the capacitor C. Hence,
where p represents the pot’s relative (0−1) wiper setting and
RPOT represents the pot’s end to end resistance. The pot
setting programs the duty cycle for the output signal. The
total period of the square wave oscillator (Tdisch + Tcharge)
output is
T + R POT C ln 3
The oscillator’s period, and thus frequency, is constant.
For the values shown, the frequency is 910 Hz and the duty
cycle can be varied from less than 15% to more than 92%.
T disch + pR POT C ln 3
T charge + (1 * p)R POTC ln 3
D1
(1−p) RPOT
D2
p RPOT
+5 V
2
Digital POT 1
CAT5114
10 kW
−
3
C
0.1 mF
360 W
+
VO
1
20 kW
A1
20 kW
A1 = 1/2 LM393
+2.5 V
Figure 9. Programmable Duty Cycle
PROGRAMMABLE BANDPASS FILTER
The circuit in Figure 10 is a second-order, bandpass filter
whose center frequency is varied using a digital POT. The
filter is a member of the Infinite Gain Multiple Feedback
(IGMF) class which is characterized by a fixed
five-component (three RS and two CS) configuration. The
three key parameters for the bandpass filter are
characteristic or center frequency wO, passband gain AO,
and the figure of merit Q. The gain expression or transfer
function for the circuit is
VO
VS
+
+
Q+
A Osǒw 0ńQǓ
2
s 2 ) sǒw 0ńQǓ ) w 0
Ǹ
ǒR 1 ) R 2Ǔ
R 1R 2R 3
+
1
2PC
Ǹ
R3
2R 1
Ǹ
,
ǒR 1 ) R 2ǓR 3
f0
Q
+
R 1R 2R 3
+
1
2
Ǹ
ǒR 1 ) pR POTǓR 3
R 1pR POTR 3
1
PR 3C
The relative position of the wiper is mathematically
modeled as a dimensionless number p and varies from 0 (one
end of the pot) to 1 (the other end of the pot). A useable range
for p in this application is from 0.05 to 1.0.
R2 is independent of gain (A0) and bandwidth (BW) and
can be used to independently vary the center frequency f0
(and Q). Using digital POTs to vary key parameters in filters
(and other analog circuits) saves the cost of using expensive,
precision resistors and capacitors to guarantee a circuit’s
performance.
ON
Semiconductor’s
CAT5114
potentiometer has a increment/decrement asynchronous
s 2 ) ǒ2ńR 3CǓs ) ǒR 1 ) R 3ǓńR 1R 2R 3C 2
1
2PC
1
2
BW +
* sńR 1C
where
f0 +
A0 + *
ǒR 1 ) pR POTǓ
R 1pR POTR 3
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AND8413/D
For the circuit values shown, the passband gain is minus
one, the bandwidth is 3.2 kHz, and the center frequency can
be varied from 5.5 kHz to 22 kHz. For the wiper set half way,
p = 0.5, the filter’s center frequency is 7.5 kHz.
interface which lends itself to closed-loop, feedback type
applications. For example, the center frequency of the
tunable bandpass filter could be varied in a closed loop
configuration to match the frequency of an incoming
sinusoidal signal in a signal processing system.
1 mF
R1
50 kW
R3
100 kW
C1
0.001 F
+5 V
C2
VS
0.001 F
+5 V
2
3
−
+
7
6
4
VO
A1
R2
10 kW
+2.5 V
CAT5114
Figure 10. Programmable Bandpass Filter
PROGRAMMABLE VOLTAGE REGULATOR
resistors, R1 – R3, as shown in Figure 6. The voltage at the
feedback (FB) pin is the regulator’s internal reference of
1.235 V. The internal reference is within the 5 V limitation
of the analog potentiometer which does not see the high
regulator output voltage in this position. The output voltage
for this circuit is given as VO(reg) = 1.235 V{1 + R1/(R2 +
R3)}.
For VIN(unreg) of 15 V, the regulator output voltage of
Figure 6 will vary from 2.5 V to 13.5 V. Discrete resistors R1
and R2 and the potentiometer’s end-to-end resistance RPOT
are used to control the range over which the potentiometer
will program the output voltage. These resistors and the
number of taps of the digital POT are used to define the
resolution. The digital POT shown in ON Semiconductor’s
low cost, 32 tap CAT5114. This potentiometer has an
increment/decrement interface which lends itself to a
closed-loop, automated calibration procedure which saves
production test time and provides additional security. The
circuit can be used as a bias supply or programmable voltage
source.
In mixed signal systems, the compatibility of the voltages
of the analog, digital, and mixed signal devices can be an
issue when they meet in the same circuit. For example, the
LP2952 in Figure 11 is one of a series of voltage regulators
designed for analog output voltages from 1.2 V to 30 V. The
regulator also has digital controls in the form of an input
digital signal for shutting down to conserve power and an
output digital signal indicating an output undervoltage
condition. The digitizing of the voltage regulator in a
processor based system can be completed by programming
the output voltage using the mixed signal, digital POT. The
digital POT brings variability to the regulator output voltage
through its analog potentiometer and programmability
through its digital control signals and serial bus. With the
2952 type regulator, system designers can use the basic
device to provide voltage regulation and use digital signals
to address power and low voltage concerns and program the
output voltage. One problem is most digital POTs are
designed for +5 V or 5 V analog systems. This problem can
be overcome by placing the variable resistance of the digital
POT in the ground leg of the regulator’s programming
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AND8413/D
100 kW
VOUT
ERROR
VO (REG)
R1
11 kW
2952
VIN (UNREG)
SHUTDOWN
1 mF
R2
820 W
+5 V
8
U/D
INC
CS
2
1
7
3
R3
10 kW
5
Control
and
Memory
POR
6.8 mF
1.23 V
FB
SD
GND
0.1 F
6
CAT5114
4
Figure 11. Programmable Voltage Regulator
PROGRAMMABLE CURRENT SOURCE/SINK
The circuit in Figure 12 is a voltage-controlled, constant
current source whose value is programmed using the
ON Semiconductor 5112 digital POT. The output current IS
= − VS / R where VS is the buffered wiper output voltage of
the digital POT. The circuit can either source (VS < 2.50 V)
or sink current (VS > 2.50 V). The source is implemented
using a summing/ differential amplifier (A1) and a voltage
follower (A2). The constant voltage VS across the constant
resistor R establishes the constant current. The A2 circuit
raises the output voltage of A1 by the amount of the load
voltage thus maintaining a constant voltage VS across R.
For the circuit values shown, the output current can be
programmed from 0 to 1 mA in 64 mA steps
R1
100 kW
CAT5112
+5 V
+5 V
−
Serial
Bus
VS
R1
100 kW
+
+5 V
2
3
+2.5 V
−
4
R
2.5 kW
1
+
IS
11
R1
100 kW
R1
100 kW
+
7
A2
−
5
6
+2.5 V
A1 = A2 = 1/4 LMC6064A
Figure 12. Programmable Current Source/Sink
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AND8413/D
PROGRAMMABLE SCHMITT TRIGGERS
The circuit in Figure 13 is a single-supply version of a
programmable Schmitt Trigger or a comparator with
hysterisis. The function is implemented using a comparator
A1 and a digital POT. The lower (VLL) and upper (VUL)
limits of the hysterisis characteristic are a function of the
relative setting of the potentiometer’s wiper and are given as
the hysterisis curve and the lower and upper limits. The two
limits are complementary, i.e. their values sum to 5 V, and
hence are not independently programmable.
The lower and upper limits of the characteristic can be
independently programmed by adding steering diodes D1
and D2 and a second potentiometer as shown in Figure 15.
For this circuit,
V LL + (1 * p)2.5 V and V UL + 2.5 V ) (p)2.5 V.
V LL + ǒ1 * p 2Ǔ2.5 V and V UL + 2.5 V ) ǒp 1Ǔ2.5 V.
where p is a dimensionless number from 0 to 1 and
represents the potentiometer wiper’s position from one end
of the pot (0) to the other end (1). The characteristic’s lower
limit can be programmed from 0 V to 2.5 V and the upper
limit can be programmed from 2.5 V to 5 V. The circuit’s
transfer characteristic (VO versus VS), Figure 14, illustrates
With ON Semiconductor’s 32 tap digital POTs, the lower
limit can be programmed from 0 to 2.5 V in 81 mV
increments and the upper limit can be independently
programmed from 2.5 V to 5 V with the same resolution.
VO
+5 V
5V
A1
LM393
VS
2
+5 V
3
360 W
−
8
+
4
VO
Serial
Bus
0
+2.5 V
Digital POT 1
CAT5114
2.5 V
5V
VS
R = RPOT = 10 kW
pR (1−p)R
VLL
Figure 13. Programmable Schmitt Trigger
VUL
Figure 14. Transfer Characteristic
+5 V
A1
LM393
VS
360 kW
−
VO
500 kW
+5 V
Serial
Bus
+2.5 V
+
D1
Digital POT 2
D2
+5 V
P2R (1−P2)R
Digital POT 1
P1R (1−P1)R
CAT5114 (2)
Figure 15. Schmitt Trigger with Independently Programmable Limits
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AND8413/D
PROGRAMMABLE TRANSIMPEDANCE AMPLIFIER
avoids the use of high value resistors in measuring low
values of current. For this circuit,
The circuit in Figure 16 is an input current (I) to output
voltage (V) convertor, or transimpedance amplifier, with
programmable gain. The circuit is a current to voltage
convertor circuit (A1) cascaded with an inverting amplifier
circuit (A2) with a common digital POT varying the gains of
the two. Transducers like photodiodes and photovoltaic
cells, with their high output impedance, are best modeled as
current sources. Their output current is typically converted
to a voltage for further signal processing.
The potentiometer resistances are modeled as pR
(= pRPOT) and (1−p)R where p is a number that varies from
0 to 1 and reflects the proportionate position of the wiper
from one end (0) of the potentiometer to the other end (1).
The programming of the location of the wiper changes the
scale factor between the input current and output voltage
without changing the values of any of the resistances and
VO
Is
+ * NJ330 W ) pRNj
1 MW
330 W ) (1 * p)10 kW
The gain of the transimpedance amplifier (VO/IS) is
pseudo-logarithmic and varies from 31kW to 31MW as p is
varied from 0 to 1. With these resistances, over four decades
of current can be measured from less than 6 nA to over
60 mA. The circuit usWs the low cost, 32 tap
ON Semiconductor CAT5114 with a increment/decrement
serial interface. This simple, asynchronous interface can be
computer controlled or driven by logic and lends itself to
automated
calibration
and
test-and-measurement
procedures.
+5 V
8
2
U/D
CAT5114
1
INC
7
CS
4
pR
330 W
6
5
(1−p)R
330 W
1 MW
3
+5 V
2
3
−
+
7
4
+5 V
10 kW
6
2
3
A1
−
7
+
4
IS
LT1097
+2.5 V
Figure 16. Programmable I to V Convertor
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A2
VO
AND8413/D
REFERENCES
[1] “Op Amp Network Design” by John R. Hufault, John Wiley and Sons, New York, 1986, pp. 102, 103
[2] “Operational Amplifiers” by Charles F. Wojslaw and Evangelos A. Moustakas, John Wiley and Sons, New York,
1986
[3] “IC Op Amp Cookbook” by Walter G. Jung, Howard Sams, Indianapolis, 1979
[4] “Operational Amplifiers” by G.B. Clayton, Butterworth Scientific, London, 1982
[5] “Linear Potentiometer Implements Logarithmic Gain” by W. Stephen Woodward, EDN, October, 23, 1997
[6] “PWM Circuit uses One Op Amp” by Ferran Bayes, EDN, July 6, 2000
[7] “Decompensated Op Amp Gain is Adjustable from Zero to Open-Loop” by Stephen Woodward, ED, June 4, 2001
[8] “Bipolar Single-supply Schmitt Trigger Extends DPM Range” by Andrea Sosso, ED, October 16, 2000
[9] “Building the Analog Tool Kit”, Signal Conditioning Seminar, Texas Instruments Publication, 2001
[10] “Linear Applications Handbook, Volume III”, Linear Technology Publication, 1997
[11] “Digital Potentiometer Controls AGC Circuit” by Tavares, Tavares, and Piedade, EDN, August 3, 2000
[12] “RTD Auto-nulling Delta-T Thermometer” by Stephen Woodward, ED, June 28, 1999
[13] “IC Timer Cookbook” by Walter G. Jung, Howard Sams and Co.
[14] LP2952/53 Voltage Regulator Data Sheets, National Semiconductor Publication
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