Octal D-Type Latch with 3-State Outputs

MC74AC564
MC74ACT564
Octal D-Type Latch
with 3-State Outputs
The MC74AC564/74ACT564 is a high-speed, low power octal
flip-flop with a buffered common Clock (CP) and a buffered
common Output Enable (OE).
The information presented to the D inputs is stored in the flip-flops
on the LOW-to-HIGH Clock (CP) transition.
The MC74AC564/74ACT564 device is functionally identical to
the MC74AC574/74ACT574, but with inverted outputs.
• Inputs and Outputs on Opposite Sides of Package Allowing Easy
Interface with Microprocessors
• Useful as Input or Output Port for Microprocessors
• Functionally Identical to MC74AC574/74ACT574 but with Inverted
Outputs
• 3-State Outputs for Bus-Oriented Applications
• Outputs Source/Sink 24 mA
• ′ACT564 Has TTL Compatible Inputs
VCC
O0
O1
O2
O3
O4
O5
O6
O7
CP
20
19
18
17
16
15
14
13
12
11
OCTAL D-TYPE
LATCH WITH
3-STATE OUTPUTS
N SUFFIX
CASE 738-03
PLASTIC
DW SUFFIX
CASE 751D-04
PLASTIC
1
2
3
4
5
6
7
8
9
10
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
Figure 1. Pinout: 20−Lead Packages Conductors
(Top View)
PIN NAMES
D0−D7
CP
OE
O0−O7
D0 D1 D2 D3 D4 D5 D6 D7
CP
Data Inputs
Clock Pulse Input
3-State Output Enable Input
3-State Outputs
OE
O0 O1 O2 O3 O4 O5 O6 O7
Figure 2. LOGIC SYMBOL
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 5
1
Publication Order Number:
MC74AC564/D
MC74AC564 MC74ACT564
FUNCTIONAL DESCRIPTION
The MC74AC564/74ACT564 consists of eight edgetriggered flip-flops with individual D-type inputs and
3-state complementary outputs. The buffered clock and
buffered Output Enable are common to all flip-flops. The
eight flip-flops will store the state of their individual D
inputs that meet the setup and hold times requirements on
the LOW-to-HIGH Clock (CP) transition. With the Output
Enable (OE) LOW, the contents of the eight flip-flops are
available at the outputs. When OE is HIGH, the outputs go
to the high impedance state. Operation of the OE input does
not affect the state of the flip-flops.
FUNCTION TABLE
Inputs
Internal
Outputs
OE
CP
D
Q
O
H
H
H
H
L
L
L
L
H
H
L
H
L
H
L
H
L
H
NC
NC
H
L
H
L
NC
NC
Z
Z
Z
Z
H
L
NC
NC
H
H
Function
Hold
Hold
Load
Load
Data Available
Data Available
No Change in Data
No Change in Data
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Transition
NC = No Change
D0
D1
D2
D3
D4
D5
D6
D7
CP
C
D
C
D
C
D
C
D
C
D
C
D
C
D
C
Q
Q
Q
Q
Q
Q
Q
Q
O0
O1
O2
O3
O4
O5
O6
O7
OE
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
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D
MC74AC564 MC74ACT564
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
−0.5 to +7.0
V
Vin
DC Input Voltage (Referenced to GND)
−0.5 to VCC +0.5
V
Vout
DC Output Voltage (Referenced to GND)
−0.5 to VCC +0.5
V
Iin
DC Input Current, per Pin
±20
mA
Iout
DC Output Sink/Source Current, per Pin
±50
mA
ICC
DC VCC or GND Current per Output Pin
±50
mA
Tstg
Storage Temperature
−65 to +150
°C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended
Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
Supply Voltage
Vin, Vout
DC Input Voltage, Output Voltage (Ref. to GND)
tr, tf
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
tr, tf
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
TJ
Junction Temperature (PDIP)
TA
Operating Ambient Temperature Range
IOH
IOL
Min
Typ
Max
′AC
2.0
5.0
6.0
′ACT
4.5
5.0
5.5
0
VCC
VCC @ 3.0 V
150
VCC @ 4.5 V
40
VCC @ 5.5 V
25
VCC @ 4.5 V
10
VCC @ 5.5 V
8.0
Unit
V
V
ns/V
ns/V
140
°C
85
°C
Output Current — High
−24
mA
Output Current — Low
24
mA
−40
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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25
MC74AC564 MC74ACT564
DC CHARACTERISTICS
Symbol
Parameter
VCC
(V)
74AC
74AC
TA = +25°C
TA =
−40°C to
+85°C
Typ
Unit
Conditions
Guaranteed Limits
VIH
Minimum High Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
VOUT = 0.1 V
or VCC − 0.1 V
VIL
Maximum Low Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
VOUT = 0.1 V
or VCC − 0.1 V
VOH
Minimum High Level
Output Voltage
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
V
2.56
3.86
4.86
2.46
3.76
4.76
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
3.0
4.5
5.5
VOL
Maximum Low Level
Output Voltage
3.0
4.5
5.5
0.002
0.001
0.001
V
V
IOUT = −50 μA
*VIN = VIL or VIH
−12 mA
IOH
−24 mA
−24 mA
IOUT = 50 μA
V
*VIN = VIL or VIH
12 mA
IOL
24 mA
24 mA
IIN
Maximum Input
Leakage Current
5.5
±0.1
±1.0
μA
VI = VCC, GND
IOZ
Maximum
3-State
Current
5.5
±0.5
±5.0
μA
VI (OE) = VIL, VIH
VI = VCC, GND
VO = VCC, GND
5.5
75
mA
VOLD = 1.65 V Max
5.5
−75
mA
VOHD = 3.85 V Min
80
μA
VIN = VCC or GND
IOLD
IOHD
ICC
†Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
5.5
8.0
* All outputs loaded; thresholds on input associated with output under test.
† Maximum test duration 2.0 ms, one output loaded at a time.
Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
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MC74AC564 MC74ACT564
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
Symbol
VCC*
(V)
Parameter
Min
74AC
74AC
TA = +25°C
CL = 50 pF
TA = −40°C
to +85°C
CL = 50 pF
Typ
Max
Min
Unit
Fig.
No.
MHz
3-3
Max
fmax
Maximum Clock
Frequency
3.3
5.0
75
95
60
85
tPLH
Propagation Delay
CP to On
3.3
5.0
3.5
2.0
14.0
10.5
3.5
2.0
15.5
11.5
ns
3-6
tPHL
Propagation Delay
CP to On
3.3
5.0
3.5
2.0
12.5
9.5
3.5
2.0
14.0
10.5
ns
3-6
tPZH
Output Enable Time
3.3
5.0
2.5
2.0
11.5
9.0
2.5
2.0
12.5
9.5
ns
3-7
tPZL
Output Enable Time
3.3
5.0
3.0
1.5
11.0
8.5
3.5
2.0
12.0
9.5
ns
3-8
tPHZ
Output Disable Time
3.3
5.0
4.0
2.0
12.5
10.5
4.5
2.0
13.5
11.5
ns
3-7
tPLZ
Output Disable Time
3.3
5.0
2.0
1.5
9.5
8.0
2.5
1.5
10.5
9.0
ns
3-8
Unit
Fig.
No.
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
AC OPERATING REQUIREMENTS
Symbol
VCC*
(V)
Parameter
Typ
74AC
74AC
TA = +25°C
CL = 50 pF
TA = −40°C
to +85°C
CL = 50 pF
Guaranteed Minimum
ts
Setup Time, HIGH or LOW
Dn to CP
3.3
5.0
2.5
2.0
3.0
2.5
ns
3-9
th
Hold Time, HIGH or LOW
Dn to CP
3.3
5.0
2.0
2.0
2.0
2.0
ns
3-9
tw
CP Pulse Width
HIGH or LOW
3.3
5.0
6.0
4.0
7.0
5.0
ns
3-6
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
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MC74AC564 MC74ACT564
DC CHARACTERISTICS
Symbol
Parameter
VCC
(V)
74ACT
74ACT
TA = +25°C
TA =
−40°C to
+85°C
Typ
Guaranteed Limits
Unit
Conditions
VIH
Minimum High Level
Input Voltage
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
VOUT = 0.1 V
or VCC − 0.1 V
VIL
Maximum Low Level
Input Voltage
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
VOUT = 0.1 V
or VCC − 0.1 V
VOH
Minimum High Level
Output Voltage
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
V
3.86
4.86
3.76
4.76
0.1
0.1
0.1
0.1
4.5
5.5
0.36
0.36
0.44
0.44
V
*VIN = VIL or VIH
24 mA
IOL
24 mA
±0.1
±1.0
μA
VI = VCC, GND
1.5
mA
VI = VCC − 2.1 V
±5.0
μA
VI (OE) = VIL, VIH
VI = VCC, GND
VO = VCC, GND
5.5
75
mA
VOLD = 1.65 V Max
5.5
−75
mA
VOHD = 3.85 V Min
80
μA
VIN = VCC or GND
4.5
5.5
VOL
4.5
5.5
Maximum Low Level
Output Voltage
IIN
Maximum Input
Leakage Current
5.5
ΔICCT
Additional Max. ICC/Input
5.5
IOZ
Maximum
3-State
Current
5.5
IOLD
IOHD
ICC
†Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
0.001
0.001
0.6
±0.5
5.5
8.0
IOUT = −50 μA
*VIN = VIL or VIH
−24 mA
IOH
−24 mA
V
IOUT = 50 μA
V
* All outputs loaded; thresholds on input associated with output under test.
† Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
Symbol
VCC*
(V)
Parameter
Min
74ACT
74ACT
TA = +25°C
CL = 50 pF
TA = −40°C
to +85°C
CL = 50 pF
Typ
Max
Min
Unit
Fig.
No.
MHz
3-3
Max
fmax
Maximum Clock
Frequency
5.0
85
tPLH
Propagation Delay
CP to On
5.0
2.0
10.5
1.5
11.5
ns
3-6
tPHL
Propagation Delay
CP to On
5.0
1.5
9.5
1.5
10.5
ns
3-6
tPZH
Output Enable Time
5.0
1.5
9.0
1.5
9.5
ns
3-7
tPZL
Output Enable Time
5.0
1.5
8.5
1.0
9.5
ns
3-8
tPHZ
Output Disable Time
5.0
1.5
10.5
1.5
11.5
ns
3-7
tPLZ
Output Disable Time
5.0
1.5
8.0
1.0
8.5
ns
3-8
* Voltage Range 5.0 V is 5.0 V ±0.5 V.
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75
MC74AC564 MC74ACT564
AC OPERATING REQUIREMENTS
Symbol
VCC*
(V)
Parameter
74ACT
74ACT
TA = +25°C
CL = 50 pF
TA = −40°C
to +85°C
CL = 50 pF
Typ
Unit
Fig.
No.
Guaranteed Minimum
ts
Setup Time, HIGH or LOW
Dn to CP
5.0
2.5
3.0
ns
3-9
th
Hold Time, HIGH or LOW
Dn to CP
5.0
1.0
1.0
ns
3-9
tw
LE Pulse Width
HIGH or LOW
5.0
3.0
3.5
ns
3-6
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
* Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol
Parameter
Value
Typ
Unit
Test Conditions
CIN
Input Capacitance
4.5
pF
VCC = 5.0 V
CPD
Power Dissipation Capacitance
50
pF
VCC = 5.0 V
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7
MC74AC564 MC74ACT564
OUTLINE DIMENSIONS
N SUFFIX
PLASTIC DIP PACKAGE
CASE 738−03
ISSUE E
−A−
20
11
1
10
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
B
L
C
−T−
K
SEATING
PLANE
G
M
N
E
F
D
J
0.25 (0.010)
20 PL
0.25 (0.010)
20 PL
M
T A
M
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8
M
T B
M
DIM
A
B
C
D
E
F
G
J
K
L
M
N
INCHES
MIN
MAX
1.010
1.070
0.240
0.260
0.150
0.180
0.015
0.022
0.050 BSC
0.050
0.070
0.100 BSC
0.008
0.015
0.110
0.140
0.300 BSC
0_
15_
0.020
0.040
MILLIMETERS
MIN
MAX
25.66
27.17
6.10
6.60
3.81
4.57
0.39
0.55
1.27 BSC
1.27
1.77
2.54 BSC
0.21
0.38
2.80
3.55
7.62 BSC
0_
15_
0.51
1.01
MC74AC564 MC74ACT564
OUTLINE DIMENSIONS
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D−04
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−A−
20
11
−B−
10X
P
0.010 (0.25)
1
M
B
M
10
20X
J
D
0.010 (0.25)
M
T A
B
S
S
F
R
X 45 _
C
−T−
18X
G
SEATING
PLANE
M
K
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
12.65
12.95
7.40
7.60
2.35
2.65
0.35
0.49
0.50
0.90
1.27 BSC
0.25
0.32
0.10
0.25
0_
7_
10.05
10.55
0.25
0.75
INCHES
MIN
MAX
0.499
0.510
0.292
0.299
0.093
0.104
0.014
0.019
0.020
0.035
0.050 BSC
0.010
0.012
0.004
0.009
0_
7_
0.395
0.415
0.010
0.029
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