Using the Enable Pin in a Linear Regulator as a Voltage Supervisor

AND8239/D
Using the Enable Pin in a
Linear Regulator as a
Voltage Supervisor
Prepared by: William Lepkowski
ON Semiconductor
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APPLICATION NOTE
INTRODUCTION
provide a safe and ordered startup. Unlike the supervisor
solution, this circuit does not immediately shutdown the
output once it drops below an unacceptable level.
Furthermore, since the delay starts directly after the enable
pin goes high, there is no insurance that the output will be at
the desired regulated output voltage. The circuit proposed in
Figure 3 fixes the problems of Figure 2 by cleverly replacing
the single resister with a resister divider network.
The combination of a voltage regulator and a voltage
supervisor, shown in Figure 1, is a popular circuit
configuration. The addition of the supervisor ensures that the
regulated output turns on and off at sufficient input voltages,
as well as giving the system the luxury of a safe and ordered
startup. An inexpensive alternative, shown in Figure 2, uses
the enable pin of a regulator and an external delay network to
Vin
Vin
Cin
LDO
Voltage
Regulator
Vout
VDD
Cout
mP
GND
Vin
Reset
Voltage
Supervisor
INT
GND
Figure 1. A voltage supervisor can be used with a voltage
regulator to ensure a controlled regulated output.
Vin
Vin
D1
R1
Cin
Vout
Vout
NCP500
Enable
GND
Cout
CD
Figure 2. Resistor R1, capacitor C1 and diode D1 provide a
startup delay for the voltage regulator’s enable pin.
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September, 2005 − Rev. 0
1
Publication Order Number:
AND8239/D
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Vin
Vin
D1
R1
Cin
NCP500
Enable
R2
VDD
Vout
GND
mP
Cout
CD
Figure 3. Resistor R2 serves to raise the switching threshold of the
voltage regulator’s enable pin. This circuit also has the advantage of
not requiring an interrupt pin on the microprocessor.
Circuit Description
The purpose of the resistor divider of Figure 3 is to “trick”
the enable pin into turning on at a higher voltage. In most
regulators, such as the NCP500, the enable pin is set to a
voltage well below the nominal output. As a result, the
output will track the input voltage when the enable pin
switches from a logic low to logic high. The output and input
voltages will be almost identical until the input voltages
increases to a level above the dropout voltage of the
regulator.
Figure 4 shows a simplified internal diagram of the
NCP500 linear voltage regulator. The NCP500 uses a
P−channel MOSFET to achieve a low drop out voltage. In
addition, the NCP500 contains overcurrent and thermal
protection circuits, along with an enable circuit. The enable
pin can be used to shutdown the output voltage for power
saving modes and to control the powerup and powerdown
characteristic of the device. The enable circuit consists of a
voltage comparator that determines when the voltage at the
enable pin is either larger or smaller than the magnitude of
the reference voltage (VREF). The two resistors of the enable
circuit determine the hysteresis of the comparator and
account for the difference in the switching threshold voltage
between the rising and falling voltage.
Vout
Vin
Feedback
Network
Thermal
Shutdown
Driver with
Current Limit
Enable
+
−
+
− Vref
+
−
+
− Vref
GND
Enable
Circuit
NCP500
Figure 4. Block Diagram of the NCP500 Voltage Regulator
The values of resistors R1 and R2 needed to change the
threshold voltage of Figure 3’s enable pin can be determined
VIN(TURN−ON) + [(2
with the equation (1). Figure 3’s circuit was tested with
values of 27 kW and 8.0 kW for R1 and R2 respectively.
VEN(RISING)) * VEN(FALLING)]
ǒ1 ) RR1Ǔ
2
Example:
VIN(TURN−ON) =4.0 V
VEN(RISING) =0.89 V (Taken from Figure 5)
VEN(FALLING) =0.85 V (Taken from Figure 5)
where:
VIN(TURN−ON) =The user defined turn−on voltage. It is
suggested that minimum VIN(TURN−ON)
should be set to VOUT + VDROPOUT to
prevent tracking.
VEN(RISING) =The enable pin’s rising trip point.
VEN(FALLING) =The enable pin’s falling trip point.
VDROPOUT =The regulators dropout voltage.
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(eq. 1)
AND8239/D
R1
^
R2
((2
VIN(TURN−ON)
*1+
((2
VEN(RISING)) * VEN(FALLING))
Select R2 + 8 kW, then R1 + 3.3
4.0
* 1 + 3.3
0.89) * 0.85)
(eq. 2)
R2 ^ 27 kW.
The delayed input provided by the voltage supervisor is
useful for applications dealing with microprocessors. It
ensures that the system has a safe and ordered startup before
turning on. The circuit in Figure 3 provides a similar
function as a voltage supervisor IC by combining the
external setup in Figure 2 with the resister divider calculated
in Equation 1. The user can define the appropriate delay
time based on their application by using R1 and CD as the RC
time constant. A diode is added in parallel across R1 to
quickly discharge CD if the voltage falls below the “new”
enable threshold formed by R1 and R2.
Special attention in particular should be paid to R1, since
it along with CD will determine the turn−on delay time for
the regulator. Ideally the value of CD should be in the range
of 0.01 mF and 0.47 mF. A larger magnitude capacitor will
increase the discharge time. Hence, a large capacitor reduces
the effectiveness of this circuit to function as a voltage
supervisor. Moreover, a smaller capacitance requires less
board space.
The following table compares the features of four
different controlled output solutions using a voltage
regulator. Another possible solution, not shown, combines
a voltage regulator with a voltage detector. Detectors are
very similar to supervisors; however, a supervisor contains
an integrated powerup delay circuit.
It is important to note that Equation 1 only approximates
the value of the resistor divider. In the case of the NCP500,
the approximation is fairly accurate. In other voltage
regulators, the results may vary slightly. The only time a
problem will be noticed though, is if the resistor divider is
not large enough. This can be easily fixed by increasing the
value of R1. However, it is also important to note that since
VIN(TURN−ON) is directly proportional to R1, increasing R1
will increase VIN(TURN−ON).
In the data sheet the enable thresholds are usually
specified in one of two ways: a minimum and maximum
range guaranteed by design or with typical values that go
along with the minimum and maximum range. For most
applications, the typical threshold values will be more
applicable. If the threshold values are not specified, they can
be easily found by testing a few parts beforehand. It should
also be stressed that Equation 1 is not dependent on just the
value of the rising threshold. The rising threshold itself does
not take into account the hysteresis, VEN(RISING) −
VEN(FALLING), of the enable pin’s comparator circuit.
Without adding the value of the hysteresis to the value of the
rising threshold, there would be no guarantee that the output
would turn−off at the proper value.
Table 1. Voltage Regulator Solutions
Circuit
Advantages
Voltage Regulator
with enable pin
•
Voltage Regulator
with input delay
(R1, CD, and D1)
•
Voltage Regulator +
Voltage Supervisor
•
•
•
•
Voltage Regulator
with input delay and
resistor divider
(R1, R2, CD, and D1)
•
•
•
•
•
Disadvantages
•
•
Enable pin saves power
consumption
•
Turns on at VOUT(NOMINAL)
(assuming sufficient delay time)
•
•
Turns on at VOUT(NOMIMAL)
Delay at powerup
•
Warning signal prior to shutdown
No delay at powerup
Reference Figures
Figure 5
VOUT tracks VIN on rising and falling
edges
No safety feature to ensure that
delay time is sufficient
Figure 2
Figure 6
VOUT tracks VIN on falling edge
Requires an interrupt pin on the
microprocessor
Figure 1
2 IC solution
Turns off immediately after
insufficient VIN
•
•
Low cost solution
Does not require extra pin on
microprocessor
Requires four discrete parts
No warning signal prior to shutdown
Turns on at VOUT(NOMIMAL)
Delay at powerup
Turns off immediately after
insufficient VIN
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Figure 3
Figure 7
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Test Results
Figure 5 shows the output of the NCP500 linear regulator
configured with the enable pin connected to VIN. The points
of inflection on the output voltage curve represent the enable
trip points. It is clear that the output is tracking the input on
both the rising and falling edges. Figure 6 shows the
improvement of adding the external delay network on the
rising edge. The falling edge of the output, nonetheless, still
continues to track to the input voltage.
Figure 5. Regulator circuits that connect the enable pin to the input
voltage have a problem. The output voltage will track the input voltage
during the turn−on and turn−off time of the regulator.
Figure 6. Adding the circuitry in Figure 2 eliminates the
problem of the output tracking on the rising edge.
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AND8239/D
eliminating the requirement of an extra pin on the
microprocessor. The only thing that this circuit lacks in
performance in comparison to the supervisor solution is its
lack of a waning signal.
Figure 7 shows further improvement when resistor R2 is
added to the delay network. The schematic of this circuit is
shown in Figure 3. It is evident that the output now turns on
and off appropriately and that a sufficient delay has been
provided. Furthermore, this solution offers the advantage of
Figure 7. The circuit in Figure 3 turns on only after a sufficient
input voltage is reached and shuts down immediately after the
input becomes insufficient.
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