LED Driver, 1-Channel

Ordering number : ENA2132
LV5029MD
Bi-CMOS IC
LED Driver IC for LED Lighting
http://onsemi.com
Overview
LV5029MD is a High voltage LED drive controller which drives LED current with external MOSFET.
LV5029MD is realized very simple LED circuits with a few external parts. It corresponds to active power factor
corrector control.
Note) This LV5029MD is designed or developed for general use or consumer appliance. Therefore, it is NOT permitted
to use for automotive, communication, office equipment, and industrial equipment.
Functions
• High voltage LED controller
• Various Dimming Control
-Analog Input & PWM Input
• Selectable Switching frequency
[50 kHz or 70 kHz, open: 50 kHz]
• Built-in overvoltage detection of CS pin.
• Built-in active power factor corrector.
• Short protection circuit
• Selectable reference Voltage
-Internal 0.605V & External Input Voltage
• Low noise switching system/skip frequency function
- 5 stages skip mode Frequency
- Soft driving
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum input voltage
Symbol
Conditions
Ratings
VIN max (Note1)
REF_OUT, REF_IN, RT, CS,
Unit
-0.3 to 42
V
-0.3 to 7
V
PWM_D
OUT pin
VOUT_abs
Allowable power dissipation
Pd max
Junction temperature
Tj
150
°C
Operating junction temperature
Topj (Note2)
-30 to +125
°C
Storage temperature
Tstg
-40 to +150
°C
With specified board*
-0.3 to 42
V
1.0
W
*1 Specified board: 58.0mm × 54.0mm × 1.6mm (glass epoxy board)
Note1) Absolute maximum ratings represent the values which cannot be exceeded for any length of time.
Note2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high
voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Semiconductor Components Industries, LLC, 2013
August, 2013
O0312NK 20120913-S00012 No.A2132-1/15
LV5029MD
Recommended Operating Conditions at Ta = 25°C
Parameter
Input voltage
Symbol
Conditions
Ratings
VIN
Unit
8.5 to 24
V
* Note : supply the stabilized voltage.
Electrical Characteristics at Ta = 25°C, VIN = 12V, unless otherwise specified.
Parameter
Symbol
Ratings
Conditions
Unit
min
typ
max
0.585
0.605
0.625
Reference voltage block
Built-in reference voltage
VREF
VREF VIN line regulation
VREF_LN
VIN = 8.5 to 24V
Reference output voltage
REFOUT
IREFOUT = 0.5mA
- Maximum load
REFOUT_MAX
- equivalent output impedance
REFOUT_RO
±0.5
V
%
3.0
V
0.5
mA
Ω
10
Under voltage lockout
Operation start Input voltage
UVLOON
Operation stop input voltage
UVLOOFF
Hysteresis voltage
UVLOH
8
6.3
9
10
V
7.3
8.3
V
1.7
V
Oscillation
Frequency
FOSC1
RT =OPEN
40
50
60
kHz
FOSC2
RT = REF_OUT
55
70
85
kHz
FOSC1 Switch voltage
VOSC1
2
5
FOSC2 Switch voltage
VOSC2
V
0.5
V
Maximum ON duty
MAXDuty
93
VIO_VR
1
10
mV
VIO_RI
1
10
mV
%
Comparator
Input offset voltage
(Between CS and VREF)
Input offset voltage
(Between CS and REFIN)
Input current
IIOSC
160
IIOREF
CS pin max voltage
VOM
malfunction prevention mask
TMSK
nA
80
nA
1
150
V
ns
time
PWM_D circuit
OFF voltage
VOFF
2
5
V
ON voltage
VON
0
0.6
V
Thermal protection circuit
Thermal shutdown temperature
TSD
*Design guarantee
165
°C
Thermal shutdown hysteresis
ΔTSD
*Design guarantee
30
°C
1000
mA
Drive Circuit
OUT sink current
IOI
500
OUT source current
IOO
120
Minimum On time
TMIN
200
mA
300
ns
Continued on next page.
No.A2132-2/15
LV5029MD
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
VIN current
UVLO mode VIN current
IINOFF
VIN < UVLOON
80
Normal mode VIN current
IINON
VIN > UVLOON, OUT = OPEN
0.8
120
μA
mA
VIN over voltage protection circuit
VIN over voltage protection
voltage
VINOVP
VIN current at OVP
IINOVP
VIN = 30V
24
27
30
V
0.7
1.0
1.5
mA
CS terminal abnormal sensing circuit
Abnormal sensing voltage
CSOCP
1.9
V
*: Design guarantee (value guaranteed by design and not tested before shipment)
Package Dimensions
unit: mm (typ)
3426A
4.9
6
Allowable power dispation, Pd max - W
6.0
5
0.41
0.835
0.37
1.0
0.21
1.5
1.75 MAX
1
Pd max -- Ta
1.2
3.9
10
Spesified board: 58.0 × 54.0 × 1.6mm3
glass epoxy board
1.0
0.8
0.6
0.4
0.2
0.175
0
--30
0
30
60
90
120
150
Ambient temperature, Ta - °C
SANYO : SOIC10
Pin Assignment
1
REF_OUT
2
REF_IN
3
CS
4
PWM_D
5
LV5029
****
RT
10 GND
9
(NC)
8
VIN
7
OUT
6
GND
No.A2132-3/15
LV5029MD
Block Diagram
VIN 8
Built-in
REF_OUT 2
3V
Regulator
TSD
0.605V
+
-
OVP
Voltage
Oscillator
CS 4
REF_IN 3
UVLO
Reference
S
Q
7 OUT
R
Current Limit Comparator
Short
Protection
Circuit
GND 10
9 (NC)
1
RT
5
PWM_D
6
GND
Sample Application Circuit
Non isolation
Isolation
No.A2132-4/15
LV5029MD
Pin Functions
Pin No.
1
Pin name
RT
Pin function
Equivalent circuit
Switching frequency selection pin.
VREF-OUT
(3V typ)
L or Open : 50kHz switching,
H: 70 kHz switching.
RT
In case of 70kHz, connect to RT pin to REFOUT pin.
1kΩ
on time
GND
2
REF_OUT
Built-in 3V Regulate out Pin.
VIN
If this function isn’t used, please connect to nothing.
VREF-OUT
(3V typ)
GND
3
REF_IN
External LED current Limit Setting pin. If less than
VIN
VREF (0.61V) voltage is input, Peak current value is
used at the input voltage. If more than REF_IN voltage
is input, it is done at VREF voltage. If this function isn’t
used, please connect nothing.
CS
REF_IN
GND
4
CS
LED current sensing in. If this terminal voltage
VIN
exceeds VREF (Or REF_IN), external FET is OFF.
And if the voltage of the terminal exceeds 1.9V,
LV5029MD turns to latch-off mod
CS
REF_IN
GND
5
PWM_D
PWM Dimming pin.
L or open: normal operation,
H: Stop operation.
VIN
PWM_D
200kΩ
700kΩ
GND
6
GND
GND pin.
7
OUT
Driving the external FET Gate Pin.
8
VIN
VIN
Power supply pin. Operation
: VIN > UVLOON Stop: VIN < UVLOOFF
OUT
Switching Stop : VIN > VINOVP
GND
9
NC
Connect to nothing
10
GND
GND pin.
No.A2132-5/15
LV5029MD
LED current and inductance setting
• Relation ship between REF_IN and CS pin voltage (Power Factor Correction (PFC))
The output current value is the average of the current value that flows during one cycle. The current value that flows into
coil is a triangular wave shown in the figure below. Make sure to set Ipk so that (average of current value at one cycle)
is equal to (LED current value).Ipk is set by the relationship between REF_IN voltage and Rcs voltage.
This relationship make Power Factor Correction (PFC).Therefore, it is available to make LED current a sine curve.
• Setting Zener voltage
Vzd depend on LED voltage (VF). Choose Zener diode around Vf (LED voltage).When VAC voltage is lower than Vf,
LED operation is not normal. Using Zener diode prevents incorrect operating during VAC voltage lower than Vf. In
detail, refer to [LED current and inductance setting]
In case of REF_IN pin open, this error amplifier negative input(-) is under control of internal VREF voltage
(0.605Vtyp).
FET current
Vac
a blockdiagram in outline
VREF (0.605V typ)
L
R1
CLK
Vzd
REF_IN
Q
FET current
RESET
+
-
CS
REF_IN
OUT
T
ON
VREF
(0.605V typ)
FET
R2
Rcs
Ton
Ipk =
Toff
OFF
R2
(Vac-Vzd)× R1+R2
Rcs
Ipk: peak inductor current
Vf: LED forward voltage drop
Vac: effective value, R.M.S value
VREF: Built-in reference voltage (0.605V)
VREF_IN: REF_IN voltage (6 pin)
Rs: External sense resistor
Vzd: Zener diode voltage (REF_IN pin)
LED current and inductance setting
It is available to use both no-isolation and isolation applications.
(For non-isolation application)
The output current value is the average of the current value that flows during one cycle. The current value that flows into
coil is a triangular wave shown in the figure below. Make sure to set IL_PK so that (average of current value at one cycle)
is equal to (LED current value).
Inductor current
Vac
Vac
REF_IN
VREF (0.605V typ)/built-in reference
LED
a blockdiagram in outline
L
ILED slope is proportion to
Vac voltage (REF pin voltage)
R1
CLK
Vzd
REF_IN
CS
+
-
Q
RESET
OUT
T
ON
FET
OFF
VREF
(0.605V typ)
R2
Ipk = (Vac-Vf)/L × T_c
= Vf/L × T_d
Rcs
Ipk
IL = Vac/L × T
IL = Vf/L × T
Inductor
current
T_c
FET_on
T_d
FET_off
T (1cycle)
No.A2132-6/15
LV5029MD
Given that the period when current flows into coil is
T_c+T_d
DutyI =
T
1
Ipk × 2 × (Duty × T)/T = ILED
2 × ILED
VREF_IN
Ipk × DutyI
(1) since Ipk × Rcs
VFEF_IN DutyI × VFEF_IN
=
(2)
Rcs ×
2ILED
Ipk
Ipk: peak inductor current
Vf: LED forward voltage drop
Vac: effective value(R.M.S value)
VREF: Built-in reference voltage (0.605V)
VREF_IN: REF_IN voltage (6 pin)
Rs: External sense resistor
Vzd: Zener diode voltage (REF_IN pin)
Since formula for LED current is different between on period and off period as shown above,
Vƒ
Vac-Vƒ
L × T_c = L × T_d (3)
Since T_c + T_d = DutyI × T, T_c = DutyI × T - T_d (4)
Vac-Vƒ
(5)
Based on the result of (3) and (4), T_d = DutyI × T × Vac
To obtain L from the equation (1), (3), (5),
Ipk ×
Vƒ × DutyI
Vac - Vƒ
Vƒ
1
Vac - Vƒ
× DutyI × T = Vac =
×
× Vac × (DutyI)2 (6)
2 × ILED
2 × ILED ƒosc
Since LED and inductor are connected in serial in non-isolation mode, LED current flows only when AC voltage exceed
VF.
L×
√2 × Vrms
VF
Vac
(AC voltage, R.M.S)
Inductor current
Arcsin (Vf/√2Vrms)
Arcsin (Vf/√2Vrms)
Arcsin (√2Vrms/√2Vrms)
=90 (Deg)
Given that the ratio of inductor current to AC input is DutyAC.
Vƒ
90 - arcsin ( 2Vrms)
√
DutyAC =
90
Since the period when the inductor current flows are limited by DutyAC, the formula (6) is represented as follows:
Vƒ 2
90 - arcsin ( 2Vrms)
√
Vac − Vf
Vƒ
1
L=
×
×
× (DutyI)2 ×
(7)
90
2 × ILED ƒosc
Vac
No.A2132-7/15
LV5029MD
(for Isolation circuit)
Using the circuit diagram below, the wave form of the current that flows to Np and Ns is as follows.
Current waveform flows to primary side and secondary.
Vac
a blockdiagram in outline
Ip
(Primary side current)
LP
(Np)
Ls
(Ns)
Vac
REF_IN
R1
CLK
Vzd
REF_IN
+
-
CS
VREF (0.605V)typ
Q
RESET
Ip (primary side)
OUT
Ip slope is proportion to
Vac voltage (REF pin voltage)
T
ON
VREF
(0.605V typ)
R2
Rcs
FET
OFF
Is
(Secondary side current)
Is (Secondary side current)
T
Ipk_p = Vac/Lp × Ton_p
Ipk_p
Primary
side
Ip = Vac/Lp × Ton_p
FET_ON
(Ton_p)
FET_OFF
T(1cycle)
Ipk_s = Vf/Ls × Ton_s
Ipk_s
Is = Vf/Ls × Ton_s
Secondary
side
Iout
(Ton_s)
[Inductance Lp of primary side and sense resistor Rs]
If a peak current flow to transformer is represented as Ipk_p, the power (Pin) charged to the transformer on primary side
can be represented as:
1
Pin = 2 × Lp × (Ipk_p)2 × ƒosc (11)
Vac
Ipk_p = Lp × Ton_p (12)
Lp =
Vac2 × Ton_p2 × ƒosc Vac2 × Don_p2
=
2 × Pin
2 × Pin× ƒosc
(Don_p =
(13)
Ton_p
T = Ton_p × ƒosc),
To substitute the following to the formula below,
...η = Pout
Pin
∴Lp =
(14)
Vac2 × Ton_p2 × ƒosc × η Vac2 × Don2 × η
=
2 × Pout
2 × Pout × ƒosc
(15)
No.A2132-8/15
LV5029MD
Sense resistor is obtained as follows.
Rs =
VREF_IN VREF_IN × Lp VREF_IN × Lp
Ipk_p = Vac × Ton_p = Vac × Don_p × T
(16)
[Inductance Ls of secondary side]
Since output current Iout is the average value of current flows to transformer of secondary side
Iout = Ipk_s ×
Ton_s 1 Ipk_s × Don_s
Ton_s
×
=
(Don_s
=
T
2
2
T = Ton_s × ƒosc)
Vout
Vout Don_s
Ipk_s = Ls × Ton_s = Ls =
ƒosc
(17)
(18)
Vout × T × Don_s2 Vout × Don_s2 Vout2 × Don_s2
=
=
(19)
2 × Iout
2 × Iout × ƒosc 2 × Pout × ƒosc
Calculation of the ratio of transformer coil on primary side and secondary side
Since ratio and inductance of transformer coil is
Ls =
Ns √Ls
Np = √Lp
(20)
substituted equations (15), (19) for (20)
Np Vac
Don_p
∴ Ns = Vout × √η × Don_s
(21)
Calculation of transformer coil on primary side and secondary side
N=
Vac × 108
(22)
2 × ΔB × Ae × ƒosc
ΔB: variation range of core flux density [Gauss]
Ae: core section area [cm2]
To use Al (L value at 100T),
N=
√Al × 10
L
2
(23)
L: inductance [μH]
Al: L value at 100T [uH/N2]
lg (Air gap) is obtained as follows:
lg =
μr μ0 N2 Ae 102
L
(24)
μr: relative magnetic permeability, μr = 1
μ0: vacuum magnetic permeability μ0 = 4π*10-7
N: turn count [T]
Ae: core section area [m2]
L: inductance [H]
No.A2132-9/15
LV5029MD
Description of operation
Protection function
tilte
outline
monitor point
1
UVLO
Under voltage lock out
2
OCP
Over current protection
CS voltage
3
OVP
Over voltage protection
VIN voltage
4
OTP
Over Temperature Protection
PN Junction temperature
(TSD)
(Thermal Shut Down)
note
VIN voltage
available FET current
1. UVLO (Under voltage lock out)
If VIN voltage is 7.3V or lower, then UVLO operates and the IC stops. When UVLO operates, the power supply current
of the IC is about 80μA or lower. If VIN voltage is 9V or higher, then the IC starts switching operation.
VIN
voltage
B
UVLOON
(9V typ)
VCC
IN
voltage
A
UVLOOFF
(7.3V typ)
Outputstage
time
on
off
on
2. OCP (Over current protection)
The CS pin senses the current through the MOS FET switch and the primary side of the transformer. This provides an
additional level of protection in the event of a fault. If the voltage of the CS pin exceeds VCSOCP (1.9V typ) ( A ), the
internal comparator will detect the event and turn off the MOSFET. The peak switch current is calculated
Io (peak) [A] = VSOCP [V]/Rsense [Ω]
The VIN pin is pulled down to fixed level, keeping the controller latched off. The latch reset occurs when the user
disconnects LED from VAC and lets the VIN falls below the VIN reset voltage, UVLOOFF (7.3V typ)( B ). Then VIN
rise UVLOON (9V typ) ( C ), restart the switching.
CS
voltage
A
C
CSOCP (1.9V typ)
Time
VIN
voltage
B
UVLOON (9V typ)
Time
UVLOFF (7.3V typ)
Outputstage
on
off
on
No.A2132-10/15
LV5029MD
3. OVP (Over voltage protection)
If the voltage of VIN pin is higher than the internal reference voltage VINOVP (27V typ), switching operation is
stopped.
The stopping operation is kept until the voltage of VIN is lower than 7.3V. If the voltage of VIN pin is higher than 9V,
the switching operation is restated.
VIN
voltage
A OVP
B OVP reset
C Operation start
27V typ
9V typ
7.3V typ
Time
Outputstage
Time
on
off
on
4. OTP (Over temperature protection)
The over temperature protection function works when the junction temperature of IC is 165°C (typ) (A ), and the IC
switching stops. The IC starts switching operation again when the junction temperature is 135°C typ (B) or lower.
Tj
(Junction tmperature)
165°C
135°C
TSD (design target)
A
B
Time
Outputstage
Time
on
off
on
Skip frequency function
LV5029MD contains the skip frequency function for reduction of the peak value of conduction noise. This function
changes the frequency as follows.
Skip frequency function
VIN
UVLO unlocked
OUT
45k
55k
52.5k
50k
47.5k
45k
Switching frequency is changed as follows.
… ×0.9 → ×1.1 → ×1.05 → ×1 → ×0.95 → ×0.9 → ×1.1 …
It’s repeated by this loop.
No.A2132-11/15
LV5029MD
PWM dimming function
LED current can be adjusted according to Duty of PWM pulse input to PWM dimmer pin. PWM pulse is High (2V to
5V) then switching operation stops, and LED current stops flowing. PWM pulse is Low (under 0.6V), then switching
operation stop is released, and it returns to normal operation. The OUTPUT FET is turned OFF within 100ns if PWM
input turns into High when the OUTPUT FET is turned on.
The recommended frequency of PWM dimming input is 100Hz (twice the AC voltage frequency) to 5 kHz. When
frequency of the PWM is less than twice the AC frequency, a flicker becomes easy to be observed. On the other hand,
if PWM frequency rise to around 50 kHz that is driving frequency of the switching of the OUTPUT FET, the flicker is
easy to occur.
An outline of PWM_D pin
LED current vs PWM_D duty (outline)
Delay is <100ns
No.A2132-12/15
LV5029MD
VREF – Ta
3.2
Reference output voltage, REFOUT -- V
Built-in reference voltage, VREF -- V
0.63
0.62
VIN = 8.5V
0.61
VIN = 12V
VIN = 24V
0.6
0.59
0.58
--50
0
50
100
REFOUT – Ta
IREF_OUT = 0.5mA
3.1
3
2.9
2.8
--50
150
0
UVLOON, UVLOOFF – Ta
10
UVLOON
7
6
0
50
100
2
1.5
1
0.5
0
--50
150
0
FOSC1 – Ta
V
=
V 24V
I
.5V N =
12
VI
70
65
V
IN
45
5
8.
75
=8
V
=
150
V
IN
V 12
24 =
=
IN
IN V
N
100
FOSC2 – Ta
80
V
V
50
Ambient temperature, Ta -- °C
55
50
150
2.5
Ambient temperature, Ta -- °C
60
Frequency, FOSC1 -- kHz
Hysteresis voltage, UVLOH -- V
8
5
--50
100
UVLOH – Ta
3
UVLOOFF
9
50
Ambient temperature, Ta -- °C
Frequency, FOSC2 -- kHz
Operation start input voltage,Operation stop input voltage,
UVLOON, UVLOOFF -- V
Ambient temperature, Ta -- °C
40
--50
0
50
100
60
--50
150
Ambient temperature, Ta -- °C
VIO_VR – Ta
100
150
VOFF, VON – Ta
2
0.003
1.8
1.6
0.001
--0.001
1.4
--0.003
--0.005
--50
50
OFF voltage, ON voltage,
VOFF,VON -- %
Input offset voltage, VIO_VR -- V
0.005
0
Ambient temperature, Ta -- °C
1.2
0
50
100
Ambient temperature, Ta -- °C
150
1
--50
0
50
100
150
Ambient temperature, Ta -- °C
No.A2132-13/15
VINOVP – Ta
30
29
28
27
26
25
--50
0
50
CSOCP – Ta
3
Abnormal sensing voltage, CSOCP -- V
VIN over voltage protection voltage, VINOVP -- V
LV5029MD
100
Ambient temperature, Ta -- °C
150
2.5
2
1.5
1
0.5
0
--50
0
50
100
150
Ambient temperature, Ta -- °C
No.A2132-14/15
LV5029MD
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no
warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical
experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use
as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in
which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for
any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or
death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the
part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PS No.A2132-15/15