AT27C040 - Complete

Atmel AT27C040
4Mb (512K x 8) OTP, EPROM
DATASHEET
Features
 Fast read access time – 70ns
 Low-power CMOS operation


100μA max standby
30mA max active at 5MHz
 JEDEC standard packages


32-lead PDIP
32-lead PLCC
 5V 10% supply
 High-reliability CMOS technology


2000V ESD protection
200mA latchup immunity
 Rapid programming algorithm – 100μs/byte (typical)
 CMOS- and TTL-compatible inputs and outputs
 Industrial temperature range
 Green (Pb/halide-free) packaging option
1.
Description
The Atmel® AT27C040 is a low-power, high-performance, 4,194,304-bit, One-Time
Programmable, Read-Only Memory (OTP EPROM) organized as 512K by 8 bits. The
AT27C040 requires only one 5V power supply in normal Read mode operation. Any
byte can be accessed in less than 70ns, eliminating the need for speed reducing wait
states on high-performance microprocessor systems.
The Atmel scaled CMOS technology provides low active power consumption and fast
programming. Power consumption is typically 8mA in active mode and less than 10μA
in standby mode.
The AT27C040 is available in a choice of industry standard, JEDEC-approved, PDIP
and PLCC packages. The device features two-line control (CE, OE) to eliminate bus
contention in high-speed systems.
The AT27C040 has additional features to ensure high quality and efficient production
use. The rapid programming algorithm reduces the time required to program the part
and guarantees reliable programming. Programming time is typically only 100μs/byte.
The integrated product identification code electronically identifies the device and
manufacturer. This feature is used by industry standard programming equipment to
select the proper programming algorithms and voltages.
0189J–EPROM–10/2012
Pin Configurations and Pinouts
30
28
7
27
8
26
9
25
10
24
11
23
12
22
13
21
O1
O2
GND
O3
O4
O5
O6
Device Power Supply
31
Output Enable
6
20
OE
29
19
Chip Enable
1
CE
32
Ground
5
18
GND
A7
A6
A5
A4
A3
A2
A1
A0
O0
17
Outputs
2
O0 - O7
16
Address Inputs
A12
A15
A16
VPP
VCC
A18
A17
A0 - A18
3
Peak to Peak Voltage
4
VPP
15
Function
VCC
32-lead PDIP
Top view
32-lead PLCC
Top view
Pin
Name
14
2.
3.
A14
A13
A8
A9
A11
OE
A10
CE
O7
VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1
32
2
31
3
30
4
29
5
28
6
27
7
26
8
25
9
24
10
23
11
22
12
21
13
20
14
19
15
18
16
17
VCC
A18
A17
A14
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
Switching Considerations
Switching between active and standby conditions via the Chip Enable (CE) pin may produce transient voltage
excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in
device nonconformance. At a minimum, a 0.1μF, high-frequency, low inherent inductance, ceramic capacitor should be
utilized for each device. This capacitor should be connected between the VCC and ground terminals of the device — as
close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7μF bulk electrolytic capacitor should be utilized, again connected between the VCC and ground
terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to
the array.
4.
Block Diagram
VCC
GND
VPP
OE
CE
A0 – A18
Address
Inputs
Data Outputs
O0 – O7
OE, CE, and
Program Logic
Output
Buffers
Y Decoder
Y-Gating
Cell Matrix
X Decoder
Identification
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
2
5.
Absolute maximum ratings*
Temperature under bias-55°C to +125°C
Storage temperature . . . . . . . . . . . . . -65°C to +150°C
Voltage on any pin with
respect to ground. . . . . . . . . . . . . . . . . .-2.0V to +7.0V
Voltage on A9 with
respect to ground . . . . . . . . . . . . . . . .-2.0V to +14.0V
VPP supply voltage with
respect to ground. . . . . . . . . . . . . . . . .-2.0V to +14.0V
6.
Elelectrical Characteristics
6.1
DC and AC characteristics
Table 6-1.
*Notice: Stresses beyond those listed under “Absolute
maximum ratings” may cause permanent damage
to the device. This is a stress rating only, and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Operating modes
Mode/Pin
CE
OE
Ai
Read
VIL
VIL
Ai
X(1)
Output Disable
X
VIH
X
X
High Z
Standby
VIH
X
X
X
High Z
Rapid Program(2)
VIL
VIH
Ai
VPP
DIN
PGM Verify
X
VIL
Ai
VPP
DOUT
PGM Inhibit
VIH
VIH
X
VPP
High Z
X
Identification Code
(4)
Product Identification
Notes: 1.
VIL
VIL
A9 = VH(3)
A0 = VIH or VIL
A1 – A18 = VIL
VPP
Outputs
DOUT
X can be VIL or VIH.
2.
Refer to programming characteristics.
3.
VH = 12.0 ± 0.5V.
4.
Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH, and A0,
which is toggled low (VIL) to select the manufacturer’s identification byte and high (VIH) to select the device
code byte.
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
3
6.2
DC and AC Operating Conditions for Read Operation
Atmel AT27C040-70
Atmel AT27C040-90
-40°C to 85°C
-40°C to 85°C
5V 10%
5V  10%
Industrial Operating Temperature (Case)
VCC Power Supply
6.3
DC and Operating Characteristics for Read Operation
Symbol
Parameter
Condition
ILI
Input Load Current
ILO
Max
Units
VIN = 0V to VCC
1
μA
Output Leakage Current
VOUT = 0V to VCC
5
μA
IPP1(2)
VPP(1) Read/Standby Current
VPP = VCC
10
μA
ISB
VCC1(1) Standby Current
ISB1 (CMOS), CE = VCC  0.3V
100
μA
ISB2 (TTL), CE = 2.0 to VCC + 0.5V
1
mA
ICC
VCC Active Current
f = 5MHz, IOUT = 0mA, CE = VIL
30
mA
VIL
Input Low Voltage
-0.6
0.8
V
VIH
Input High Voltage
2.0
VCC + 0.5
V
VOL
Output Low Voltage
IOL = 2.1mA
0.4
V
VOH
Output High Voltage
IOH = -400μA
Notes: 1.
2.
6.4
Min
2.4
V
VCC must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP.
VPP may be connected directly to VCC, except during programming. The supply current would then be the
sum of ICC and IPP.
AC Characteristics for Read Operation
Atmel AT27C040
-70
Symbol
Parameter
Condition
tACC(1)
Address to Output Delay
CE = OE
= VIL
tCE(1)
CE to Output Delay
tOE(1)
OE to Output Delay
tDF(1)
OE or CE High to Output Float; whichever occurred first.
tOH
Output Hold from Address, CE or OE; whichever occurred
first.
Note:
1.
Min
-90
Max
Units
70
90
ns
OE = VIL
70
90
ns
CE = VIL
30
35
ns
20
20
ns
0
Max
Min
0
ns
See AC waveforms for read operation.
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
4
Figure 6-1. AC Waveforms for Read Operation(1)
Address Valid
Address
CE
tCE
tOE
OE
tDF
tACC
tOH
High Z
Output
Valid
Output
Notes: 1.
Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless
otherwise specified.
2.
OE may be delayed up to tCE – tOE after the falling edge of CE without impact on tCE.
3.
OE may be delayed up to tACC – tOE after the address is valid without impact on tACC.
4.
This parameter is only sampled, and is not 100% tested.
5.
Output float is defined as the point when data is no longer driven.
Figure 6-2. Input Test Waveforms and Measurement Levels
2.40V
2.00
AC
Driving
Levels
0.80
AC
Measurement
Level
0.45V
Figure 6-3. Output Test Load
1.3V
(1N914)
3.3K
OUTPUT
PIN
CL
Table 6-2.
Pin Capacitance
f = 1MHz, T = 25°C (1)
Symbol
Typ
Max
Units
Conditions
CIN
4
8
pF
VIN = 0V
COUT
8
12
pF
VOUT = 0V
Note:
1.
Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
5
Figure 6-4. Programming Waveforms(1)
Read
(Verify)
Program
Address
VIH
Address Stable
VIL
tAS
Data
VIH
Data Out
Valid
Data In
VIL
tAH
tOE
tDS
tDH
tDFP
13.0V
VPP
5.0V
tPRT
VCC
tVPS
6.5V
5.0V
tVCS
CE
VIH
VIL
tPW
OE
tOES
VIH
VIL
Notes: 1.
The input timing reference is 0.8V for VIL and 2.0V for VIH.
2.
tOE and tDFP are characteristics of the device, but must be accommodated by the programmer.
3.
When programming the AT27C040, a 0.1μF capacitor is required across VPP and ground to suppress
spurious voltage transients.
Table 6-3.
DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V.
Limits
Symbol
Parameter
Test Conditions
ILI
Input Load Current
VIN = VIL, VIH
VIL
Input Low Level
VIH
Input High Level
VOL
Output Low Voltage
IOL = 2.1mA
VOH
Output High Voltage
IOH = -400μA
ICC2
VCC Supply Current (Program And Verify)
IPP2
VPP Supply Current
VID
A9 Product Identification Voltage
Min
Max
Units
10
μA
-0.6
0.8
V
2.0
VCC + 0.7
V
0.4
V
2.4
CE = VIL
11.5
V
40
mA
20
mA
12.5
V
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
6
Table 6-4.
AC Programming Characteristics
TA = 25  5°C, VCC = 6.5  0.25V, VPP = 13.0  0.25V
Limits
Test Conditions(1)
Symbol
Parameter
tAS
Address Setup Time
tOES
OE Setup Time
tDS
Data Setup Time
tAH
Address Hold Time
Input rise and fall times:
(10% to 90%) 20ns
Input pulse levels:
tDH
Data Hold Time
tDFP
OE High to Output Float Delay(2)
tVPS
Vpp Setup Time
0.45V to 2.4V
0.8V to 2.0V
Vcc Setup Time
tPW
CE Program Pulse Width(3)
tOE
Data Valid from OE(2)
tPRT
VPP Pulse Rise Time During
Programming
Max
Output timing reference level:
Units
2
μs
2
μs
2
μs
0
μs
2
μs
0
Input timing reference level:
tVCS
Notes: 1.
Min
130
ns
2
μs
2
μs
95
0.8V to 2.0V
105
μs
150
ns
50
ns
VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP.
2.
This parameter is only sampled, and is not 100% tested. Output float is defined as the point where data is no
longer driven. See timing diagram.
3.
Program pulse width tolerance is 100μs 5%.
Table 6-5.
Atmel AT27C040 Integrated Product Identification Code
Pins
Codes
A0
O7
O6
O5
O4
O3
O2
O1
O0
Hex Data
Manufacturer
0
0
0
0
1
1
1
1
0
1E
Device Type
1
0
0
0
0
1
0
1
1
0B
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
7
7.
Rapid programming algorithm
A 100μs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is
raised to 13.0V. Each address is first programmed with one 100μs CE pulse without verification. Then a
verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to ten
successive 100μs pulses are applied with a verification after each pulse. If the byte fails to verify after ten pulses have
been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been
checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to
determine if the device passes or fails.
Figure 7-1. Rapid Programming Algorithm
Start
ADDR = First Location
VCC = 6.5V
VPP = 13.0V
Program One 100μs Pulse
Increment
Address
No
Last
ADDR?
Yes
ADDR = First Location
Increment
Address
X=0
No
Last
ADDR?
Pass
Verify
Byte
Fail
Increment
Yes
No
Program One 100μs Pulse
X = 10?
Yes
VCC = 6.5V
VPP = 13.0V
Compare
All Bytes
to Original
Data
Fail
Device
Failed
Pass
Device
Passed
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
8
8.
Ordering Information
Green Package Option (Pb/Halide-free)
ICC (mA)
Atmel Ordering Code
Package
AT27C040-70JU
32J
AT27C040-70PU
32P6
AT27C040-90JU
32J
AT27C040-90PU
32P6
tACC (ns)
Active
Standby
Lead Finish
Operation Range
70
30
0.1
Matte Tin
Industrial
(-40C to 85C)
90
30
0.1
Matte Tin
Industrial
(-40C to 85C)
Package Type
32J
32P6
32-lead, plastic, J-leaded Chip Carrier (PLCC)
32-lead, 0.600" wide, plastic, Dual Inline (PDIP)
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
9
9.
Package information
9.1
32J — 32-lead PLCC
1.14(0.045) X 45°
PIN NO. 1
IDENTIFIER
1.14(0.045) X 45°
0.318(0.0125)
0.191(0.0075)
E1
B
E2
B1
E
e
A2
D1
A1
D
A
0.51(0.020)MAX
45° MAX (3X)
COMMON DIMENSIONS
(Unit of measure = mm)
D2
Notes:
1. This package conforms to JEDEC reference MS-016, Variation AE.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
3. Lead coplanarity is 0.004" (0.10mm) maximum.
SYMBOL
MIN
NOM
MAX
A
3.175
–
3.556
A1
1.524
–
2.413
A2
0.381
–
–
D
12.319
–
12.573
D1
11.354
–
11.506
D2
9.906
–
10.922
E
14.859
–
15.113
E1
13.894
–
14.046
E2
12.471
–
13.487
B
0.660
–
0.813
B1
0.330
–
0.533
e
NOTE
Note 2
Note 2
1.270 TYP
10/04/01
Package Drawing Contact:
[email protected]
TITLE
32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC)
DRAWING NO.
32J
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
REV.
B
10
32P6 — 32-lead PDIP
17
32
E1
1
16
D
e
A
BASE
PLANE
-CSEATING
PLANE
A1
L
b2
.015
b j
E
GAGE
PLANE
0.10 m C
See
Lead Detail
Z Z
9.2
COMMON DIMENSIONS
(UNIT OF MEASURE=MM)
C
L
eC
Lead Detail
eA
eB
Notes:
1. Dimensions D and E1 do not include mold Flash or
Protrusion. Mold Flash or Protrusion shall not exceed
0.25 mm (0.010").
c
Symbol
A
A1
Min.
0.381
Nom.
-
Max.
4.826
-
b
0.356
-
0.558
b2
c
D
E
1.041
0.203
41.783
15.240
-
1.651
0.381
42.291
15.875
E1
13.462
-
13.970
L
e
eA
eB
3.048
3.556
-
2.54 BSC
15.24 BSC
-
17.78
eC
0.000
-
1.524
Note
Note 1
Note 1
11/28/11
Package Drawing Contact:
[email protected]
TITLE
32P6, 32-lead, 0.600”/15.24 mm Wide Plastic Dual
Inline Package (PDIP)
GPC
DRAWING NO.
REV.
PLU
32P6
C
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
11
10.
Revision History
Doc. Rev.
Date
0189J
10/2012
0189I
04/2011
0189H
12/2007
Comments
Update 32P6 package outline drawing.
Update template and Atmel logo.
Remove TSOP package.
Add lead finish to ordering information.
Datasheet revision.
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
12
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© 2012 Atmel Corporation. All rights reserved. / Rev.: 0189J–EPROM–10/2012
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