Data Sheet

LVDS & LVPECL FPGA Terminator
Technical Data Sheet
RoHS Compliant Parts Available
Description
Features
These LVPECL and LVDS termination networks are designed for high
performance termination of differential Input/Output signals on some of
the most popular Field Programmable Gate Arrays (FPGAs).
•
•
Both input (RX) and output (TX) termination is provided.
•
•
•
Style C
Designed for termination of Xilinx® and Altera® FPGAs.
8 or 16 differential channels of termination provided in a single
integrated package
Excellent high frequency performance
High density ceramic BGA package
RoHS Compliant Designs Available
•
Compatible with both lead and lead-free manufacturing
processes
Style I
4
4
R1
R1
R1
R1
R2
R1
R1
R1
R1
R2
R1
R1
R1
R2
R2
R1
R2
R1
R1
R1
R1
R2
R1
R1
R1
R2
R2
R1
R1
R1
R1
R1
3
3
2
2
R1
R1
R1
R2
R1
R1
R1
R1
R1
R2
R1
R2
R1
R1
R1
R1
R2
R1
R1
R2
R1
R2
R1
R2
R1
R1
R1
R1
R2
R1
R1
R1
1
1
A
B
C
D
E
F
G
A
H
B
C
± 1.0%
±200ppm/°C
-55°C to +125°C
0.068 Watts at 70°C
1.0 Watts at 70°C
Resistor Tolerance:
TCR
Operating Temperature Range
Maximum Resistor Power:
Maximum Package Power:
Process Requirements:
Maximum Re-flow Temperature
F
G
H
J
K
L
Tx Termination
M
N
P
R
T
Rx Termination
R1
Tx
R2
Z = 50 ohms
R1
Rx
R1
Per IPC/JEDEC J-STD-020C
Ordering Information
1.00mm Pitch
Standard Part
No.
RT1710B7
RT1720B7
RT1721B7
RT1722B7
RT1723B7
RT1724B7
RT1725B7
RT1726B7
RT1727B7
RT1728B7
RT1729B7
E
Typical Application
Electrical Specifications
1.27mm Pitch
Standard Part
No.
RT1710B6
RT1721B6
RT1723B6
RT1725B6
RT1727B6
RT1729B6
D
Style
R1 Ω
R2 Ω
Array
Size
C
I
I
I
I
I
I
I
I
I
I
100
187
187
140
140
140
140
70
70
70
70
100
100
165
165
135
135
187
187
240
240
4x8
4 x 16
4x8
4 x 16
4x8
4 x 16
4x8
4 x 16
4x8
4 x 16
4x8
1.27mm Pitch 1.00mm Pitch
RoHS Part No. RoHS Part No.
RT2710B6
RT2721B6
RT2723B6
RT2725B6
RT2727B6
RT2729B6
RT2710B7
RT2720B7
RT2721B7
RT2722B7
RT2723B7
RT2724B7
RT2725B7
RT2726B7
RT2727B7
RT2728B7
RT2729B7
Part Number Coding
7 inch reel, Add TR7 to part
number, example RT2400B6TR7
13 inch reel, Add TR13 to part
number, example RT2400B6TR13
(Bulk packaging is not available)
Direction of Feed
Packaging Information
Suffix
Tape Width
Carrier Pitch
Reel Diameter
Parts/Reel
TR7
TR13
24 mm
8 mm
7 inch
1,000
24mm
8 mm
13 inch
4,000
CTS Electronic Components
www.ctscorp.com
© 2006 CTS Corporation. All rights reserved. Information subject to change.
Page 1
LVDS & LVPECL FPGA Terminator
October 07
Recommended Land Pattern
Outline of Substrate
Solder Mask Dia = Pad
Diameter +.15mm (.006 inch)
PCB Pad Diameter
1.00mm Pitch (B7) = 0.51mm/.020 inch (minimum)
For .006" Thick Solder Paste Stencil, Aperture Opening Should
be Equal to the PCB Pad Diameter.
Refer to www.ctscorp.com/components/clearone.asp for
additional PCB design information
Mechanical Diagram
L
W
H
RT_7__B_
CTS YRWK
P (Pitch)
A1 Identifier
K
1.27mm Pitch
RT1710B6 RT2710B6
RT1721B6 RT2721B6
RT1723B6 RT2723B6
RT1725B6 RT2725B6
RT1727B6 RT2727B6
RT1729B6 RT2729B6
1.0mm Pitch
RT1710B7 RT2710B7
RT1721B7 RT2721B7
RT1723B7 RT2723B7
RT1725B7 RT2725B7
RT1727B7 RT1727B7
RT1729B7 RT1729B7
RT1720B7 RT2720B7
RT1722B7 RT2722B7
RT1724B7 RT2724B7
RT1726B7 RT2726B7
RT1728B7 RT2728B7
P (Pitch)
D
L
W
H
P
D
K
mm
10.16±0.15
5.08±0.15
1.32±0.15
1.27±0.25
0.76±0.05
0.64±0.25
inch
.400±.006
.200±.006
.052±.006
.050±.010
.030±.002
.025±.010
L
W
H
P
D
K
mm
8.00±0.15
4.00±0.15
1.19±0.15
1.00±0.25
0.64±0.05
0.50±0.25
inch
.315±.006
.157±.006
.047±.006
.039±.010
.025±.002
.020±.010
mm
16.00±0.15
4.00±0.15
1.19±0.15
1.00±0.25
0.64±0.05
0.50±0.25
inch
.630±.006
.157±.006
.047±.006
.039±.010
.025±.002
.020±.010
Complete ClearONE Product, Processing, and Application Information can be found at the following link:
http://www.ctscorp.com/components/clearone.asp
FPGA Application notes:
http://www.ctscorp.com/components/Datasheets/ClearOneANC1FPGALVPECLA.pdf
http://www.ctscorp.com/components/Datasheets/ClearOneANC1FPGALVDSA.pdf
CTS Electronic Components
www.ctscorp.com
© 2006 CTS Corporation. All rights reserved. Information subject to change.
Page 2
LVDS & LVPECL FPGA Terminator
October 07