UMFT240XA Datasheet

UMFT240XA Datasheet
Version 1.3
Document Reference No.: FT_000520
C learance No.: FTDI# 271
Future Technology
Devices International
Datasheet
UMFT240XA USB to 8-bit
245 FIFO Development
Module
UMFT240XA is a USB to 8-bit 245 FIFO DIP module with a 0.3” row pitch.
1 Introduction
1.1 Features
The UMFT240XA is a development module for
FTDI’s FT240XQ, one of the devices from FTDI’s
range of USB to serial data interface integrated
circuit devices. FT240X is a USB to 245 FIFO
interface with a battery charging feature, which
can allow batteries to be charged with a higher
current from a dedicated charger port (without the
FT240X
being
enumerated).
In
addition,
asynchronous and synchronous bit bang interface
modes are available. The internally generated clock
(6MHz, 12MHz, 24MHz and 48MHz) can be brought
out of the on one of the CBUS pin to be used to
drive a microprocessor or external logic.
The UMFT240XA is fitted with a FT240XQ, all the
features of the FT240X can be utilized with the
UMFT240XA. For a full list of the FT240X’s features
please see the FT240X datasheet which can be found
at the FTDI website.
In addition to the features listed in the FT240X
datasheet, the UMFT240XA has the following
features:

Small PCB assembly module designed to fit a
standard 7.62mm (0.3”) wide 24 pin DIP socket.
Pins are on a 2.54mm (0.1”) pitch.
The UMFT240XA is a module which is designed to
plug into a standard 0.3” wide 24 pin DIP socket.
All components used, including the FT240XQ are
Pb-free (RoHS compliant).

On board USB ‘mini-B’ socket allows module to
be connected to a PC via a standard A to mini-B
USB cable.

Functionally configurable using solder links. The
default solder links setup enables the module to
function without peripheral wires or application
board. Other configurations enable external
power supply options and variation of logic
reference levels.
N either the whole nor any part of the information c ontained in, or the product desc ribed in th is manual, may be adapted or reproduced
in any material or electronic form without the prior written cons ent of the copyright holder. This product and its documentat ion are
s upplied on an as-is basis and no warranty as to their s uitability for any partic ul ar purpose is either made or implied. Future T ec hnology
D evices International L td will not accept any claim for damages hows oever aris ing as a res ult of us e or failure of this produ c t. Y our
s tatutory rights are not affec ted. T his produc t or any variant of it is not intended for use in any medical appliance, device or sys tem in
whic h the failure of the produc t might reasonably be expec ted to res ult in personal injury. T his doc ument provides preliminar y
information that may be s ubjec t to c hange without notice . N o freedom to us e patents or other intellec tual property rights is implied by
the public ation of this document. Future Tec hnology Devic es I nternational Ltd, U nit 1 , 2 Seaward P lace, C enturion Business Pa rk,
G las gow, G 4 1 1 HH, U nited Kingdom. Sc otland Regi stered N umber: SC136640
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UMFT240XA Datasheet
Version 1.3
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Table of Contents
1 Introduction ................................................................. 1
1.1
Features ................................................................................ 1
2 Driver Support .............................................................. 3
3 Ordering Information & TID .......................................... 4
4 UMFT240XA Signals and Configurations ......................... 5
4.1
UMFT240XA Pin Out ............................................................... 5
4.2
Signal Descriptions ................................................................ 6
4.3
CBUS Signal Options............................................................... 7
5 Module Configurations .................................................. 8
5.1
Solder Link Configuration Options........................................... 8
5.2
Solder Link Modifications........................................................ 8
5.3
BUS Powered Configuration .................................................... 9
5.4
Self Powered Configuration ...................................................10
5.5
USB Bus Powered with Power Switching Configuration ...........11
5.6
Variable IO Voltage Supply ....................................................12
5.7
3.3V Voltage Supply ..............................................................13
5.8
Configuring the MTP ROM ......................................................14
5.9
Module Dimensions ...............................................................14
5.10 IC Package Markings .............................................................15
6 UMFT240XA Module Circuit Schematic ......................... 16
7 Internal MTP ROM Configuration.................................. 17
8 Contact Information .................................................... 18
Appendix A – References ................................................. 19
Document References ...................................................................19
Acronyms and Abbreviations .........................................................19
Appendix B – List of Figures and Tables............................ 20
List of Figures ...............................................................................20
List of Tables ................................................................................20
Appendix C – Revision History.......................................... 21
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2 Driver Support
Royalty-Free VIRTUAL COM PORT (VCP)
DRIVERS for:
Royalty-Free D2XX Direct Drivers (USB Drivers
+ DLL S/W Interface):

Windows 10 32, 64 bit

Windows 10 32, 64 bit

Windows 8 and 8.1 32,64-bit

Windows 8 and 8.1 32,64-bit

Windows 7 32,64-bit

Windows 7 32,64-bit

Windows Vista

Windows Vista

Windows XP 32,64-bit

Windows XP 32,64-bit

Windows XP Embedded

Windows XP Embedded

Windows CE.NET 4.2 , 5.0 and 6.0

Windows CE.NET 4.2, 5.0 and 6.0

MAC OS OS-X

MAC OS OS-X

Linux 3.0and greater

Linux 3.0 and greater

Android

Android
The drivers listed above are all available to download for free from www.ftdichip.com. Various 3rd Party
Drivers are also available for various other operating systems - visit www.ftdichip.com for details.
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3 Ordering Information & TID
Module Code
Utilised
IC Code
TID
Description
UMFT201XA-01
FT201XQ
40001460
USB to I2C evaluation module, Pin length: 5.6mm.
UMFT201XA-02
FT201XQ
40001460
USB to I2C evaluation module , Pin length: 4.6mm.
UMFT220XA-01
FT220XQ
40001461
USB to 4-bit SPI/FT1248 evaluation module, Pin length: 5.6mm.
UMFT220XA-02
FT220XQ
40001461
USB to 4-bit SPI/FT1248 evaluation module, Pin length: 4.6mm.
UMFT221XA-01
FT221XQ
40001462
USB to 8-bit SPI/FT1248 evaluation module, Pin length: 5.6mm.
UMFT221XA-02
FT221XQ
40001462
USB to 8-bit SPI/FT1248 evaluation module, Pin length: 4.6mm.
UMFT230XA-01
FT230XQ
40001463
USB to Basic UART evaluation module, Pin length: 5.6mm.
UMFT230XA-02
FT230XQ
40001463
USB to Basic UART evaluation module, Pin length: 4.6mm.
UMFT231XA-01
FT231XQ
40001464
USB to Full-Handshake UART evaluation module, Pin length:
5.6mm.
UMFT231XA-02
FT231XQ
40001464
USB to Full-Handshake UART evaluation module, Pin length:
4.6mm.
UMFT240XA-01
FT240XQ
40001466
USB to 8-bit 245 FIFO evaluation module , Pin length: 5.6mm.
UMFT240XA-02
FT240XQ
40001466
USB to 8-bit 245 FIFO evaluation module, Pin length: 4.6mm.
TID is the test identification code for the IC. Note that this TID is for revision D silicon.
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4 UMFT240XA Signals and Configurations
4.1 UMFT240XA Pin Out
Figure 4.1 – Module Pin Out
Figure 4.1 illustrates the signals available on the DIL pins. The LHS shows the pinout when the module is
viewed from the bottom. The RHS shows what signals are available (on the pins below) when viewed
from the top. The pins do not go completely through the PCB.
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4.2 Signal Descriptions
Pin No.
J1-1, J1-7,
J2-5
Name
Type
Description
GND
PWR
Module Ground Supply Pins
J1-2
3V3OUT
Power
Input/
Output
3.3V output from integrated LDO regulator. This pin is decoupled with a 100nF
capacitor to ground on the PCB module. The prime purpose of this pin is to
provide the 3.3V supply that can be used internally. For power supply
configuration details see section 5.
J1-3
VC CIO
Power
Input
+1.8V to +3.3V supply to the UART Interface and CBUS I/O pins. For power
supply configuration details see section 5.
J1-4
DATA7
I/O
245 FIFO Bi-Directional data bit 7.
J1-5
DATA6
I/O
245 FIFO Bi-Directional data bit 6.
J1-6
DATA5
I/O
245 FIFO Bi-Directional data bit 5.
J1-8
DATA4
I/O
245 FIFO Bi-Directional data bit 4.
J1-9
DATA3
I/O
245 FIFO Bi-Directional data bit 3.
J1-10
DATA2
I/O
245 FIFO Bi-Directional data bit 2.
J1-11
DATA1
I/O
245 FIFO Bi-Directional data bit 1.
J1-12
DATA0
I/O
245 FIFO Bi-Directional data bit 0.
J2-1
SLD
GND
USB C able Shield. Connected to GND via a 0ohm resistor.
J2-2
VBUS
Power
Output
5V Power output from the USB bus. For a low power USB bus powered design, up
to 100mA can be sourced from the 5V supply and applied to the USB bus. A
maximum of 500mA can be sourced from the USB bus in a high power USB bus
powered design. C urrents up to 1A can be sourced from a dedicated charger and
applied to the USB bus.
J2-3
VC C
Power
Input
5V power input for FT240X. For power supply configuration details see section 5.
J2-4
RESET#
Input
FT231X active low reset line. Configured with an on board pull-up and
recommended filter capacitor. When no power is applied to the USB bus reset, will
be held low, this prevents current from flowing to the host or hub when in selfpowered mode.
J2-5
C BUS6
I/O
C onfigurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM. Factory Default pin Function is Keep_Awake. See CBUS Signal Options,
Table 4.2.
J2-6
C BUS5
I/O
C onfigurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM. Factory Default pin Function is VBUS_Sense. See CBUS Signal Options,
Table 4.2.
J2-8
SI/WU
Output
Send Immediate/Wake Up
J2-9
WR
Input
245 FIFO Write status line
J2-10
RD#
Input
245 FIFO Read status line
J2-11
TXE#
Output
245 FIFO Transmit control line
J2-12
RXF#
Output
245 FIFO Receive control line
Table 4.1 – Module Pin Out Description
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4.3 CBUS Signal Options
The following options can be configured on the CBUS I/O pins. These options are all configured in the
internal MTP ROM using the utility software FT_PROG, which can be downloaded from the
www.ftdichip.com. The default configuration is described in DS_UMFT231XA.
CBUS
Signal
Option
Available On CBUS Pin
Description
Tristate
C BUS5, C BUS6
IO Pad is tri-stated
DRIVE_1
C BUS5, C BUS6
Output a constant 1
DRIVE_0
C BUS5, C BUS6
Output a constant 0
PWREN#
C BUS5, C BUS6
Output is low after the device has been configured by USB, then high
during USB suspend mode. This output can be used to control power to
external logic P-Channel logic level MOSFET switch.
NOTE: This function is driven by an open-drain to ground with no
internal pull-up, this is specially designed to aid battery charging
applications. UMFT240XA connects an on-boardl 47K pull-up to each
C BUS and DBUS pin.
TXLED#
C BUS5, C BUS6
Transmit data LED drive – open drain pulses low when transmitting data
via USB.
RXLED#
C BUS5, C BUS6
Receive data LED drive – open drain pulses low when receiving data via
USB.
TX&RXLED#
C BUS5, C BUS6
LED drive – open drain pulses low when transmitting or receiving data
via USB.
SLEEP#
C BUS5, C BUS6
Goes low during USB suspend mode. Typically used to power down an
external logic to RS232 level converter IC in USB to RS232 converter
designs. C ancel SLEEP# option for when connected to a dedicated
charger port, this can be selected when configuring the MTP ROM. When
this option is enabled SLEEP# is driven high when FT240X is connected
to a Dedicated Charger Port.
C LK24MHz
C BUS5, C BUS6
24 MHz C lock output.**
C LK12MHz
C BUS5, C BUS6
12 MHz C lock output.**
C LK6MHz
C BUS5, C BUS6
6 MHz C lock output.**
BC D_C harger
C BUS5, C BUS6
Battery C harge Detect indicates when the device is connected to a
dedicated battery charger host. Active high output. NOTE: Requires a
10K pull-down to remove power up toggling.
BC D_Charger#
C BUS5, C BUS6
Active low BCD Charger, driven by an open drain to ground with no
internal pull-up (4.7K on board pull-up present).
BitBang_WR#
C BUS5, C BUS6
Synchronous and asynchronous bit bang mode WR# strobe output.
BitBang_RD#
C BUS5, C BUS6
Synchronous and asynchronous bit bang mode RD# strobe output.
VBUS Sense
C BUS5, C BUS6
Input to detect when VBUS is present.
Time Stamp
C BUS5, C BUS6
Toggle signal which changes state each time a USB SOF is received
Keep_Awake#
C BUS5, C BUS6
Active Low input, prevents the chip from going into suspend.
Table 4.2 – CBUS Signal Options
**When in USB suspend mode the outputs clocks are also suspended.
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5 Module Configurations
5.1 Solder Link Configuration Options
Solder
Link No.
Setting
Status
Description
JP1
Shorted
Default
C onnects internal 3.3V regulator to VCCIO. This restricts signal drive to only 3.3V
level signals.
JP1
Opened
NonDefault
Disconnects internal 3.3V regulator connection to VCCIO. This mode allows for the
supply of 1.8V-3.3V power from an external power supply, thus allows the
processing of signals with logic levels between 1.8V and 3.3V. VCCIO can be
adjusted to match the interface requirements of external circuitry.
Table 5.1 – Solder Links JP1 Pin Description
Solder
Link No.
Setting
Statu
s
Description
JP2
Shorted
Default
C onnects VBUS to VCC. This mode is known as “USB-Powered” mode.
JP2
Opened
NonDefault
Disconnects VBUS to VCC. This allows the supply of power form an external power
supply. This mode is known as “Self-Powered” mode.
Table 5.2 – Solder Links JP2 Pin Description
Note: There should never be more than one power output supplied to the same net. Failure to properly
remove solder from JP1 and JP2 can cause a direct short between two different power supplies (when a
self-powered set-up is applied and the USB bus is connected) resulting in damage to the UMFT240XA
module and the target circuit.
5.2 Solder Link Modifications
The UMFT240XA has two solder links fixed to the top side of the PCB. These solder link can be adjusted
by removing the solder linking the two PADs to produce an open or by placing a solder bridge to produce
a short.
By default the UMFT240XA has both solder links shorting their pads. To allow for enhanced flexibility of
this module remove both solder links and wire the header pins according to the power setup required.
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5.3 BUS Powered Configuration
GND
Alternative
connection
VCCIO
VCC
3V3OUT
VBUS
Alternative
connection
Current Flow
GND
Viewing pins thourgh the board
Bus Powered
Self-Sourced
from the top.
Mode
3V3 TTL Mode
Solder Link JP2 - Closed
Solder Link JP1 - Closed
Figure 5.1 – Bus Powered Configuration
A bus powered configuration draws its power from the USB host/hub. The UMFT240XA is configured by
default to be in bus powered mode.
Figure 5.1illustrates the UMFT240XA module in a typical USB bus powered design configuration. By
default solder bridge connections link VCCIO to 3V3OUT, and VCC to VBUS. (Note that Figure 5.1 is for
illustration only and that the pins do not actually go all the way through the PCB)
For a bus power configuration power is supplied from the USB VBUS:
+5V VBUS power is sourced from the USB bus and is connected to the FT240X power input (VCC)
+3.3V power is sourced from the FT240X’s voltage regulator output and is connected to the FT240X IO
port’s power input (VCCIO).
Interfacing the UMFT240XA module to a microcontroller (MCU), or other logic devices for bus powered
configuration is done in exactly the same way as a self powered configuration (see Section 3), except
that it is possible for the MCU or external device to take its power supply from the USB bus (either the 5V
from the USB pin, or 3.3V from the 3V3OUT pin).
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5.4 Self Powered Configuration
Figure 5.2 – Self-Powered Configuration
A self-powered configuration operates on the principle of drawing power from an external power supply,
as oppose to drawing power from the USB host. In this configuration no current is drawn from the USB
bus.
Figure 5.2 illustrates the UMFT240XA in a typical USB self-powered configuration. In this case the solder
links connection of JP1 is removed, which allows 5V power to be supplied to the module VCC pins from an
external source. VCCIO can to be powered from 3V3OUT or the VCC of an external source. (Note that
Figure 5.2 is for illustration only and that the pins do not actually go all the way through the PCB)
For a self-powered configuration it is necessary to prevent current from flowing back to the USB data
lines when the connected USB host or hub has powered down. To carry out this function the UMFT240XA
uses an on-board voltage divider network connected to the USB power bus and RESET# pin. This
operates on the principle that when no power is supplied to the VBUS line , the FT240X will automatically
be held in reset by a weak pull-down, when power is applied the voltage divider will apply a weak 3.3V
pull-up. Driving a level to the RESET# pin of the UMFT240XA will override the effect of this voltage
divider. When the FT240X is in reset the USB DP signal pull-up resistor connected to the data lines is
disconnected and no current can flow down the USB lines.
An example of interfacing the FT240X with a Microcontroller’s UART interface is also illustrated in Figure
5.2. This example shows the wire configuration of the transfer and handshake lines. This example also
illustrates that a voltage other than 3.3V can be supplied to th e FT240X’s IO port, this feature is
described further and for bus powered mode in Section 5.6.
Alternatively both the FT240X’s IO port and MCU can be powered from the 3V3OUT pin; this approach is
described in Section 5.5.
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5.5 USB Bus Powered with Power Switching Configuration
Figure 5.3 – Bus Powered with Power Switching Configuration
USB bus powered mode is introduced in Section 5.3. This section describes how to use bus-powered
mode with a power switch.
USB bus powered circuits are required by USB compliance standards to consume less than 2.5mA (and
less than 100mA when not enumerated and not suspended) when connected to a host or hub when in
USB suspend mode. The PWREN# CBUS function can be used to remove power from external circuitry
whenever the FT240X is not enumerated. (Note: It is impossible to be in suspended mode when
enumerated.) (Note that Figure 5.3 is for illustration only and that the pins do not actually go all the way
through the PCB)
To implement a power switch using PWREN#, configure a P -Channel Power MOSFET to have a soft start
by fitting a 10K pull-up, a 1K series resistor and a 100nF cap as shown in Figure 5.3.
Connecting the source of the P-Channel MOSFET to 3V3OUT instead of VBUS can allow external logic to
source 3.3V power from the FT240X without breaking USB compliancy. In this setup it is important that
the VCCIO is not sourced from the drain of this MOSFET, this is because the power used to drive the gate
of this transistor is sourced from VCCIO. VCCIO should be connected directly to 3V3OUT for this setup to
function effectively. It is also important that the external log ic must and IO core of the FT240X must not
draw more that 50mA, this is because the current limit of the internal 3.3V regulator is 50mA.
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5.6 Variable IO Voltage Supply
Figure 5.4 – USB Bus Powered 3.3V Logic Drive
The FT240X can process signals at CMOS/TTL logic levels in the range of 1.8V to 3.3V. This section
describes how to utilise this feature.
Figure 5.4 shows a configuration where the FT240X is interfaced to a device with IOs operating in the
range of 1.8V - 3.3V. The IO ports of this module need to be powered with a voltage level that is equal to
the level of the signals it is processing. Since the FT240X’s embedded voltage regulator only outputs 3V3
the IO ports will need to be powered from another power source when operating at voltage levels other
than 3.3V. (Note that Figure 5.4 is for illustration only and that the pins do not actually go all the way
through the PCB)
By default, a short is present between 3V3OUT (embedded voltage regulator) and VCCIO (IO port’s
power input) by solder links JP1. If an external power supply is used to power the IO ports this solder
links needs to be open. This can be done by removing the solder linking the two pads of the solder links.
The configuration described in this section can be implemented in either bus -powered mode or selfpowered mode.
Note 1: The CBUS and DBUS pins are 5V tolerant; however these signals cannot drive signals at 5V
TTL/CMOS. VCCIO is not 5V tolerant; applying 5V to VC CIO will damage the chip.
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Note 2: If power is applied to VCCIO and no power is applied to VCC all IOs will be at an unknown state,
this however will not damage the chip. The FT240X also has protective circuitry to prevent the chip being
damaged by a voltage discrepancy between VCCIO and the level of the signal being processed .
Note 3: When using VCCIO less than 3V3 on a chip from FTDI’s X -chip range, it is recommended to uses
pull up resistors (47K) to VCCIO on the data lines, all of the UMFT2xxXA devices include an on-board
pull-up for these lines.
5.7 3.3V Voltage Supply
Figure 5.5 – USB Self Powered 3.3V Logic Drive
The FT240X can be powered from a single 3.3V supply. This feature is an alternative to having the
FT240X powered at 5V in standard self-powered configuration.
The 3.3V Self Powered configuration is illustrated in Figure 5.5. Note that the 3.3V input is connected to
VCC, VCCIO and 3V3OUT. (Note that Figure 5.5 is for illustration only and that the pins do not actually go
all the way through the PCB)
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5.8 Configuring the MTP ROM
The FT240X contains an embedded MTP ROM. This device can be used to specify the functions used by
each CBUS pin, the current drive on ea ch signal pin, current limit for the USB bus and the other
descriptors of the device. For details on using the MTP ROM/EEPROM programming utility FT_PROG,
please see the FT_PROG User Guide and the FT240X datasheet.
When programming the MTP ROM please note:
i)
One of the CBUS Pins can be configured as PWREN# in the internal MTP ROM. This can be used to
switch the power supply to the external circuitry.
ii)
The Max Bus Power setting of the MTP ROM should specify the maximum current to be drawn from
the USB host/hub when enumerated. For high-powered USB devices the current limit when
enumerated is between 100mA and 500mA, for low -powered USB devices the current limit is
100mA.
5.9 Module Dimensions
Figure 5.6 – UMFT240XA Module Dimensions
All dimensions are given in millimetres.
The UMFT240XA module exclusively uses lead free components, and is fully compliant with European
Union directive 2002/95/EC.
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5.10IC Package Markings
1
FTDI
I
XXXXXXXXXX
18
FT240XQ
YYWW-D
7
12
The date code format is YYXX where XX = 2 digit week number, YY = 2 digit year number. This is
followed by the revision letter.
The code XXXXXXX is the manufacturing LOT code.
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6 UMFT240XA Module Circuit Schematic
Figure 6.1 – Module Circuit Schematic
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7 Internal MTP ROM Configuration
Following a power-on reset or a USB reset the FT240X will scan its internal MTP ROM and read the USB
configuration descriptors stored there. The default values programmed into the internal MTP ROM in the
FT240XQ used on the UMFT240XA are shown in Table 8.1.
Parameter
Value
USB Vendor ID (VID)
0403h
FTDI default VID (hex)
USB Product UD (PID)
6015h
FTDI default PID (hex)
Serial Number Enabled?
Notes
Yes
Serial Number
See Note
A unique serial number is generated and programmed into
the MTP ROM during final test of the UM232R module.
Pull down I/O Pins in USB
Suspend
Disabled
Enabling this option will make the device pull down on the
UART interface lines when the power is shut off (PWREN#
is high).
Manufacturer Name
FTDI
Product Description
UMFT240XA
Max Bus Power C urrent
Power Source
90mA
Bus Powered
Device Type
FT240X
USB Version
0200
Returns USB 2.0 device description to the host. Note: The
device is a USB 2.0 Full Speed device (12Mb/s) as opposed
to a USB 2.0 High Speed device (480Mb/s).
Remote Wake Up
Enabled
Taking RI# low will wake up the USB host controller from
suspend.
High C urrent I/Os
Disabled
Enables the high drive level on the UART and CBUS I/O
pins.
Load VC P Driver
Enabled
Makes the device load the CVP driver interface for the
device.
C BUS5
Tristate
C BUS6
Tristate
Table 7.1 – Default Internal MTP ROM Configuration
The internal MTP ROM in the FT240X can be programmed over USB using the utility program FT_PROG.
FT_PROG can be downloaded from the www.ftdichip.com. Users who do not have their own USB vendor
ID but who would like to use a unique Product ID in their design can apply to FTDI for a free block of
unique PIDs. Contact FTDI Support ([email protected]) for this service , also see TN_100 and
TN_101.
Copyright © Future Technology Devices International Limited
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UMFT240XA Datasheet
Version 1.3
D oc ument Reference N o.: FT _000520
C learance N o.: FT DI# 2 7 1
8 Contact Information
Head Office – Glasgow, UK
Branch Office – Tigard, Oregon, USA
Future Technology Devices International Limited
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United Kingdom
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Future Technology Devices International Limited (USA)
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USA
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E-mail (Sales)
E-mail (Support)
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Branch Office – Taipei, Taiwan
Branch Office – Shanghai, China
Future Technology Devices International Limited (Taiwan)
2F, No. 516, Sec. 1, NeiHu Road
Taipei 114
Taiwan , R.O.C.
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Fax: +886 (0) 2 8791 3576
Future Technology Devices International Limited (China)
Room 1103, No. 666 West Huaihai Road,
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Tel: +86 21 62351596
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E-mail (Sales)
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tw [email protected]
tw [email protected]
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Web Site
http://ftdichip.com
Distributor and Sales Representatives
Please visit the Sales Network page of the FTDI Web site for the contact details of our distributor(s) and sales
representative(s) in your country.
System and equipment manufac turers a nd des igners are res pons ible to ens ure that their sys tems , and any Future T ec hnology Devices
I nternational Ltd (FTDI ) devic es incorporated in their s ystems , meet all applicable safety, regulatory and sys tem-level performanc e
requirements . All application- related information in this doc ument (including applic ation desc riptions , s uggested FTDI devic es and other
materials ) is provided for reference only. While FTDI has taken c are to ass ure it is acc urate, this information is s ubjec t to c us tomer
c onfirmation, and FTDI disclaims all liability for sys tem designs and for any applic ations assis tanc e provided by FTDI . Us e of FTDI
devic es in life s upport and/or safety applications is entirely at the us er’s risk, and the us er agrees to defend, indemnify a nd hold
harmless FTDI from any and all damages , claims , s uits or expens e resulting from s uch use. T his doc ument is s ubject to change withou t
notice. N o freedom to use patents or other intellec tual property rights is implied by the publication of this doc ument. N either the whole
nor any part of the information c ontained in, or the product desc ribed in this document, may be adapted or reproduced in any material
or elec tronic form without the prior written c onsent of the c opyright holder. Future Tec hnology D evices I nternati onal L td, U nit 1 , 2
Seaward P lac e, C enturion Business P ark, G lasgow G 4 1 1HH, U nited Kingdom. Sc otland Registered Company N umber: SC136640
Copyright © Future Technology Devices International Limited
18
UMFT240XA Datasheet
Version 1.3
D oc ument Reference N o.: FT _000520
C learance N o.: FT DI# 2 7 1
Appendix A – References
Document References
DS_FT201x
DS_FT220X
DS_FT221X
DS_FT230X
DS_FT231X
DS_FT240X
DS_UMFT230XA
AN232R-01
AN_124 User Guide for FT Prog
TN_100 USB VID-PID Guidelines
TN_101 Guide to Debugging Customers Failed Driver Installation
Acronyms and Abbreviations
Terms
Description
DIP
Dual In-line Package
DLL
Dynamic Link Library
IC
Integrated Circuit
I²C
Inter Integrated Circuit
OS
Operating System
PCB
Printed Circuit Board
ROM
Read Only Memory
USB
Universal Serial Bus
VCP
Virtual COM Ports
Copyright © Future Technology Devices International Limited
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UMFT240XA Datasheet
Version 1.3
D oc ument Reference N o.: FT _000520
C learance N o.: FT DI# 2 7 1
Appendix B – List of Figures and Tables
List of Figures
Figure 4.1 – Module Pin Out ................................................................................................................... 5
Figure 5.1 – Bus Powered Configuration.................................................................................................. 9
Figure 5.2 – Self-Powered Configuration ............................................................................................... 10
Figure 5.3 – Bus Powered with Power Switching Configuration .............................................................. 11
Figure 5.4 – USB Bus Powered 3.3V Logic Drive .................................................................................... 12
Figure 5.5 – USB Self Powered 3.3V Logic Drive ................................................................................... 13
Figure 6.1 – UMFT240XA Module Dimensions ........................................................................................ 14
Figure 8.1 – Module Circuit Schematic .................................................................................................. 16
List of Tables
Table 4.1 – Module Pin Out Description................................................................................................... 6
Table 4.2 – CBUS Signal Options ............................................................................................................ 7
Table 5.1 – Solder Links JP1 Pin Description ........................................................................................... 8
Table 5.2 – Solder Links JP2 Pin Description ........................................................................................... 8
Table 9.1 – Default Internal MTP ROM Configuration ............................................................................. 17
Copyright © Future Technology Devices International Limited
20
UMFT240XA Datasheet
Version 1.3
D oc ument Reference N o.: FT _000520
C learance N o.: FT DI# 2 7 1
Appendix C – Revision History
Document Title:
UMFT240XA USB to 8-bit 245 FIFO Development Module
Document Reference No.:
FT_000520
Clearance No.:
FTDI# 271
Product Page:
http://www.ftdichip.com/FT-X.htm
Document Feedback:
Send Feedback
Revision
Changes
Date
1.0
Initial Release
2012-02-09
1.0
Added links, references to silicon revision, TID and
logos
2012-06-12
1.2
Added a section for package marking and changed
TIDs; Edited figure 4.1, 5.2, 5.3, 5.4, 5.5 and 8.1 –
2013-01-29
1.3
Added ordering information and support for Win 10
2016-04-13
WR# to WR
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21