` VFJA1491P - PRELIMINARY Jitter Attenuator / Clock Generator Features Frequency Range 10MHz to 200 MHz 14mm x 9mm Surface Mount Package 3.3V LVPECL Output Low Jitter/Phase Noise Tape and Reel Packaging Applications Telecom Switching Wireless Communication Timing over Packet Description The VFJA1491P is a Jitter Attenuator which accepts an input reference clock up to 200 MHz and provides an output frequency up to 200 MHz. The output frequency is determined by a VCXO designed for low phase noise. The VFJA1491P is available in a 14 mm x 9 mm surface mount package. Filter F in R-Divider VCXO PFD Fout Disable EE Prom N- Divider Block Diagram 75 South Street, Hopkinton, MA 01748 • 800-982-5737 • 508-435-6831 • FAX 508-435-528 Rev A1115 `PRELIMINARY - VFJA1491P Jitter Attenuator / Clock Generator Electrical Specifications Parameter Symbol Input Frequency F in Input Level Output Frequency Output Voltage Levels Duty Cycle Rise / Fall Times F out VOH VOL Modulation BW Operating Temperature Range Jitter Min Typical Max Unit Slew Rate 1.0V/ns 10 - 200 MHz DC coupled internally 0.4 3.3 Vp-p 10 200 MHz Vcc-.95 Vcc-1.65 45 Vcc-.85 Vcc-1.53 55 0.5 V V % ns 50 Ω to Vcc-2V or Thevenin Equivalent @ 50% Vout (p-p) 20% to 80% Tr/Tf Lock Range Conditions & Remarks APR MBW SSB Output Phase Noise @ 156.25 MHz Ta ±20 ppm 10 Hz -40 Фn 12kHz to 20 MHz 65 100 Hz offset 1K Hz offset 10K Hz offset 100K Hz offset 1M Hz offset -101 -128 -146 -156 -160 Start up Time Supply Voltage Input Current +3.15 +85 °C 120 fs dBc/Hz 2 3 s 3.30 85 +3.45 100 V mA Logic “0” (< 0.5V or floating) Output Enabled Logic”1” (> 2.2V) Output Disabled Enable / Disable Enable/Disable Time LVCMOS 100 ns Max Unit Absolute Maximum Ratings Parameter Supply Breakdown Voltage Storage Temperature Conditions & Remarks Min Typical Vcc -0.5 +4.0 V Ts -50 +95 C 75 South Street, Hopkinton, MA 01748 • 800-982-5737 • 508-435-6831 • FAX 508-435-528 Rev A1115 `PRELIMINARY - VFJA1491P Jitter Attenuator / Clock Generator Mechanical and Environmental Mechanical Shock Thermal Shock Vibration Soldering Conditions Hermetic Seal Per MIL-STD-202, Method 213, Condition E Per MIL-STD-883, Method 1011, Condition A Per MIL-STD-883, Method 2007, Condition A 260C for 10s max -8 Leak rate less than 5x10 atm.cc/s of helium (crystal only) Phase Noise Performance @ Fout = 156.25 MHz Notes: 75 South Street, Hopkinton, MA 01748 • 800-982-5737 • 508-435-6831 • FAX 508-435-528 Rev A1115 `PRELIMINARY - VFJA1491P Jitter Attenuator / Clock Generator Connection Diagram Pin Assignments Vcc = 3.3V Disable C1 Pin # Connection 180 Ω 1 2 Fin Disable nFout 3 4 5 Case, Gnd Fout NFout 6 Vcc R1 6 2 4 1 5 3 R2 Gnd Mechanical Specifications Marking VFJA1491P xxx.xxx MHz (Fout) xxx.xxx MHz (Fin) XXYY (Date) 75 South Street, Hopkinton, MA 01748 • 800-982-5737 • 508-435-6831 • FAX 508-435-528 Rev A1115