PIC12F683 Rev. A Silicon/Data Sheet Errata

PIC12F683
PIC12F683 Rev. A Silicon/Data Sheet Errata
The PIC12F683 parts you have received conform
functionally to the Device Data Sheet (DS41211D),
except for the anomalies described below.
Microchip intends to address all issues listed here in
future revisions of the PIC12F683 silicon.
1. Module: Resets (when WDT times out)
If the OPTION_REG bits, PS<2:0>, are clear,
multiple spurious Resets can occur when the WDT
times out. These Resets can occur even when the
PSA bit is clear, assigning the prescaler to the
Timer0.
2. Module: ECCP with Auto-Shutdown
(Silicon Rev. A1 and B1)
The PIC12F683 Rev. A1 silicon for the ECCP
Auto-Shutdown is connected to the CMIF flag. See
Figure 8-2 on the following page.
Rev. A1’s auto-shutdown connection to CMIF
causes the auto-shutdown to incorrectly operate
synchronously. Additionally, reads of CMCON0 will
incorrectly clear an auto-shutdown event.
Work around
Rev. A1 Silicon
Work around
1)
Poll the COUT bit until it is low.
If a CLRWDT instruction is issued before the WDT
times out and before the OPTION register is
modified, this problem is eliminated.
2)
Read CMCON1 to precondition CMIF.
3)
If CMCON0 is read while COUT is changing,
repeat steps 1 and 2.
Date Codes that pertain to this issue:
Fix
All engineering and production devices.
Rev. B1 Silicon
The Silicon Rev. B1 device (now shipping) has
moved the auto-shutdown connection from CxIF to
CxOUT. This will eliminate the synchronous
shutdown and simplify the use of the comparator
for a shutdown event. Figure 1 shows the function
of auto-shutdown before and after the device
revision.
© 2007 Microchip Technology Inc.
DS80196F-page 1
PIC12F683
FIGURE 8-2:
COMPARATOR C1 OUTPUT BLOCK DIAGRAM
PORT Pins
MULTIPLEX
CINV
To COUT
C1
Rev. B1: To ECCP
Auto-Shutdown
D
Q1
To Data Bus
Q
EN
RD CMCON0
Set CMIF bit
D
Q3*RD CMCON0
Q
Rev. A1: To ECCP
Auto-Shutdown
EN
CL
Reset
Note 1:
2:
FIGURE 1:
Q1 and Q3 are phases of the four-phase system clock (FOSC).
Q1 is held high during Sleep mode.
SILICON REVISION A1 VS. REVISION B1
A1 CCP Output
B1 CCP Output
COUT
CMIF
Uncertainty due to
Q1 cycle delay
DS80196F-page 2
Read CMCON0
Uncertainty due to
Q1 cycle delay
Read CMCON0
© 2007 Microchip Technology Inc.
PIC12F683
Clarifications/Corrections to the Data
Sheet:
In the Device Data Sheet (DS41211D), the following
clarifications and corrections should be noted.
None.
REVISION HISTORY
Rev A Document (7/2004)
Changes made to CCP1M<1> in the CCP1CON
Register. CCP1M<1> changes from 11xx to 111x
(inverted mode) and 110x (normal mode).
Rev B Document (8/2004)
Issue 1 – When OPTION_REG bits, PS<2:0>, are
clear, multiple spurious Resets can occur when the
WDT times out.
Clarification/Corrections to the Data Sheet: Issue 2 –
Changed to 8-pin MF saw singulated packaging.
Rev. C Document (07/2005)
Data Sheet Clarifications/Corrections Section: Added
Module 3: New 4x4 DFN Package added.
Rev. D Document (10/2005)
Data
Sheet
Clarifications/Corrections
Section:
Replaced 8-Lead Plastic Dual Flat No Lead Package
4x4 (DFN).
Rev E Document (7/2006)
Added Module 2 (ECCP with Auto-Shutdown). Data
Sheet Clarifications/Corrections Section: Removed
Items 1 through 3, which have been incorporated into
the data sheet. Added Item 1, updating the 6x5mm
DFN saw singulated packaging.
Rev F Document (4/2007)
Data
Sheet
Clarifications/Corrections
Removed Module 1 per data sheet update.
© 2007 Microchip Technology Inc.
Section:
DS80196F-page 3
PIC12F683
NOTES:
DS80196F-page 4
© 2007 Microchip Technology Inc.
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•
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•
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© 2007 Microchip Technology Inc.
DS80196F-page 5
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DS80196F-page 6
© 2007 Microchip Technology Inc.