Four-String, White LED Driver for LCD Backlight Applications ADD5211 Data Sheet FEATURES GENERAL DESCRIPTION White LED driver based on an inductive boost controller Wide input voltage range: 4.5 V to 40 V Adaptive output voltage to minimize power dissipation Adjustable operating frequency: 200 kHz to 1.2 MHz Programmable UVLO Programmable soft start time for boost converter Programmable external MOSFET switching rising/falling time Drives up to 4 LED current sinks with internal MOSFETs Brightness control with PWM input Adjustable LED current: 40 mA to 200 mA Headroom control to maximize efficiency LED dimming frequency: up to 25 kHz PWM dimming at 300 Hz: 1000:1 Open-drain fault indicator LED open and LED short fault protection Thermal shutdown Undervoltage lockout (UVLO) 24-lead, 4 mm × 4 mm LFCSP The ADD5211 is a four-string, white LED driver for backlight applications based on high efficiency, current mode, step-up converter technology. The boost controller drives an external MOSFET switch for step-up regulation from an input voltage of 4.5 V to 40 V and a pin adjustable operating frequency from 200 kHz to 1.2 MHz. An adjustable UVLO function is implemented to reduce input current during power-off. The ADD5211 provides four regulated current sinks for uniform brightness intensity. Each current sink can be driven from 40 mA to 200 mA; the LED driving current is pin adjustable using an external resistor. With an input PWM interface, the ADD5211 drives up to four parallel strings of multiple series connected LEDs. Additional features include LED short protection, LED open protection, boost output short protection, overvoltage protection, cycle-by-cycle current limit, and thermal shutdown for both the IC and the LED array. An open-drain fault output is also included. A programmable soft start is implemented to reduce inrush current during startup. APPLICATIONS LCD monitor and TV LED backlights Industrial lighting APPLICATION CIRCUIT VIN + UVLO VIN GATE_P GATE_N VDR CS RAMP OFF ON EN PGND PWM OVP FAULT ADD5211 VDD FB4 FB3 FB2 LSD FB1 ISET LGND COMP SS 10555-001 AGND FREQ Figure 1. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADD5211 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configuration and Function Descriptions..............................7 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................8 General Description ......................................................................... 1 Theory of Operation ...................................................................... 10 Application Circuit ........................................................................... 1 Current Mode, Step-Up Switching Controller ....................... 10 Revision History ............................................................................... 2 LED Current Regulation ........................................................... 11 Detailed Functional Block Diagram .............................................. 3 Fault Protection .......................................................................... 12 Specifications..................................................................................... 4 Applications Information .............................................................. 14 General Specifications ................................................................. 4 Layout Guidelines....................................................................... 14 Step-Up Switching Controller Specifications ........................... 5 Boost Component Selection ..................................................... 14 LED Current Regulation Specifications .................................... 5 Typical Application Circuits ......................................................... 17 Absolute Maximum Ratings ............................................................ 6 Outline Dimensions ....................................................................... 18 Thermal Resistance ...................................................................... 6 Ordering Guide .......................................................................... 18 ESD Caution .................................................................................. 6 REVISION HISTORY 10/13—Revision 0: Initial Version Rev. 0 | Page 2 of 20 Data Sheet ADD5211 DETAILED FUNCTIONAL BLOCK DIAGRAM VDR OVP BOOST CONTROL R PWM COMP FB_REF gm FB_MIN S ERROR AMP COMP GATE_P Q SWITCH DRIVER R GATE_N PGND STARTUP OSC FREQ SOFT START SS CURRENT SENSE CS RAMP DREF DCOMP + OVP_REF RAMP + OVP ADD5211 OVP BOOST SCP_REF SCP ×10 OVP POR FAULT DETECTOR FAULT LSD POR OPEN LED DETECTOR THERMAL SHUTDOWN SHORT LED DETECTOR UNUSED STRING DETECTOR LINEAR REGULATOR VDR VIN DEVICE ENABLE FB_MIN EN STRING VOLTAGE DETECTOR BAND GAP REFERENCE 500kΩ AGND CURRENT SOURCE 1 FB1 AGND UVLO DETECTOR UVLO VOLTAGE REGULATOR CURRENT SOURCE 2 FB2 VDD CURRENT SOURCE 3 POR CONTROL LOGIC PWM 500kΩ FB3 VDD BOOST CONTROL STARTUP DIMMING CONTROL CURRENT SOURCE 4 FB4 AGND BOOST SHORT REF DIMMING CONTROL LGND 10555-002 THERMAL SHUTDOWN ISET Figure 2. Rev. 0 | Page 3 of 20 ADD5211 Data Sheet SPECIFICATIONS VIN = 12 V, EN = 3.3 V, TJ = −40°C to +125°C, unless otherwise noted. Typical values are at TA = 25°C. GENERAL SPECIFICATIONS Table 1. Parameter SUPPLY Input Voltage Range Quiescent Current Shutdown Supply Current VIN Rising Threshold VIN Falling Threshold VDR REGULATOR Regulated Output Dropout Voltage VDD REGULATOR Regulated Output PWM INPUT Input High Voltage Input Low Voltage PWM Input Current PWM High to LED Turn-On Delay 1 PWM Low to LED Turn-Off Delay1 EN CONTROL EN Voltage High EN Voltage Low EN Pin Input Current UNDERVOLTAGE LOCKOUT UVLO Threshold (Rising) UVLO Hysteresis FAULT Sink Resistance Fault Pin Leakage Current LED SHORT DETECTION LED Short Detection Enable Threshold LED Short Gain LED Short Gain Control Range1 LED FAULT DETECTION DELAY1 LED Open Fault Delay LED Short Fault Delay OVERVOLTAGE PROTECTION Overvoltage Threshold (Rising) Overvoltage Hysteresis Overvoltage Pin Leakage Current Output Short-Circuit Threshold (Falling) Output Short-Circuit Recovery (Rising) THERMAL SHUTDOWN1 Thermal Shutdown Threshold Thermal Shutdown Hysteresis 1 Symbol VIN IQ ISD VUVLOR_VIN VUVLOF_VIN VVDR_REG VVDR_DROP Test Conditions/Comments Min Typ 4.5 2.8 EN = 0 V Minimum VIN for startup 3.2 4 3.65 Max Unit 40 6 1 4.3 V mA µA V V 4.75 5.1 350 5.45 580 V mV VVDD_REG 3.0 3.3 3.6 V VPWM_HIGH VPWM_LOW 2.2 8 0.8 30 V V µA µs µs 17 0.8 30 V V µA 1.19 100 1.27 V mV 40 100 1.5 Ω µA 2.5 10 VDD 13 2.0 V VIN = 4.5 V PWM = 5 V 11 1.6 0.8 2.2 EN = 5 V 13 1.10 VLSD LSD = 1.0 V 2.2 7.5 0.3 5 15 OVP_REF OVP_HYS 2.3 2.5 100 V µs µs 2.7 VSCPF VSCPR 100 150 V mV nA mV mV TSD TSDHYS 150 25 °C °C 200 Guaranteed by design. Rev. 0 | Page 4 of 20 Data Sheet ADD5211 STEP-UP SWITCHING CONTROLLER SPECIFICATIONS Table 2. Parameter BOOST FREQUENCY OSCILLATOR Switching Frequency Range Switching Frequency PWM COMPARATOR Maximum Duty Cycle Leading Edge Blanking Time CURRENT SENSE LIMIT COMPARATOR Current-Limit Threshold SLOPE COMPENSATION Peak Slope Compensation Ramp ERROR AMPLIFIER Transconductance Output Resistance COMP Sink Current COMP Source Current MOSFET DRIVER Source Voltage Gate On Resistance Gate Off Resistance Rising Time Falling Time SOFT START Soft Start Pin Current Symbol Test Conditions/Comments fSW RFREQ = 50 kΩ RFREQ = 50 kΩ CSLIMIT Independent of duty cycle Min Typ Max Unit 200 280 360 1200 430 kHz kHz 89 94 145 98 % ns 275 345 400 mV RRAMP = 5 kΩ gm R 8 V < VIN < 40 V RDS_GATE_P RDS_GATE_N tR tF C = 1 nF C = 1 nF ISS 45 μA 570 72 400 400 μA/V MΩ μA μA 5.1 5.8 2.4 26 21 V Ω Ω ns ns 2.1 μA LED CURRENT REGULATION SPECIFICATIONS Table 3. Parameter CURRENT SINK Current Sink Range Current Sink String-to-String Tolerance1 Current Accuracy2 Minimum Headroom Voltage Off Current Off State Clamping Current 1 Symbol Test Conditions/Comments ILED ILED100 ΔIFB100 ΔILED100 VHR IOFF ICLAMP RSET = 15 kΩ, TA = 25°C RSET = 15 kΩ, TA = 25°C RSET = 15 kΩ, TA = 25°C RSET = 15 kΩ, TA = 25°C VFB = 40 V, EN = 0 V VFB = 55 V, EN = 0 V where IFB100 is the LED current of each string. Current accuracy is the delta between average current, ILED100, and 100 mA with respect to 100 mA. I LED100 where I LED100 100 mA 100% 100 mA I LED100 IFB1 IFB2 IFB3 IFB4 4 Rev. 0 | Page 5 of 20 Typ 40 98 0.45 0.4 0.55 4 20 String-to-string tolerance is the greatest delta between FBx currents with respect to the average of the FBx currents. I I FB100(MIN) I LED100 FB100(MAX) I LED100 I FB100 Max 100% : 100% I LED100 I LED100 2 Min Max Unit 200 102 2.5 2.0 0.85 1.5 80 mA mA % % V μA μA ADD5211 Data Sheet ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. THERMAL RESISTANCE Table 4. θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Parameter VIN, UVLO FB1, FB2, FB3, FB4 EN PWM, FAULT VDR, GATE_N, GATE_P COMP, CS, FREQ, ISET, LSD, OVP, RAMP SS AGND, PGND, LGND Maximum Junction Temperature (TJ max) Operating Temperature Range (TA) Storage Temperature Range (TS) Reflow Peak Temperature (20 sec to 40 sec) Rating −0.3 V to +45 V −0.3 V to +55 V −0.3 V to +17 V −0.3 V to +8 V −0.3 V to +7 V −0.3 V to +3.6 V −0.3 V to VDD −0.3 V to +0.3 V 150°C Table 5. Thermal Resistance Package Type 24-Lead LFCSP ESD CAUTION −25°C to +85°C −65°C to +150°C 260°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0 | Page 6 of 20 θJA 40.5 θJC 3.8 Unit °C/W Data Sheet ADD5211 19 PGND 21 CS 20 RAMP 22 GATE_N 24 AGND 23 GATE_P PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 18 OVP VDR 1 UVLO 2 17 FB4 ADD5211 EN 4 TOP VIEW 16 FB3 15 LGND LSD 12 VDD 11 ISET 10 FREQ 9 13 FB1 SS 7 14 FB2 FAULT 6 COMP 8 PWM 5 NOTES 1. CONNECT THE EXPOSED PAD TO GROUND. 10555-003 VIN 3 Figure 3. Pin Configuration Table 6. Pin Function Descriptions Pin No. 1 2 Mnemonic VDR UVLO 3 4 5 6 7 8 VIN EN PWM FAULT SS COMP 9 10 11 FREQ ISET VDD 12 13 14 15 16 17 18 19 20 21 22 23 24 LSD FB1 FB2 LGND FB3 FB4 OVP PGND RAMP CS GATE_N GATE_P AGND EP Description Switching MOSFET Gate Driver Supply Pin. Bypass VDR to AGND with a 1 µF bypass capacitor. Input Undervoltage Lockout. Set the start-up and shutdown input voltage level by connecting this pin to the input voltage with a resistor divider. Supply Input Pin. Bypass VIN to AGND with a 0.1 µF bypass capacitor. Shutdown Control Pin for PWM Input Operation Mode. PWM Signal Input. Open-Drain Fault Output. Soft Start Pin. Compensation for the Boost Converter. A capacitor and a resistor are connected in series between ground and this pin for stable operation. Frequency Select. A resistor from this pin to ground sets the boost switching frequency from 200 kHz to 1.2 MHz. Full-Scale LED Current Set Pin. A resistor from this pin to ground sets the LED current up to 200 mA. Internal Linear Regulator Output. This regulator provides power to the ADD5211. Bypass VDD to AGND with a 1 µF bypass capacitor. LED Short Voltage Level Setting Pin. To disable LED short protection, connect this pin to VDD. Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. If unused, connect FB1 to LGND. Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. If unused, connect FB2 to LGND. LED Current Sink Ground. Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. If unused, connect FB3 to LGND. Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. If unused, connect FB4 to LGND. Overvoltage Protection. The boost converter output is connected to this pin with a resistor divider. Power Ground. Ramp Compensation Pin. Current Sense Input. Allows the current sensing to control the boost converter and to limit the switching current. Switching MOSFET Gate Low Driving Pin. Switching MOSFET Gate High Driving Pin. Analog Ground. Exposed Pad. Connect the exposed pad to ground. Rev. 0 | Page 7 of 20 ADD5211 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 112 1.8 110 1.6 106 1.4 104 1.2 ΔIFB100 (%) ILED100 (mA) 108 102 100 98 1.0 0.8 96 0.6 94 0.4 92 0.2 5 15 25 35 45 55 65 75 85 95 TEMPERATURE (°C) 0 –35 –25 –15 –5 10555-004 88 –35 –25 –15 –5 15 25 35 45 55 65 75 85 95 TEMPERATURE (°C) Figure 7. ΔIFB100 vs. Temperature Figure 4. ILED100 vs. Temperature 22 6.0 20 5.5 18 5.0 16 VDR VOLTAGE (V) 14 12 TA = –25°C 10 8 TA = +85°C 4.5 4.0 3.5 3.0 4 2.5 2 2.0 0 5 10 15 20 25 30 35 40 45 50 55 FB VOLTAGE (V) 1.5 10555-006 0 0 5 10 15 30V/DIV 40 VFB2 20V/DIV 20V/DIV 2 VFB3 PWM 20V/DIV 3 3V/DIV VFB4 IFB 100mA/DIV 1ms/DIV 4 10555-008 4 35 20V/DIV 1 VFB 3 30 VFB1 VSW 2 25 Figure 8. VDR Voltage vs. Input Voltage Figure 5. FB Leakage Current vs. FB Voltage 1 20 INPUT VOLTAGE (V) 10555-007 6 20V/DIV 1ms/DIV Figure 9. FB1 to FB4 Waveforms, PWM Duty Cycle = 50% Figure 6. PWM Dimming Waveform, PWM Duty Cycle = 50% Rev. 0 | Page 8 of 20 10555-009 FB LEAKAGE CURRENT (µA) 5 10555-005 90 Data Sheet ADD5211 1 30V/DIV VFB VFB 20V/DIV 2 20V/DIV EN EN 3V/DIV 3 3V/DIV 3 20V/DIV 4 20ms/DIV VIN 10555-010 VIN 20V/DIV 4 20ms/DIV Figure 10. Startup (Brightness = 100%, EN Is High, VIN Goes from Low to High) Figure 13. Startup (Brightness = 100%, VIN Is High, EN Goes from Low to High VSW VSW 30V/DIV 1 30V/DIV 1 VFB VFB 20V/DIV 2 20V/DIV 2 EN EN 3V/DIV 3 3V/DIV 3 20V/DIV 20ms/DIV VIN 10555-012 VIN 4 20V/DIV 4 20ms/DIV Figure 11. Startup (Brightness = 10%, EN Is High, VIN Goes from Low to High) Figure 14. Startup (Brightness = 10%, VIN Is High, EN Goes from Low to High VFB1 VOUT 30V/DIV 2 10555-011 2 VSW 30V/DIV 10555-013 1 VSW 50V/DIV 1 VFB2 20V/DIV 2 PWM FAULT 3V/DIV 3V/DIV 3 IFB1 100mA/DIV 5µs/DIV IFB1 100mA/DIV 4 10555-014 4 Figure 12. LED Current Rising and Falling Waveform 1ms/DIV Figure 15. LED Open Protection (Open LED on FB2) Rev. 0 | Page 9 of 20 10555-015 3 ADD5211 Data Sheet THEORY OF OPERATION UVLO Pin The UVLO pin is used to control the VIN voltage at which the ADD5211 starts up. This function is accomplished using a resistor divider between the input voltage and the UVLO pin, as shown in Figure 16. VIN CURRENT MODE, STEP-UP SWITCHING CONTROLLER RUVLO1 The ADD5211 is a current mode, PWM boost controller that operates at a fixed switching frequency from 200 kHz to 1.2 MHz. The switching frequency is set by an external resistor connected from the FREQ pin to AGND. The minimum headroom voltage—which is monitored at the FB1, FB2, FB3, and FB4 pins—is compared with the internal reference voltage by the internal transconductance error amplifier to create an error current at COMP. A resistor and capacitor connected from the COMP pin to AGND convert the error current to an error voltage. At the beginning of the switching cycle, the MOSFET is turned on and the inductor current ramps up. The MOSFET current is measured and converted to a voltage using the current sense resistor (RCS) and is added to the stabilizing slope compensation ramp from the ramp resistor (RRAMP). The resulting voltage sum passes through the current sense amplifier to generate the current sense voltage. Under light loads, the converter can also operate in discontinuous mode with pulse skip modulation to maintain output voltage regulation. The current mode regulation system of the ADD5211 allows fast transient responses while maintaining a stable output voltage. By selecting the proper resistor-capacitor network from COMP to AGND, the regulator response can be optimized for a wide range of input voltages, output voltages, and load currents. Input Voltage The ADD5211 can be powered directly from the VIN pin, which accepts a voltage from 4.5 V to 40 V. The voltage on the VIN pin must exceed VUVLOR_VIN (4.0 V typical) for startup. The ADD5211 has two linear regulators: a 3.3 V linear regulator (VDD), which supplies power to the internal control circuitry, and a 5.1 V linear regulator (VDR), which supplies power to the internal GATE_P and GATE_N drivers. RUVLO2 UVLO_REF UVLO PIN 10555-016 The ADD5211 uses a PWM boost controller to generate the minimum output voltage required to drive the LED string at the programmed LED current. The current mode control architecture allows a fast transient response while maintaining a stable output voltage. The boost converter provides power to the LED strings, and the four current sinks control the LED current with dynamic headroom control to improve efficiency. Figure 16. Undervoltage Lockout Circuit The startup voltage, as determined by the resistor divider to the UVLO pin, can be calculated using the following equation: VIN(START) = (1.19 V/RUVLO2) × (RUVLO1 + RUVLO2) To start the device at the lowest possible VIN level, select an RUVLO1 value of 100 kΩ (or greater) and do not connect RUVLO2. If UVLO is controlled from a separate voltage source, make sure that a 100 kΩ (or greater) resistor is in series between the voltage source and the UVLO pin. Enable and Disable To enable the ADD5211, the voltage at the EN pin must be higher than 2.2 V. To disable the ADD5211, the voltage at the EN pin must be lower than 0.8 V. An internal 500 kΩ resistor is connected between EN and AGND. Internal 3.3 V Regulator (VDD) The ADD5211 contains a 3.3 V linear regulator (VDD) that is used to bias the internal control circuitry. The VDD regulator requires a 1 µF bypass capacitor. Place this bypass capacitor between VDD and AGND, as close as possible to the VDD pin. Internal 5.1 V Regulator (VDR) The ADD5211 contains a 5.1 V linear regulator (VDR) that is used to supply the MOSFET gate driver. The VDR regulator requires a 1 µF bypass capacitor. Place this bypass capacitor between VDR and AGND, as close as possible to the VDR pin. Rev. 0 | Page 10 of 20 Data Sheet ADD5211 Frequency LED CURRENT REGULATION The ADD5211 boost converter switching frequency (fSW) is user adjustable from 200 kHz to 1.2 MHz using an external resistor, RFREQ (see Figure 17). Current Sink 1000 If the ADD5211 current sink voltage is greater than 45 V, a Zener diode and a 410 kΩ resistor in parallel with the current sink are activated (see Figure 18). 800 Programming the LED Current 600 As shown in Figure 22, the ADD5211 has an LED current set pin (ISET). A resistor (RSET) from the ISET pin to AGND adjusts the LED current from 40 mA to 200 mA. The LED current level can be set using the following equation: 400 200 0 20 10 30 40 50 60 70 80 RFREQ (kΩ) 90 100 10555-017 ILED (mA) = 1500/RSET (kΩ) 0 The resulting minimum current sink voltage (FB_REF) is given by FB_REF = 0.23 + 0.0041 × ILED (mA) Figure 17. Switching Frequency vs. RFREQ The following equation can also be used to calculate the typical switching frequency: f SW (kHz) = 19,000 RFREQ (k Ω) − 30,000 (RFREQ (k Ω))2 Soft Start At startup, the voltage at the SS pin ramps up slowly by charging the soft start capacitor (CSS) from an internal 2.1 μA (typical) current source. The peak inductor current follows the SS pin ramp to provide a controlled start-up profile. The soft start cycle is complete when the SS pin reaches its final value of 1.19 V (typical). A capacitor must always be connected to the SS pin. The soft start time can be calculated as follows: tSS = (CSS × 1.19 V)/2.1 µA For a typical setup, a 27 nF soft start capacitor results in negligible input current overshoot at startup, making it suitable for most applications. However, if an unusually large output capacitor is used, a longer soft start period is required to prevent input inrush current and output voltage overshoot of the boost switching regulator. Conversely, if fast startup is required, the value of the soft start capacitor can be reduced to allow the boost output to start quickly, but allow greater peak switch current during startup and larger boost output overshoot. where 40 mA < ILED < 200 mA. If only one or two LED strings are used, it is most efficient to connect the FBx pins in parallel and adjust RSET accordingly. This configuration gives the lowest VFB operating voltage and improves efficiency. For example, to drive two LED strings at 100 mA, connect FB1 and FB2 together for one LED string, and connect FB3 and FB4 together for the other LED string. Then, set RSET to 30.1 kΩ (50 mA). The minimum FBx voltage is now 0.44 V (typical) instead of 0.64 V (typical). See Figure 23 for an example of a two-string application. PWM Dimming Control The ADD5211 features LED brightness control using an external PWM signal applied at the PWM pin. A logic high signal on the PWM input enables the LED current sinks; a logic low signal disables them. If the PWM input remains low for 50 ms, the ADD5211 stops boost regulation and enters shutdown mode. If the PWM input returns high after the ADD5211 enters shutdown, the device initiates a new soft start sequence. FBx CURRENT CONTROL 410kΩ VZ = 45V DIMMING CONTROL LGND Figure 18. Current Sink Circuit Rev. 0 | Page 11 of 20 10555-018 SWITCHING FREQUENCY (kHz) 1200 The ADD5211 contains four current sinks to provide accurate current sinking for each LED string. The current for each LED string is adjusted from 40 mA to 200 mA using an external resistor. Connect any unused FBx pins to LGND. ADD5211 Data Sheet FAULT PROTECTION Fault protections in the ADD5211 include boost output overvoltage protection, LED short protection, LED open protection, boost output short-circuit protection, and thermal shutdown. The FAULT pin provides an alert for some of these conditions (see Table 7). The LED short protection threshold can be calculated using the following equations: VLSD = (3.3 V/(RLSD1 + RLSD2)) × RLSD2 VLED_SHORT_THRESHOLD = 10 × VLSD To disable LED short protection, set the voltage of the LSD pin to a value greater than 3 V, or connect the pin to the VDD pin. Boost Output Overvoltage Protection (OVP) LED Open Protection The ADD5211 contains an overvoltage protection (OVP) circuit to prevent potential damage if the output voltage becomes excessive for any reason. OVP is implemented with a resistor divider from the boost output to the OVP pin. When the OVP pin voltage reaches 2.5 V (typical), the boost controller stops switching, which causes the output voltage and the OVP pin voltage to decrease. When the OVP pin voltage decreases below the OVP falling threshold (2.4 V typical), the boost converter resumes switching. The ADD5211 contains a headroom control circuit to minimize power loss at each current sink. Therefore, the minimum feedback voltage is achieved by regulating the output voltage of the boost converter. If any LED string is open circuit during normal operation, the current sink voltage (VFBx) will be near 0 V. LED open protection is activated if VFBx is less than 100 mV (typical) and the boost converter output voltage reaches VOUT_OVP. The ADD5211 then disables the open LED string and pulls the open-drain fault indicator low. The remaining LED strings continue to operate normally. If all LED strings are open, the ADD5211 shuts down. BOOST OUTPUT Boost Output Short-Circuit Protection (SCP) OVP_REF ROVP2 10555-019 OVP OVP Figure 19. Boost Output Overvoltage Protection Circuit The OVP threshold can be calculated using the following equation: The ADD5211 contains an SCP circuit to prevent boost converter damage if the Schottky diode becomes open or the boost converter output is shorted to ground for any reason. When the voltage on the OVP pin falls below 100 mV (typical), the boost converter stops switching until the OVP voltage rises to 150 mV (typical). The SCP function is disabled during boost converter soft start. VOUT_OVP = (2.5 V/ROVP2) × (ROVP1 + ROVP2) BOOST OUTPUT LED Short Protection If an LED in one of the LED strings is shorted, the voltage of the FBx pin that is connected to the faulty LED string increases to regulate the LED current. If this FBx pin reaches the LED short protection threshold (10× the voltage at the LSD pin) during normal operation, the ADD5211 disables the FBx pin that is connected to the shorted LED string and pulls down the FAULT pin. VDD ROVP1 SCP_REF SCP ROVP2 OVP 10555-021 ROVP1 Figure 21. Boost Output Short-Circuit Protection Circuit The boost output short-circuit protection threshold can be calculated using the following equation: VOUT_SCP = (0.15 V/ROVP2) × (ROVP1 + ROVP2) LSD_REF ×10 RLSD2 LSD Thermal Shutdown (TSD) LSD ENABLE SHORT STRING DETECTOR FBx 10555-020 RLSD1 Thermal overload protection prevents excessive power dissipation from overheating and damaging the ADD5211. When the junction temperature (TJ) exceeds 150°C (typical), a thermal sensor immediately activates the fault protection, which shuts down the device and allows it to cool. The device restarts when the junction temperature (TJ) of the die falls below 125°C (typical). Figure 20. LED Short Protection Circuit Rev. 0 | Page 12 of 20 Data Sheet ADD5211 Table 7. Fault Protection Fault Boost output overvoltage LED string short Description VOVP > OVP_REF VFBx > 10 × VLSD; PWM pin is high LED string open VFBx < 0.1 V; VOVP > OVP_REF; PWM pin is high RSET short to AGND RSET is shorted to AGND Boost output short VOVP < 100 mV (typical) after soft start Thermal shutdown TJ > 150°C (typical) Boost Regulation Response Stop switching until VOVP < 2.4 V (typical) Shorted LED string disabled; other LED strings operate normally Open LED string disabled; other LED strings operate normally ADD5211 shuts down; automatic restart if RSET returns to normal resistance range ADD5211 shuts down; automatic restart if VOVP rises above 150 mV (typical) ADD5211 shuts down; automatic restart after TJ falls below 125°C (typical) Rev. 0 | Page 13 of 20 FAULT Pin State Open Pulled down Pulled down Open Pulled down Pulled down ADD5211 Data Sheet APPLICATIONS INFORMATION LAYOUT GUIDELINES To achieve high efficiency, good regulation, and stability, a good PCB layout is required. Use the following general guidelines when designing PCBs: Ensure that the high current loop from CIN to L1 to Q1 to RCS then back to the ground of CIN is as short as possible. Ensure that the high current loop from CIN to L1 to D1 to COUT then back to the ground of CIN is as short as possible. Make high current traces as short and wide as possible. Keep nodes that are connected to L1, Q1, and D1 away from sensitive traces, such as COMP, to prevent coupling of the traces. If such traces must be run near each other, place a ground trace between the two as a shield. Place the compensation components as close as possible to the COMP pin. Use thermal vias and a thermal pad with the same dimensions as the exposed pad on the bottom of the package. Heat Sinking When using a surface-mount power IC or external power switches, the PCB can often be used as the heat sink. This is achieved by using the copper area of the PCB to transfer heat from the device; maximizing this area optimizes thermal performance. BOOST COMPONENT SELECTION Verify that the worst-case duty cycle does not exceed the maximum allowed value (89%) given in Table 2. For the worst-case duty cycle, use the minimum VIN and the maximum VOUT. The maximum VOUT is given by VOUT_MAX = N × VF MAX + 1 V where: N is the number of LEDs per string. VF MAX is the maximum LED forward voltage. Selecting the Inductor When selecting the inductor, consider these inductor properties: inductance, maximum saturation current, resistance (DCR), and physical size. Choose an inductance such that ΔIL is 20% to 40% of IL (AVG). L= IPK = IL (AVG) + (ΔIL/2) where: ΔIL = (VIN × D)/(L × fSW) IL (AVG) = (4 × ILED)/(η × (1 − D)) ILED is the LED current per string. D is the duty cycle (D = (VOUT − VIN)/VOUT). 0.3 f SW I OUT where IOUT is the total LED current through all the strings. The saturation current is generally listed as the current at which the inductance is reduced by 30%. Ensure that this current is greater than the calculated peak inductor current. Of the inductors that meet the required inductance and saturation current, choose one that provides the best trade-off between DCR and layout footprint for your application. The power dissipation due to the DCR of the inductor is given by Calculating the Peak Inductor Current and Duty Cycle To select the optimal external components, the first step is to calculate the peak inductor current and maximum duty cycle. The peak inductor current is given by VIN D (1 D) PL = DCR × IL (AVG)2 Selecting the Current Sense (CS) Resistor To calculate the worst-case inductor peak current, use the maximum duty cycle, minimum inductance, and minimum switching frequency. Then select the current sense resistor (RCS) as follows: RCS = CSLIMIT (MIN)/IPK (MAX) Ensure that the selected inductor can tolerate the maximum peak current given by this current sense resistor. IPK (CS) = CSLIMIT (MAX)/RCS (MIN) The power dissipation from the sense resistor is given by PRCS = D × RCS × IL (AVG)2 Rev. 0 | Page 14 of 20 Data Sheet ADD5211 Selecting the NMOS Switch The equation for GP (s) shows that there are two zeros (fZESR and fRHP). The fZESR zero is formed by the ESR of the output capacitance. Because ceramic capacitors are used in this application, this value should be small and can usually be ignored. The zero is given by The external NMOS switch must have an adequate drain-tosource breakdown voltage (BVDSS) and rms current rating. The breakdown voltage rating should be at least BVDSS > VOUT (MAX) + 10 V f ZESR = The rms current rating should exceed the following: 2 × π × ESR × COUT The right half plane zero (fRHP) is given by INMOS (RMS) = IL (AVG) × √D The power dissipation from the NMOS switch arises from two components: RDSON losses and switching losses. These losses can be calculated as follows: f RHP = PNMOS (SW) = 0.5 × VOUT × IL (AVG) × (tR + tF) × fSW The rise and fall times (tR and tF) are a function of the strength of the ADD5211 gate drivers and the gate capacitance of the NMOS. Typical values are given in Table 2, but these times vary substantially for various power FETs. Therefore, tR and tF are best measured in the application. 2 × π × L × 4 × I LED V × IN V OUT 2 GP (s) also gives two poles at fLFP and fn. The low frequency pole (fLFP) is formed by the output capacitance and is found at Selecting the Diode f LFP = The diode must be selected for a low forward voltage (VF) and fast switching times. Generally, a fast Schottky diode provides the best performance for the cost. Ensure that the breakdown voltage (VD) is greater than the maximum VOUT plus some margin. Also ensure that the rated current of the diode is greater than the output current (total LED current). The power dissipation of the diode is as follows: 4 × I LED π × VOUT × COUT fn is the double pole formed by the current sense sampling action. It is always located at half the switching frequency. The fn double pole becomes unstable if Qn (the quality factor) is not sufficiently damped. Qn is damped by adding external ramp compensation (Se). PDIODE = VF × IOUT Qn = Selecting COUT To provide stability and reduce the output voltage ripple, particularly when PWM dimming of the LED currents is in effect, the output capacitance should be in the range of 4.7 µF to 22 µF. 1 S π × − D + 0.5 + (1 − D) × e Sn where: Se is the external ramp compensation = 75% × ((VOUT − VIN)/L). Sn is the inductor up slope = VIN/L. Boost Converter Loop Gain Calculations The total closed-loop gain is given by GEA × GP (s). GEA is the compensation gain. GP (s) is the control to output gain. GP (s) is the gain of the power stage and includes L, COUT, and the PWM modulator. The GP (s) gain is The external ramp compensation slope is usually set to a value from 50% to 75% of the inductor down slope as reflected across the sense resistor. Given the wide variation in parameters, it is best to stay closer to 75%. GP (s) = s s 1 + × 1 − 2 2 f f × π × × π × RHP ZESR APS × s s s2 1 + × 1 + + 2 × π × f LFP (2 × π × f n )2 Qn × 2 × π × f n VOUT This RHP zero results in a gain boost, but a phase drop. Because of its dependence on so many variables, fRHP is extremely difficult to compensate for. Therefore, it is best to choose a loop crossover frequency well before the phase drop of this RHP zero is seen. Typically, this is an order of magnitude less than the frequency of the RHP zero. PNMOS (RDSON) = D × RDSON × IL (AVG)2 RRAMP (Ω) = where APS is the dc gain and includes the PWM modulator gain, as follows: APS = 1 (1 − D) × VOUT × GCS 2 × RCS × 4 × I LED Rev. 0 | Page 15 of 20 3 4 × RCS × (VOUT − VIN ) 45 µ A × f SW × L ADD5211 Data Sheet Compensation Component Selection To increase the crossover frequency (beyond the LFP frequency), some kind of phase boost is required. Because the ADD5211 operates in current mode, only one zero is needed to counteract fLFP. Therefore, a Type II compensator should be sufficient. This compensator (see Figure 2) has a gain, GEA, that is expressed as follows: G EA = VFB VOUT × gm × s × RC × CC + 1 s × CC GEA gives one zero and one pole at the origin, as follows: fzEA = 1/(2π × RC × CC) fpEA = 1/(2π × RO × CC) where RO is the output impedance of the error amplifier. To boost the phase and increase the crossover frequency, place the compensation zero (fzEA) at or near the LFP pole. This placement gives the following equation for CC: CC = VOUT × COUT 2 × RC × I OUT These values may need to be adjusted experimentally to achieve satisfactory phase margin over all operating conditions and tolerances. Table 8 provides recommended values for switching frequencies of 360 kHz and 1 MHz. Table 8. Recommended Values for Compensation Components fSW (kHz) 360 1000 Rev. 0 | Page 16 of 20 L (µH) 33 22 COUT (µF) 10 4.7 RRAMP (kΩ) 6.81 6.81 RC (Ω) 100 100 CC (µF) 2.2 1.0 Data Sheet ADD5211 TYPICAL APPLICATION CIRCUITS L1 33µH VIN + CIN 10µF COUT 10µF CIN2 0.1µF CVDR 1µF UVLO VDR Q1 VIN GATE_P GATE_N CS RAMP OFF ON RRAMP 6.8kΩ RCS 0.1Ω EN PGND ROVP1 560kΩ PWM VDD RFLT 100kΩ OVP FAULT ROVP2 16kΩ ADD5211 VDD FB4 CVDD 1µF RLSD1 24kΩ FB3 FB2 LSD RLSD2 4.7kΩ 22 LEDs/CH, 100mA/CH D1 FB1 ISET LGND AGND FREQ COMP RFREQ 49.9kΩ SS CSS 30nF RC 100Ω CC 2.2µF 10555-022 RSET 15kΩ Figure 22. Typical Four-String Application Circuit L1 33µH CIN2 0.1µF UVLO CVDR 1µF Q1 VIN GATE_P GATE_N CS VDR RAMP OFF ON RRAMP 6.8kΩ RCS 0.1Ω EN PGND PWM VDD RFLT 100kΩ FAULT ROVP2 16kΩ FB4 CVDD 1µF FB3 FB2 LSD RLSD2 4.7kΩ ROVP1 560kΩ OVP ADD5211 VDD RLSD1 24kΩ 22 LEDs/CH, 100mA/CH COUT 10µF FB1 ISET RSET 30.1kΩ LGND AGND FREQ COMP RFREQ 49.9kΩ SS RC 100Ω CC 2.2µF CSS 30nF Figure 23. Typical Two-String Application Circuit Rev. 0 | Page 17 of 20 10555-023 VIN D1 + CIN 10µF ADD5211 Data Sheet OUTLINE DIMENSIONS PIN 1 INDICATOR 4.10 4.00 SQ 3.90 0.30 0.25 0.18 0.50 BSC PIN 1 INDICATOR 24 19 18 1 2.65 2.50 SQ 2.45 EXPOSED PAD TOP VIEW 0.80 0.75 0.70 0.50 0.40 0.30 13 12 0.25 MIN BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 SEATING PLANE 6 7 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WGGD. 112108-A 0.20 REF Figure 24. 24-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 4 mm × 4 mm Body, Very Very Thin Quad (CP-24-7) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADD5211ACPZ-R7 ADD5211ACPZ-RL ADD5211CP-EVALZ 1 Temperature Range −40°C to +125°C −40°C to +125°C Package Description 24-Lead LFCSP_WQ, 7” Tape and Reel 24-Lead LFCSP_WQ, 13” Tape and Reel Evaluation Board and LED Array Z = RoHS Compliant Part. Rev. 0 | Page 18 of 20 Package Option CP-24-7 CP-24-7 Data Sheet ADD5211 NOTES Rev. 0 | Page 19 of 20 ADD5211 Data Sheet NOTES ©2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10555-0-10/13(0) Rev. 0 | Page 20 of 20