RT9167/A

RT9167/A
Low-Noise, Fixed Output Voltage,300mA/500mA LDO Regulator
General Description
Features
The RT9167/A is a 300mA/500mA low dropout and low
noise micropower regulator suitable for portable
applications. The output voltages range from 1.5V to 5V
in 100mV increments and 2% accuracy. The RT9167/A is
designed for use with very low ESR capacitors. The output
remains stable even with 1μF ceramic output capacitor.
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Stable with Low-ESR Output Capacitor
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Low Dropout Voltage (350mV @ 300mA)
μA Typical
Low Operation Current −80μ
Shutdown Function
Low Noise Output
Low Temperature Coefficient
Current and Thermal Limiting
Custom Voltage Available
SOT-23-5 and SOP-8 Packages
RoHS Compliant and 100% Lead (Pb)-Free
The RT9167/A uses an internal P-MOSFET as the pass
device, which does not cause extra GND current in heavy
load and dropout conditions. The shutdown mode of nearly
zero operation current makes the IC suitable for batterypowered devices. Other features include a reference
bypass pin to improve low noise performance, current
limiting, and over temperature protection.
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Applications
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Ordering Information
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RT9167/APackage Type
B : SOT-23-5
BR : SOT-23-5 (R-Type)
S : SOP-8
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Output Voltage
15 : 1.5V
16 : 1.6V
:
49 : 4.9V
50 : 5.0V
2H : 2.85V
500mA Output Current
300mA Output Current
Note :
Cellular Telephones
Laptop, Notebook, and Palmtop Computers
Battery-powered Equipment
Hand-held Equipment
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
Pin Configurations
(TOP VIEW)
VOUT
BP
BP
EN
5
4
5
4
2
3
2
VIN GND EN
3
VOUT GND VIN
SOT-23-5
SOT-23-5 (R-Type)
Richtek products are :
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
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Suitable for use in SnPb or Pb-free soldering processes.
EN
VIN
8
GND
2
7
VOUT
3
6
GND
GND
BP
4
5
GND
SOP-8
DS9167/A-29 April 2011
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RT9167/A
Typical Application Circuit
RT9167/A
Chip Enable
IN
OUT
GND
EN
BP
+
CIN
1µF
+
VIN
COUT
1µF
VOUT
CBP
10nF
Functional Pin Description
Pin Name
Pin Function
VIN
Power Input Voltage
GND
Ground
EN
Chip Enable (Active High)
BP
Reference Noise Bypass
VOUT
Output Voltage
Function Block Diagram
Shutdown
and
Logic Control
EN
VIN
VREF
BP
+
MOS Driver
-
Error
Amplifier
VOUT
Current-Limit and
Thermal Protection
R1
R2
GND
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DS9167/A-29 April 2011
RT9167/A
Absolute Maximum Ratings
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Input Voltage ---------------------------------------------------------------------------------------------------------- 8V
Power Dissipation, PD @ TA = 25°C
SOT-23-5 --------------------------------------------------------------------------------------------------------------- 0.4W
SOP-8 ------------------------------------------------------------------------------------------------------------------ 0.625W
Package Thermal Resistance (Note1)
SOT-23-5, θJA --------------------------------------------------------------------------------------------------------- 250°C/W
SOT-23-5, θJC --------------------------------------------------------------------------------------------------------- 130°C/W
SOP-8, θJA ------------------------------------------------------------------------------------------------------------ 160°C/W
SOP-8, θJC ------------------------------------------------------------------------------------------------------------ 60°C/W
Operating Junction Temperature Range ------------------------------------------------------------------------- −40°C to 125°C
Storage Temperature Range --------------------------------------------------------------------------------------- −65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------- 260°C
Electrical Characteristics
(VIN = 5.0V, CIN = 1μF, COUT = 1μF, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Input Voltage Range
VIN
Output Voltage Accuracy
Maximum Output
Current
RT9167
RT9167A
ΔVOUT
Test Conditions
Min
Typ
Max
2.9
--
7
IL = 50mA
2.7
--
7
IL = 1mA
-2
--
2
300
--
--
500
--
--
400
--
--
500
700
--
IMAX
RT9167
Current Limit
RT9167A
Quiescent Current
ILIM
RT9167/A
No Load
--
80
150
RT9167/A IG
IOUT = 300mA
--
90
150
RT9167A
IOUT = 500mA
--
90
150
RT9167/A
IOUT = 1mA
--
1.1
5
IOUT = 50mA
--
55
100
IOUT = 300mA
--
350
450
IOUT = 500mA
--
600
750
V IN= (VOUT+0.15) to 7V, IOUT =1mA
--
--
6
IOUT = 0mA to 300mA
--
--
30
IOUT = 0mA to 500mA
--
--
35
(2)
Dropout Voltage
(VOUT(Normal) = 3.0V
Version)
RLOAD = 1Ω
RT9167/A
RT9167/A
VDROP
RT9167A
ΔVLINE
Line Regulation
RT9167/A
Load Regulation
RT9167A
ΔVLOAD
Unit
V
%
mA
mA
μA
mV
mV/V
mV
EN Input High Threshold
VIH
V IN= 3V to 5.5V
1.6
--
--
V
EN Input Low Threshold
VIL
VIN = 3V to 5.5V
--
--
0.4
V
EN Bias Current
ISD
--
--
100
nA
Shutdown Supply Current
IGSD
--
0.01
1
μA
Thermal Shutdown Temperature
TSD
--
155
--
°C
VOUT = 0V
To be continued
DS9167/A-29 April 2011
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RT9167/A
Parameter
Symbol
Test Conditions
Min
Typ
Max
Output Noise
e NO
CBP = 10nF, COUT = 10μF
--
350
--
Ripple Rejection
PSRR
F = 100Hz, CBP = 10nF, COUT = 10μF
--
58
--
Unit
nV Hz
dB
Note 1. θJA is measured in the natural convection at T A = 25°C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard. Pin 1 of SOP-8 and pin4 of SOT-23-5 packages are the case position for
θJA measurement.
Note 2. The dropout voltage is defined as VIN -VOUT, which is measured when VOUT is VOUT(NORMAL) − 100mV.
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DS9167/A-29 April 2011
RT9167/A
Typical Operating Characteristics
Quiescent Current vs. Temperature
120
3.32
105
Quiescent Current (uA)1
Output Voltage (V)
Output Voltage vs. Temperature
3.33
3.31
3.30
3.29
3.28
3.27
90
75
60
45
30
15
3.26
VOUT = 3.3V
VOUT = 3.3V
0
3.25
-50
-25
0
25
50
75
100
125
-50
150
-25
0
Temperature (° C)
25
50
75
100
125
150
Temperature (° C)
Dropout Voltage vs. Load Current
Dropout Voltage vs. Load Current
250
600
Dropout Voltage (mV)
Dropout Voltage (mV)
125°C
125°C
200
25°C
150
-40°C
100
50
500
25°C
400
300
-40°C
200
100
RT9167
RT9167A
VOUT = 5V
VOUT = 3.3V
0
0
0
0.05
0.1
0.15
0.2
0.25
0.3
0
0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Load Current (A)
Load Current (A)
Current Limit vs. Temperature
900
650
800
600
Current Limit (mA)
Current Limit (mA)
Current Limit vs. Temperature
700
550
500
450
400
RT9167
350
700
600
500
400
RT9167A
300
VOUT = 5V
VOUT = 3.3V
200
300
-50
-25
0
25
50
75
Temperature (° C)
DS9167/A-29 April 2011
100
125
-50
-25
0
25
50
75
100
125
Temperature (° C)
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RT9167/A
Load Transient Response
CIN = 10μF
COUT = 1μF
CBP = 10nF
20
VIN = 4V
VOUT = 3V
Output Voltage
Deviation (mV)
40
Load Transient Response
60
0
Load Current
(mA)
-20
CIN = 10μF
COUT = 4.7μF
CBP = 10nF
40
20
≈
≈
50
1
-50
0
≈
≈
50
1
-50
Time (50μs/Div)
Time (50μs/Div)
Line Transient Response
Loading = 1mA
VOUT = 3V
COUT = 1μF
CBP = 10nF
100
Line Transient Response
150
Output Voltage
Deviation (mV)
Output Voltage
Deviation (mV)
150
50
0
100
50
VOUT = 3V
COUT = 1μF
CBP = 10nF
≈
≈
5
4
0
≈
≈
5
4
Time (1ms/Div)
Time (1ms/Div)
Line Transient Response
VOUT = 3V
COUT = 4.7μF
CBP = 10nF
Line Transient Response
60
Loading = 1mA
Output Voltage
Deviation (mV)
Output Voltage
Deviation (mV)
100
50
0
-50
40
VOUT = 3V
COUT = 4.7μF
CBP = 10nF
Loading = 50mA
20
0
-20
≈
≈
5
4
Time (500μs/Div)
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Input Voltage
Deviation (V)
Input Voltage
Deviation (V)
Loading = 50mA
-50
Input Voltage
Deviation (V)
Input Voltage
Deviation (V)
-50
150
VIN = 4V
VOUT = 3V
-20
Load Current
(mA)
Output Voltage
Deviation (mV)
60
≈
≈
5
4
Time (500μs/Div)
DS9167/A-29 April 2011
RT9167/A
PSRR
70
60
PSRR (dB)
50
40
30
20
10
VOUT = 3.3V, ILOAD = 1mA
COUT = 4.7μF, CBP = 10nF
0
10
10
100
100
1K
1000
10K
10000
100K
100000
1M
1000000
Frequency (kHz)
DS9167/A-29 April 2011
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RT9167/A
Application Information
Capacitor Selection and Regulator Stability
Like any low-dropout regulator, the external capacitors used
with the RT9167/A must be carefully selected for regulator
stability and performance.
Using a capacitor whose value is > 1μF on the RT9167/A
input and the amount of capacitance can be increased
without limit. The input capacitor must be located a
distance of not more than 0.5" from the input pin of the IC
and returned to a clean analog ground. Any good quality
ceramic or tantalum can be used for this capacitor. The
capacitor with larger value and lower ESR (equivalent series
resistance) provides better PSRR and line-transient
response.
The output capacitor must meet both requirements for
minimum amount of capacitance and ESR in all LDOs
application. The RT9167/A is designed specifically to work
with low ESR ceramic output capacitor in space-saving
and performance consideration. Using a ceramic capacitor
whose value is at least 1μF with ESR is > 5mΩ on the
RT9167/A output ensures stability. The RT9167/A still
works well with output capacitor of other types due to the
wide stable ESR range. Figure 1. shows the curves of
allowable ESR range as a function of load current for various
output voltages and capacitor values. Output capacitor of
larger capacitance can reduce noise and improve loadtransient response, stability, and PSRR. The output
capacitor should be located not more than 0.5" from the
VOUT pin of the RT9167/A and returned to a clean analog
ground.
Note that some ceramic dielectrics exhibit large
capacitance and ESR variation with temperature. It may
be necessary to use 2.2μF or more to ensure stability at
temperatures below −10°C in this case. Also, tantalum
capacitors, 2.2μF or more may be needed to maintain
capacitance and ESR in the stable region for strict
application environment.
Tantalum capacitors maybe suffer failure due to surge
current when it is connected to a low-impedance source
of power (like a battery or very large capacitor). If a tantalum
capacitor is used at the input, it must be guaranteed to
have a surge current rating sufficient for the application
by the manufacture.
Use a 10nF bypass capacitor at BP for low output voltage
noise. The capacitor, in conjunction with an internal 200kΩ
resistor, which connects bypass pin and the band-gap
reference, creates an 80Hz low-pass filter for noise
reduction. Increasing the capacitance will slightly decrease
the output noise, but increase the start-up time. The
capacitor connected to the bypass pin for noise reduction
must have very low leakage. This capacitor leakage current
causes the output voltage to decline by a proportional
amount to the current due to the voltage drop on the internal
200kΩ resistor. Figure 2 shows the power on response.
Region of Stable COUT ESR vs. Load Current
100.000
100
COUT = 1μF
Unstable Region
C
CBP
1nF
BP==10nF
1.0001
Voltage
(0.5V/Div)
Voltage
(0.5V
/ DIV)
COUT ESR (Ω)
()
10.000
10
Stable Region
0.100
0.1
0.010
0.01
CBP
10nF
BP==10nF
Unstable Region
0.001
0
50
100
150
200
Load Current (mA)
Figure 1
250
OUT = 3V
VV
OUT=3.0V
300
00
5.0
10.0
10.0
15.0
15.0
Time (ms)
Figure 2
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DS9167/A-29 April 2011
RT9167/A
Load-Transient Considerations
Input-Output (Dropout) Voltage
The RT9167/A load-transient response graphs (see Typical
Operating Characteristics) show two components of the
output response: a DC shift from the output impedance
due to the load current change, and the transient response.
The DC shift is quite small due to the excellent load
regulation of the IC. Typical output voltage transient spike
for a step change in the load current from 0mA to 50mA is
tens mV, depending on the ESR of the output capacitor.
Increasing the output capacitor's value and decreasing the
ESR attenuates the overshoot.
A regulator's minimum input-output voltage differential
(or dropout voltage) determines the lowest usable supply
voltage. In battery-powered systems, this will determine
the useful end-of-life battery voltage. Because the RT9167/
A uses a P-Channel MOSFET pass transistor, the dropout
voltage is a function of drain-to-source on-resistance
[RDS(ON)] multiplied by the load current.
Shutdown Input Operation
The RT9167/A is shutdown by pulling the EN input low,
and turned on by driving the input high. If this feature is
not to be used, the EN input should be tied to VIN to keep
the regulator on at all times (the EN input must not be left
floating).
To ensure proper operation, the signal source used to
drive the EN input must be able to swing above and below
the specified turn-on/turn-off voltage thresholds which
guarantee an ON or OFF state (see Electrical
Characteristics). The ON/OFF signal may come from
either CMOS output, or an open-collector output with pullup resistor to the RT9167/A input voltage or another logic
supply. The high-level voltage may exceed the
RT9167/A input voltage, but must remain within the
absolute maximum ratings for the EN pin.
Reverse Current Path
The power transistor used in the RT9167/A has an inherent
diode connected between the regulator input and output
(see Figure 3). If the output is forced above the input by
more than a diode-drop, this diode will become forward
biased and current will flow from the VOUT terminal to VIN.
This diode will also be turned on by abruptly stepping the
input voltage to a value below the output voltage. To prevent
regulator mis-operation, a Schottky diode should be used
in any applications where input/output voltage conditions
can cause the internal diode to be turned on (see Figure4).
As shown, the Schottky diode is connected in parallel
with the internal parasitic diode and prevents it from being
turned on by limiting the voltage drop across it to about
0.3V. < 100mA to prevent damage to the part.
VIN
VOUT
Internal P-Channel Pass Transistor
The RT9167/A features a typical 1.1Ω P-MOSFET pass
transistor. It provides several advantages over similar
designs using PNP pass transistors, including longer
battery life. The P-MOSFET requires no base drive, which
reduces quiescent current considerably. PNP-based
regulators waste considerable current in dropout when the
pass transistor saturates. They also use high base-drive
currents under large loads. The RT9167/A does not suffer
from these problems and consume only 80μA of quiescent
current whether in dropout, light-load, or heavy-load
applications.
DS9167/A-29 April 2011
Figure 3
VIN
VOUT
Figure 4
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RT9167/A
The maximum power dissipation of RT9167/A depends
on the thermal resistance of the case and circuit board,
the temperature difference between the die junction and
ambient air, and the rate of airflow. The power dissipation
across the device is P = IOUT (VIN − VOUT). The maximum
power dissipation is: PMAX = (TJ − TA) /θJA
where TJ − TA is the temperature difference between the
RT9167/A die junction and the surrounding environment,
θJA is the thermal resistance from the junction to the
surrounding environment. The GND pin of the RT9167/A
performs the dual function of providing an electrical
connection to ground and channeling heat away. Connect
the GND pin to ground using a large pad or ground plane.
Current Limit and Thermal Protection
T9167 includes a current limit which monitors and controls
the pass transistor's gate voltage limiting the output current
to 350mA Typ. (700mA Typ. for RT9167A). Thermaloverload protection limits total power dissipation in the
RT9167/A. When the junction temperature exceeds
TJ = 155°C, the thermal sensor signals the shutdown logic
turning off the pass transistor and allowing the IC to cool.
The thermal sensor will turn the pass transistor on again
after the IC's junction temperature cools by 10°C, resulting
in a pulsed output during continuous thermal-overload
conditions. Thermal-overloaded protection is designed to
protect the RT9167/A in the event of fault conditions. Do
not exceed the absolute maximum junction-temperature
rating of TJ = 150°C for continuous operation. The output
can be shorted to ground for an indefinite amount of time
without damaging the part by cooperation of current limit
and thermal protection.
Thermal Considerations
Thermal protection limits power dissipation in RT9167/A.
When the operation junction temperature exceeds 165°C,
the OTP circuit starts the thermal shutdown function and
turns the pass element off. The pass element turn on again
after the junction temperature cools by 30°C.
For continuous operation, do not exceed absolute
maximum operation junction temperature 125°C. The
power dissipation definition in device is :
PD = (VIN − VOUT) x IOUT + VIN x IQ
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The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference
between junction to ambient. The maximum power
dissipation can be calculated by following formula :
PD(MAX) = ( TJ(MAX) − TA ) / θJA
Where T J(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient temperature and
the θJA is the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT9167/A, where T J(MAX) is the maximum junction
temperature of the die (125°C) and TA is the operated
ambient temperature. The junction to ambient thermal
resistance θJA is layout dependent. For SOT-23-5 package,
the thermal resistance θJA is 250°C/W on the standard
JEDEC 51-3 single-layer thermal test board. The maximum
power dissipation at TA = 25°C can be calculated by
following formula :
P D(MAX) = (125°C − 25°C) / 250 = 0.4W for
SOT-23-5 package
P D(MAX) = (125°C - 25°C) / 160 = 0.625W for
SOP-8 package
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance θJA. For RT9167/A packages, the Figure 5 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
Maximum Power Dissipation (mW)1
Operating Region and Power Dissipation
700
SOP-8
600
500
SOT-23-5
400
300
200
100
0
0
20
40
60
80
100
120
140
Ambient Temperature
Figure 5. Derating Curves for RT9167/A Packages
DS9167/A-29 April 2011
RT9167/A
The value of junction to case thermal resistance θJC is
popular for users. This thermal parameter is convenient
for users to estimate the internal junction operated
temperature of packages while IC operating. It's
independent of PCB layout, the surroundings airflow effects
and temperature difference between junction to ambient.
The operated junction temperature can be calculated by
following formula :
TJ = TC + PD x θJC
Where TC is the package case temperature measured by
thermal sensor, PD is the power dissipation defined by
user’ s function and the θJC is the junction to case thermal
resistance provided by IC manufacturer. Therefore it's easy
to estimate the junction temperature by any condition.
For example, how to calculate the junction temperature
of RT9167A-28CB SOT-23-5 package. If we use input
voltage VIN = 3.3V at an output current IO = 500mA and
the case temperature (pin 4 of SOT-23-5 package)
TC = 70°C measured by thermal couple while operating,
then our power dissipation is as follows :
PD = (3.3V − 2.8V) x 500mA + 3.3V x 90μA ≅ 250mW
And the junction temperature TJ could be calculated as
following :
TJ = TC + PD x θJC
TJ = 70°C + 0.25W x 130°C/W
= 70°C + 32.5°C
= 102.5°C < TJ(MAX) =125°C
For this operation application, TJ is lower than absolute
maximum operation junction temperature 125°C and it’s
safe to use.
DS9167/A-29 April 2011
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RT9167/A
Outline Dimension
H
D
L
B
C
b
A
A1
e
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.889
1.295
0.035
0.051
A1
0.000
0.152
0.000
0.006
B
1.397
1.803
0.055
0.071
b
0.356
0.559
0.014
0.022
C
2.591
2.997
0.102
0.118
D
2.692
3.099
0.106
0.122
e
0.838
1.041
0.033
0.041
H
0.080
0.254
0.003
0.010
L
0.300
0.610
0.012
0.024
SOT-23-5 Surface Mount Package
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DS9167/A-29 April 2011
RT9167/A
H
A
M
J
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.050
0.254
0.002
0.010
J
5.791
6.200
0.228
0.244
M
0.400
1.270
0.016
0.050
8-Lead SOP Plastic Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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