PDF Data Sheet Rev. F

a
1 GHz, 5,500 V/s
Low Distortion Amplifier
AD8009
FEATURES
Ultrahigh Speed
5,500 V/s Slew Rate, 4 V Step, G = +2
545 ps Rise Time, 2 V Step, G = +2
Large Signal Bandwidth
440 MHz, G = +2
320 MHz, G = +10
Small Signal Bandwidth (–3 dB)
1 GHz, G = +1
700 MHz, G = +2
Settling Time 10 ns to 0.1%, 2 V Step, G = +2
Low Distortion over Wide Bandwidth
SFDR
–66 dBc @ 20 MHz, Second Harmonic
–75 dBc @ 20 MHz, Third Harmonic
Third Order Intercept (3IP)
26 dBm @ 70 MHz, G = +10
Good Video Specifications
Gain Flatness 0.1 dB to 75 MHz
0.01% Differential Gain Error, RL = 150 0.01 Differential Phase Error, RL = 150 High Output Drive
175 mA Output Load Drive
10 dBm with –38 dBc SFDR @ 70 MHz, G = +10
Supply Operation
+5 V to 5 V Voltage Supply
14 mA (Typ) Supply Current
APPLICATIONS
Pulse Amplifier
IF/RF Gain Stage/Amplifiers
High Resolution Video Graphics
High Speed Instrumentations
CCD Imaging Amplifier
2
G = +2
RF = 301
RL = 150
1
FUNCTIONAL BLOCK DIAGRAMS
8-Lead Plastic SOIC (R-8)
7 +VS
+IN 3
6 OUT
–VS 4
5 NC
–4
–5
–6
–7
–8
100
10
FREQUENCY RESPONSE (MHz)
1000
Figure 1. Large Signal Frequency Response; G = +2 and +10
REV. F
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
4
–IN
–VS 2
+IN 3
The high slew rate reduces the effect of slew rate limiting and
results in the large signal bandwidth of 440 MHz required for
high resolution video graphic systems. Signal quality is maintained over a wide bandwidth with worst-case distortion of
–40 dBc @ 250 MHz (G = +10, 1 V p-p). For applications with
multitone signals, such as IF signal chains, the third order
intercept (3IP) of 12 dBm is achieved at the same frequency. This
distortion performance coupled with the current feedback
architecture make the AD8009 a flexible component for a gain
stage amplifier in IF/RF signal chains.
The AD8009 is capable of delivering over 175 mA of load current
and will drive four back terminated video loads while maintaining
low differential gain and phase error of 0.02% and 0.04°,
respectively. The high drive capability is also reflected in the
ability to deliver 10 dBm of output power @ 70 MHz with
–38 dBc SFDR.
The AD8009 is available in a small SOIC package and will
operate over the industrial temperature range –40°C to +85°C.
The AD8009 is also available in an SOT-23-5 and will operate
over the commercial temperature range of 0°C to 70°C.
–30
G=2
RF = 301
VO = 2V p-p
SECOND
100 LOAD
–50
–60
SECOND
150 LOAD
–70
THIRD
100 LOAD
–80
1
+VS
PRODUCT DESCRIPTION
DISTORTION (dBc)
NORMALIZED GAIN (dB)
–3
5
The AD8009 is an ultrahigh speed current feedback amplifier
with a phenomenal 5,500 V/µs slew rate that results in a rise
time of 545 ps, making it ideal as a pulse amplifier.
–40
G = +10
RF = 200
RL = 100
VOUT 1
NC = NO CONNECT
–1
–2
AD8009
8 NC
2
–IN
0
VO = 2V p-p
AD8009
NC 1
5-Lead SOT-23 (RT-5)
THIRD
150 LOAD
–90
–100
1
10
FREQUENCY RESPONSE (MHz)
70
Figure 2. Distortion vs. Frequency; G = +2
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2004 Analog Devices, Inc. All rights reserved.
(@ T = 25C, V = 5 V, R = 100 ; for R Package: R = 301 for G = +1, +2,
AD8009–SPECIFICATIONS
R = 200 for G = +10; for RT Package: R = 332 for G = +1, R = 226 for G = +2 and R = 191 for G = +10, unless otherwise noted.)
A
F
F
Model
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth, VO = 0.2 V p-p
R Package
RT Package
Large Signal Bandwidth, VO = 2 V p-p
Gain Flatness 0.1 dB, VO = 0.2 V p-p
Slew Rate
Settling Time to 0.1%
Rise and Fall Time
HARMONIC/NOISE PERFORMANCE
Second Harmonic G = +2, VO = 2 V p-p
Third Harmonic
Third Order Intercept (3IP)
W.R.T. Output, G = +10
Input Voltage Noise
Input Current Noise
Differential Gain Error
Differential Phase Error
S
L
F
F
F
Conditions
G = +1, RF = 301 Ω
G = +1, RF = 332 Ω
G = +2
G = +10
G = +2
G = +10
G = +2, RL = 150 Ω
G = +2, RL = 150 Ω, 4 V Step
G = +2, RL = 150 Ω, 2 V Step
G = +10, 2 V Step
G = +2, RL = 150 Ω, 4 V Step
Min
480
300
390
235
45
4,500
10 MHz
20 MHz
70 MHz
10 MHz
20 MHz
70 MHz
70 MHz
150 MHz
250 MHz
f = 10 MHz
f = 10 MHz, +In
f = 10 MHz, –In
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 37.5 Ω
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 37.5 Ω
DC PERFORMANCE
Input Offset Voltage
AD8009AR/JRT
Typ
Max
1,000
845
700
350
440
320
75
5,500
10
25
0.725
MHz
MHz
MHz
MHz
MHz
MHz
MHz
V/µs
ns
ns
ns
–73
–66
–56
–77
–75
–58
26
18
12
1.9
46
41
0.01
0.02
0.01
0.04
dBc
dBc
dBc
dBc
dBc
dBc
dBm
dBm
dBm
nV/√Hz
pA/√Hz
pA/√Hz
%
%
Degrees
Degrees
2
TMIN to TMAX
Offset Voltage Drift
–Input Bias Current
TMIN to TMAX
+Input Bias Voltage
TMIN to TMAX
Open-Loop Transresistance
90
TMIN to TMAX
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Current
Short-Circuit Current
+Input
–Input
+Input
VCM = ± 2.5
± 3.7
RL = 10 Ω, PD Package = 0.7 W 150
POWER SUPPLY
Operating Range
Quiescent Current
Power Supply Rejection Ratio
50
4
50
75
50
75
250
170
5
7
150
150
mV
mV
µV/°C
±µA
±µA
±µA
±µA
kΩ
kΩ
kΩ
Ω
pF
±V
dB
± 3.8
175
330
V
mA
mA
14
64
0.03
0.05
0.03
0.08
110
8
2.6
3.8
52
+5
TMIN to TMAX
VS = ± 4 V to ± 6 V
Unit
70
±6
16
18
V
mA
mA
dB
Specifications subject to change without notice.
–2–
REV. F
AD8009
(@ TA = 25C, VS = 5 V, RL = 100 , for R Package: RF = 301 for G = +1, +2,
SPECIFICATIONS R = 200 for G = +10).
F
Model
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth, VO = 0.2 V p-p
Large Signal Bandwidth, VO = 2 V p-p
Gain Flatness 0.1 dB, VO = 0.2 V p-p
Slew Rate
Settling Time to 0.1%
Rise and Fall Time
HARMONIC/NOISE PERFORMANCE
Second Harmonic G = +2, VO = 2 V p-p
Third Harmonic
Input Voltage Noise
Input Current Noise
Conditions
Min
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Current
Short-Circuit Current
POWER SUPPLY
Operating Range
Quiescent Current
Power Supply Rejection Ratio
630
430
300
365
250
65
2,100
10
25
0.725
MHz
MHz
MHz
MHz
MHz
MHz
V/µs
ns
ns
ns
10 MHz
20 MHz
70 MHz
10 MHz
20 MHz
70 MHz
f = 10 MHz
f = 10 MHz, +In
f = 10 MHz, –In
–74
–67
–48
–76
–72
–44
1.9
46
41
dBc
dBc
dBc
dBc
dBc
dBc
nV/√Hz
pA/√Hz
pA/√Hz
1
50
50
+Input
–Input
+Input
VCM = 1.5 V to 3.5 V
50
RL = 10 Ω, PD Package = 0.7 W
VS = 4.5 V to 5.5 V
–3–
64
4
150
150
mV
±µA
±µA
110
8
2.6
1.2 to 3.8
52
kΩ
Ω
pF
V
dB
1.1 to 3.9
175
330
V
mA
mA
+5
Specifications subject to change without notice.
REV. F
Unit
G = +1, RF = 301 Ω
G = +2
G = +10
G = +2
G = +10
G = +2, RL = 150 Ω
G = +2, RL = 150 Ω, 4 V Step
G = +2, RL = 150 Ω, 2 V Step
G = +10, 2 V Step
G = +2, RL = 150 Ω, 4 V Step
DC PERFORMANCE
Input Offset Voltage
–Input Bias Current
+Input Bias Voltage
INPUT CHARACTERISTICS
Input Resistance
AD8009AR/JRT
Typ
Max
10
70
±6
12
V
mA
dB
AD8009
ABSOLUTE MAXIMUM RATINGS 1
MAXIMUM POWER DISSIPATION
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V
Internal Power Dissipation2
Small Outline Package (R) . . . . . . . . . . . . . . . . . . . . . . . 0.75 W
Input Voltage (Common-Mode) . . . . . . . . . . . . . . . . . . . . ± VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 3.5 V
Output Short-Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range R Package . . . . –65°C to +125°C
Operating Temperature Range (A Grade) . . . –40°C to +85°C
Operating Temperature Range (J Grade) . . . . . . . 0°C to 70°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C
The maximum power that can be safely dissipated by the AD8009
is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices
is determined by the glass transition temperature of the plastic,
approximately 150°C. Exceeding this limit temporarily may cause
a shift in parametric performance due to a change in the stresses
exerted on the die by the package. Exceeding a junction temperature of 175°C for an extended period can result in device failure.
While the AD8009 is internally short circuit protected, this may
not be sufficient to guarantee that the maximum junction temperature (150°C) is not exceeded under all conditions. To ensure
proper operation, it is necessary to observe the maximum power
derating curves.
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
8-Lead SOIC Package: θJA = 155°C/W.
5-Lead SOT-23 Package: θJA = 240°C/W.
2.0
MAXIMUM POWER DISSIPATION (W)
TJ = 150 C
1.5
8-LEAD SOIC PACKAGE
1.0
0.5
5-LEAD SOT-23 PACKAGE
0
–50 –40 –30 –20 –10 0 10 20 30 40 50 60
AMBIENT TEMPERATURE (ⴗC)
70 80 90
Figure 3. Plot of Maximum Power Dissipation vs.
Temperature
ORDERING GUIDE
Model
AD8009AR
AD8009AR-REEL
AD8009AR-REEL7
AD8009ARZ*
AD8009ARZ-REEL*
AD8009ARZ-REEL7*
AD8009JRT-R2
AD8009JRT-REEL
AD8009JRT-REEL7
AD8009JRTZ-REEL*
AD8009JRTZ-REEL7*
AD8009ACHIPS
Temperature
Range
Package
Description
Package
Option
Branding
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
Die
R-8
R-8
R-8
R-8
R-8
R-8
RT-5
RT-5
RT-5
RT-5
RT-5
HKJ
HKJ
HKJ
HKJ
HKJ
*Z = Pb-free part.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8009 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–4–
REV. F
Typical Performance Characteristics–AD8009
3
6.2
2
6.1
G = +1, R
G = +1, RT
6.0
0
R PACKAGE:
RL = 100⍀
G = +2, R AND RT
VO = 200mV p–p
G = +1, +2: RF = 301⍀ G = +10, R AND RT
G = +10: RF = 200⍀
RT PACKAGE:
G = +1: RF = 332⍀
G = +2: RF = 226⍀
G = +10: RF = 191⍀
–1
–2
–3
–4
–5
G = +2
RF = 301⍀
RL = 150⍀
VO = 200mV p-p
5.8
5.7
5.6
5.5
5.4
–6
–7
5.9
GAIN FLATNESS (dB)
NORMALIZED GAIN (dB)
1
5.3
5.2
1
10
100
1
1000
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
TPC 1. Frequency Response; G = +1, +2, +10,
R and RT Packages
TPC 4. Gain Flatness; G = +2
0.4
8
G = +2
RF = 301⍀
RL = 150⍀
VO = 200mV p-p
VS = 5V
7
0.3
6
0.2
G = +2
RF = 301⍀
RL = 150⍀
VO AS SHOWN
4
3
2
GAIN FLATNESS (dB)
5
GAIN (dB)
1000
4V p-p
2V p-p
1
0.1
0
–0.1
0
–0.2
–1
–2
1
10
100
FREQUENCY (MHz)
–0.3
1000
1
TPC 2. Large Signal Frequency Response; G = +2
10
100
FREQUENCY (MHz)
1000
10000
TPC 5. Gain Flatness; G = +2; VS = 5 V
8
22
7
21
+85ⴗC
6
20
–40ⴗC
19
–40ⴗC
G = +2
RF = 301⍀
RL = 150⍀
VO = 2V p–p
4
3
2
GAIN (dB)
GAIN (dB)
5
+85ⴗC
17
2V p-p
4V p-p
16
1
15
0
14
–1
13
12
–2
1
10
100
FREQUENCY (MHz)
1000
1
TPC 3. Large Signal Frequency Response vs.
Temperature; G = +2
REV. F
G = +10
RF = 200⍀
RL = 100⍀
VO AS SHOWN
18
10
100
FREQUENCY (MHz)
1000
TPC 6. Large Signal Frequency Response; G = +10
–5–
AD8009
22
–35
21
–40
20
–45
70MHz
GAIN (dB)
–40ⴗC
G = +10
RF = 200⍀
RL = 100⍀
VO = 2V p-p
18
17
DISTORTION (dBc)
–50
19
+85ⴗC
16
15
–55
–65
200⍀
–70
22.1⍀
50⍀
POUT
50⍀
50⍀
–80
13
–85
–10 –8
12
1
10
100
FREQUENCY (MHz)
–6
–4
–2
1000
0
2
4
6
8
10
12
14
POUT (dBm)
TPC 10. Second Harmonic Distortion vs. POUT; (G = +10)
TPC 7. Large Signal Frequency Response vs.
Temperature; G = +10
–30
0.02
DIFF GAIN (%)
G=2
RF = 301⍀
VO = 2V p-p
–40
SECOND,
100⍀ LOAD
–50
–60
–70
THIRD,
100⍀ LOAD
–80
THIRD,
150⍀ LOAD
–90
–100
1
10
FREQUENCY RESPONSE (MHz)
70
G = +2
RF = 301⍀
0.01
RL = 150⍀
0.00
–0.01
–0.02
SECOND,
150⍀ LOAD
DIFF PHASE (Degrees)
DISTORTION (dBc)
5MHz
–60
–75
14
RL = 37.5⍀
0
100
IRE
0.10
G = +2
0.05 RF = 301⍀
RL = 37.5⍀
–0.00
RL = 150⍀
–0.05
–0.10
TPC 8. Distortion vs. Frequency; G = +2
0
100
IRE
TPC 11. Differential Gain and Phase
–20
–30
G = +2
RF = 301⍀
RL = 100⍀
VO = 2V p-p
VS = 5V
G = +10
RF = 200⍀
RL = 100⍀
VO = 2V p-p
–35
THIRD
–40
–45
DISTORTION (dBc)
–30
DISTORTION (dBc)
250MHz
–40
SECOND
–50
–60
SECOND
–50
–55
–60
–65
THIRD
–70
–70
–75
–80
–80
1
10
100
5
200
10
70
FREQUENCY (MHz)
FREQUENCY (MHz)
TPC 12. Distortion vs. Frequency; G = +10
TPC 9. Distortion vs. Frequency; G = +2; VS = 5 V
–6–
REV. F
AD8009
10
–35
–40
G = +2
RF = 301⍀
RL = 100⍀
100mV p-p ON TOP OF VS
0
–45
DISTORTION (dBc)
–10
250MHz
–50
70MHz
–55
PSRR (dB)
–20
–60
–65
–70
5MHz
–PSRR
–30
+PSRR
–40
–75
200⍀
–80
–50
22.1⍀
50⍀ P
OUT
–85
–95
–10
–8
–6
–4
–2
0
2
4
–60
50⍀
50⍀
–90
6
8
10
12
–70
0.03 0.1
14
1
TPC 13. Third Harmonic Distortion vs. POUT; (G = +10)
500
100
TPC 16. PSRR vs. Frequency
300
50
200⍀
250
22.1⍀
50⍀ P
OUT
40
INPUT CURRENT (pA/ Hz)
45
INTERCEPT POINT (dBm)
10
FREQUENCY (MHz)
POUT (dBm)
50⍀
50⍀
35
30
25
20
200
150
100
NONINVERTING CURRENT
50
15
INVERTING CURRENT
0
10
10
100
FREQUENCY (MHz)
250
10
100
1M
0
1M
10M
100M 250M
–10
301⍀
PHASE
1k
–80
VO
154⍀
–25
CMRR (dB)
RL = 100⍀
301⍀
VIN =
200mV p-p
–20
–40
GAIN
PHASE (Degrees)
TRANSRESISTANCE (⍀)
100k
TPC 17. Current Noise vs. Frequency
–15
10k
10k
FREQUENCY (Hz)
TPC 14. Two Tone, Third Order IMD Intercept vs.
Frequency; G = +10
100k
1k
154⍀
100⍀
–30
–35
–40
–45
–120
–50
–55
100
0.01
0.1
1
10
100
–160
1000
–60
1
FREQUENCY (MHz)
TPC 15. Transresistance and Phase vs. Frequency
REV. F
10
100
FREQUENCY (MHz)
TPC 18. CMRR vs. Frequency
–7–
1000
AD8009
2.0
G = +2
RF = 301⍀
1.8
10
1.6
(VSWR)
OUTPUT RESISTANCE (⍀)
100
1
1.4
1.2
0.1
1.0
0.01
0.03 0.1
1
10
100
0
0.1
500
1
10
FREQUENCY (MHz)
FREQUENCY (MHz)
TPC 19. Output Resistance vs. Frequency
100
500
TPC 22. Input VSWR; G = +10
10
20
16
POUT MAX (dBm)
INPUT VOLTAGE NOISE (nV/ Hz)
18
8
6
4
G = +2
RF = 301⍀
14
12
G = +10
RF = 200⍀
10
8
RF
6
2
RG
50⍀
4
50⍀
2
0
10
POUT
50⍀
0
100
1k
10k
100k
1M
10M
5
100M 250M
10
100
250
FREQUENCY (MHz)
FREQUENCY (Hz)
TPC 20. Voltage Noise vs. Frequency
TPC 23. Maximum Output Power vs. Frequency
25
–20
–30
G = +10
RF = 200⍀
20
–50
15
G = +10
RF = 301⍀
RL = 100⍀
10
S12 (dB)
NOISE FIGURE (dB)
–40
–60
–70
–80
5
–90
0
1
10
100
SOURCE RESISTANCE (⍀)
500
1
TPC 21. Noise Figure
10
100
FREQUENCY (MHz)
1000
TPC 24. Reverse Isolation (S12); G = +10
–8–
REV. F
AD8009
2.2
G = +2
RF = 301
RL = 150
VO = 2V p-p
CCOMP
2.0
49.9
49.9
1.8
(VSWR)
200
1.6
22.1
1.4
CCOMP = 0pF
1.2
CCOMP = 3pF
1.0
500mV
0
0.1
1
10
FREQUENCY (MHz)
100
500
TPC 25. Output VSWR; G = +10
VOUT
100
90
1ns
TPC 28. 2 V Transient Response; G = +2
G = +2
RF = 301
RL = 150
VO = 4V p-p
G = +10
RF = 200
RL = 100
VIN = 2VSTEP
10
0%
2V
2V
250ns
1V
TPC 26. Overdrive Recovery; G = +10
TPC 29. 4 V Transient Response; G = +2
G = +10
RF = 200
RL = 100
VO = 200mV p-p
G = +2
RF = 301
RL = 150
VO = 200mV p-p
50mV
50mV
1ns
TPC 27. 2 V Transient Response; G = +2
REV. F
1.5ns
2ns
TPC 30. Small Signal Transient Response; G = +10
–9–
AD8009
G = +10
RF = 200⍀
RL = 100⍀
VO = 2V p-p
V
O
2ns
50mV
TPC 31. 2 V Transient Response; G = +10
1ns
TPC 34. 2 V Transient Response; VS = 5 V; G = +2
8
G = +10
RF = 200⍀
RL = 100⍀
VO = 4V p-p
12
CA = 2pF
3dB/div
7
9
6
6
CA = 1pF
1dB/div
GAIN (dB)
5
3
4
0
CA = 0pF
1dB/div
3
–3
2
–6
VOUT = 200mV p–p
VIN
1
100⍀
499⍀
3ns
1V
CA
–9
VOUT
50⍀
0
–12
499⍀
–15
–1
1
TPC 32. 4 V Transient Response; G = +10
GAIN (dB)
500mV
VS = 5V
G = +2
RF = 301⍀
RL = 150⍀
VO = 200mV p-p
10
1000
100
FREQUENCY (MHz)
TPC 35. Small Signal Frequency Response vs.
Parasitic Capacitance
CA = 2pF
CA
CA = 1pF
V
O
VIN
VOUT
50⍀
499⍀
100⍀
499⍀
VOUT = 200mV p–p
VS = ⴞ5V
CA = 0pF
50mV
VS = 5V
G = +2
RF = 301⍀
RL = 150⍀
VO = 200mV p-p
1ns
40mV
TPC 33. Small Signal Transient Response;
VS = 5 V; G = +2
1.5ns
TPC 36. Small Signal Pulse Response vs.
Parasitic Capacitance
–10–
REV. F
AD8009
0
HP8753D
AD8009
G=2
RF = RG= 301
DRIVING
WAVETEK 5201
TUNABLE BPF
fC = 50MHz
–10
–20
Z IN = 50
Z OUT = 50
–30
0.001F
3
49.9
0.1F
+
REJECTION (dB)
+5V
10F
7
AD8009
2
49.9
6
WAVETEK 5201
BPF
301
–5V
–60
–80
–90
0.001F
0.1F
10F
+
TPC 37. AD8009 Driving a Band-Pass RF Filter
APPLICATIONS
All current feedback op amps are affected by stray capacitance
on their –INPUT. TPCs 35 and 36 illustrate the AD8009’s
response to such capacitance.
TPC 35 shows the bandwidth can be extended by placing a
capacitor in parallel with the gain resistor. The small signal pulse
response corresponding to such an increase in capacitance/bandwidth is shown in TPC 36.
As a practical consideration, the higher the capacitance on the
–INPUT to GND, the higher RF needs to be to minimize
peaking/ringing.
RF Filter Driver
CENTER 50.000 MHz
SPAN 80.000 MHz
TPC 38. Frequency Response of Band-Pass Filter Circuit
TPC 37 shows a circuit for driving and measuring the frequency
response of a filter, a Wavetek 5201 tunable band-pass filter that
is tuned to a 50 MHz center frequency. The HP8753D network
provides a stimulus signal for the measurement. The analyzer has
a 50 Ω source impedance that drives a cable that is terminated in
50 Ω at the high impedance noninverting input of the AD8009.
The AD8009 is set at a gain of +2. The series 50 Ω resistor at the
output, along with the 50 Ω termination provided by the filter and
its termination, yield an overall unity gain for the measured
path. The frequency response plot of TPC 38 shows the circuit
to have an insertion loss of 1.3 dB in the pass band and about
75 dB rejection in the stop band.
The output drive capability, wide bandwidth, and low distortion
of the AD8009 are well suited for creating gain blocks that can
drive RF filters. Many of these filters require that the input be
driven by a 50 Ω source, while the output must be terminated in
50 Ω for the filters to exhibit their specified frequency response.
REV. F
–50
–70
4
301
–40
–11–
AD8009
PRIMARY MONITOR
75 COAX
IOUTR
75
RED
75
75
GREEN
75
75
BLUE
75
ADV7160/
ADV7162
IOUTG
IOUTB
5V
+
0.1F
10F
7
3
AD8009
2
6
75
ADDITIONAL MONITOR
75 COAX
4
RED
75
301
301
0.1F
–5V
+
10F
3
6
AD8009
75
2
GREEN
75
BLUE
75
301
301
3
6
AD8009
75
2
301
301
Figure 4. Driving an Additional High Resolution Monitor Using Three AD8009s
RGB Monitor Driver
High resolution computer monitors require very high full power
bandwidth signals to maximize their display resolution. The
RGB signals that drive these monitors are generally provided by
a current-out RAMDAC that can directly drive a 75 Ω doubly
terminated line.
There are times when the same output wants to be delivered to
additional monitors. The termination provided internally by
each monitor prohibits the ability to simply connect a second
monitor in parallel with the first. Additional buffering must be
provided.
Figure 4 shows a connection diagram for two high resolution
monitors being driven by an ADV7160 or ADV7162, a 220 MHz
(Megapixel per second) triple RAMDAC. This pixel rate
requires a driver whose full power bandwidth is at least half the
pixel rate or 110 MHz. This is to provide good resolution for a
worst-case signal that swings between zero scale and full scale
on adjacent pixels.
The primary monitor is connected in the conventional fashion
with a 75 Ω termination to ground at each end of the 75 Ω
cable. Sometimes this configuration is called “doubly terminated” and is used when the driver is a high output impedance
current source.
For the additional monitor, each of the RGB signals close to the
RAMDAC output is applied to a high input impedance, noninverting input of an AD8009 that is configured for a gain of +2. The
outputs each drive a series 75 Ω resistor, cable, and termination
resistor in the monitor that divides the output signal by two, thus
providing an overall unity gain. This scheme is referred to as
“back termination” and is used when the driver is a low output
impedance voltage source. Back termination requires that the
voltage of the signal be double the value that the monitor sees.
Double termination requires that the output current be double the
value that flows in the monitor termination.
–12–
REV. F
AD8009
Driving a Capacitive Load
A capacitive load, like that presented by some A/D converters,
can sometimes be a challenge for an op amp to drive depending
on the architecture of the op amp. Most of the problem is caused
by the pole created by the output impedance of the op amp and
the capacitor that is driven. This creates extra phase shift that
can eventually cause the op amp to become unstable.
One way to prevent instability and improve settling time when
driving a capacitor is to insert a resistor in series between the
op amp output and the capacitor. The feedback resistor is still
connected directly to the output of the op amp, while the series
resistor provides some isolation of the capacitive load from the
op amp output.
+5V
G = +2: RF = 301 = RG
G = +10: RF = 200, RG = 22.1
0.001F
3
RT
49.9
RG
+
0.1F
Figure 5 shows such a circuit with an AD8009 driving a 50 pF
load. With RS = 0, the AD8009 circuit will be unstable. For a
gain of +2 and +10, it was found experimentally that setting RS
to 42.2 Ω will minimize the 0.1% settling time with a 2 V step at
the output. The 0.1% settling time was measured to be 40 ns with
this circuit.
For smaller capacitive loads, a smaller RS will yield optimal
settling time, while a larger RS will be required for larger capacitive
loads. Of course, a larger capacitance will always require more
time for settling to a given accuracy than a smaller one, and this
will be lengthened by the increase in RS required. At best, a
given RC combination will require about seven time constants
by itself to settle to 0.1%, so a limit will be reached where too
large a capacitance cannot be driven by a given op amp and still
meet the system’s required settling time specification.
10F
7
AD8009
2
6 2VSTEP
RS
CL
4
50pF
RF
0.001F
–5V
0.1F
+
10F
Figure 5. Capacitive Load Drive Circuit
REV. F
–13–
AD8009
OUTLINE DIMENSIONS
8-Lead Standard Small Outline Package [SOIC]
(R-8)
Dimensions shown in millimeters and (inches)
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
8
5
1
4
6.20 (0.2440)
5.80 (0.2284)
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
SEATING
0.10
PLANE
0.50 (0.0196)
45
0.25 (0.0099)
1.75 (0.0688)
1.35 (0.0532)
8
0.25 (0.0098) 0 1.27 (0.0500)
0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
5-Lead Small Outline Transistor Package [SOT-23]
(RT-5)
Dimensions shown in millimeters
2.90 BSC
5
4
2.80 BSC
1.60 BSC
1
2
3
PIN 1
0.95 BSC
1.30
1.15
0.90
1.90
BSC
1.45 MAX
0.15 MAX
0.50
0.30
SEATING
PLANE
0.22
0.08
10
5
0
0.60
0.45
0.30
COMPLIANT TO JEDEC STANDARDS MO-178AA
–14–
REV. F
AD8009
Revision History
Location
Page
9/04—Data Sheet changed from REV. E to REV. F.
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Change to TPC 37 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3/03—Data Sheet changed from REV. D to REV. E.
Updated Data Sheet Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal
Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to Figure 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Deleted AD8009EB from ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Inserted new TPC 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Inserted new TPC 9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Inserted new TPC 12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Inserted new TPCs 33 and 34 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
REV. F
–15–
–16–
C01011–0–9/04(F)