Not recommended for new designs – Please use 25AA080A/B or 25LC080A/B. 25AA080/25LC080/25C080 8K SPI Bus Serial EEPROM Device Selection Table Part Number 25AA080 Description: VCC Range Max. Clock Frequency Temp. Ranges 1.8-5.5V 1 MHz I 25LC080 2.5-5.5V 2 MHz I 25C080 4.5-5.5V 3 MHz I,E Features: Communication to the device can be paused via the hold pin (HOLD). While the device is paused, transitions on its inputs will be ignored, with the exception of chip select, allowing the host to service higher priority interrupts. Package Types PDIP/SOIC CS 1 SO 2 WP 3 VSS 4 25AA080/ • Low-power CMOS technology: - Write current: 3 mA maximum - Read current: 500 A typical - Standby current: 500 nA typical • 1024 x 8-bit organization • 16 byte page • Write cycle time: 5 ms max. • Self-timed erase and write cycles • Block write protection: - Protect none, 1/4, 1/2 or all of array • Built-in write protection: - Power-on/off data protection circuitry - Write enable latch - Write-protect pin • Sequential read • High reliability: - Endurance: 1 M cycles - Data retention: > 200 years - ESD protection: > 4000V • 8-pin PDIP and SOIC (150 mil) • Temperature ranges supported: - Industrial (I): -40C to +85C - Automotive (E) (25C080): -40°C to +125°C The Microchip Technology Inc. 25AA080/25LC080/ 25C080 (25XX080*) are 8 Kbit Serial Electrically Erasable PROMs. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a Chip Select (CS) input. 8 VCC 7 HOLD 6 SCK 5 SI Block Diagram Status Register I/O Control Logic HV Generator Memory Control Logic X EEPROM Array Dec Page Latches SI SO Y Decoder CS SCK Sense Amp. R/W Control HOLD WP VCC VSS 1997-2012 Microchip Technology Inc. DS21230E-page 1 25AA080/25LC080/25C080 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings(†) VCC .............................................................................................................................................................................7.0V All inputs and outputs w.r.t. VSS ........................................................................................................ -0.6V to VCC + 1.0V Storage temperature .................................................................................................................................-65°C to 150°C Ambient temperature under bias ...............................................................................................................-40°C to 125°C Soldering temperature of leads (10 seconds) .......................................................................................................+300°C ESD protection on all pins ......................................................................................................................................... 4 KV † NOTICE: Stresses above those listed under ‘Maximum ratings’ may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an extended period of time may affect device reliability. 1.1 DC Characteristics DC CHARACTERISTICS Param. No. Sym. D001 VIH1 D002 VIH2 D003 VIL1 D004 VIL2 D005 VOL D006 VOL D007 Characteristic High-level input voltage Low-level input voltage Industrial (I): TA = -40°C to +85°C Automotive (E): TA = -40°C to +125°C Min. Max. Units VCC = 1.8V to 5.5V VCC = 4.5V to 5.5V (25C080 only) Test Conditions 2.0 VCC+1 V VCC2.7V (Note) 0.7 VCC VCC+1 V VCC< 2.7V (Note) -0.3 0.8 V VCC2.7V (Note) -0.3 0.3 VCC V VCC < 2.7V (Note) Low-level output voltage — 0.4 V IOL = 2.1 mA — 0.2 V IOL = 1.0 mA, VCC < 2.5V VOH High-level output voltage VCC -0.5 — V IOH = -400 A D008 ILI Input leakage current -10 10 A CS = VCC, VIN = VSS TO VCC D009 ILO Output leakage current -10 10 A CS = VCC, VOUT = VSS TO VCC D010 CINT Internal Capacitance (all inputs and outputs) — 7 pF TA = 25°C, CLK = 1.0 MHz, VCC = 5.0V (Note) D011 ICC Read — — 1 500 mA A VCC = 5.5V; FCLK = 3.0 MHz; SO = Open VCC = 2.5V; FCLK = 2.0 MHz; SO = Open — — 5 3 mA mA VCC = 5.5V VCC = 2.5V — — 5 1 A A CS = VCC = 5.5V, Inputs tied to VCC or VSS CS = VCC = 2.5V, Inputs tied to VCC or VSS Operating Current D012 ICC Write D013 ICCS Standby Current Note: This parameter is periodically sampled and not 100% tested. DS21230E-page 2 1997-2012 Microchip Technology Inc. 25AA080/25LC080/25C080 1.2 AC Characteristics Industrial (I): TA = -40°C to +85°C Automotive (E): TA = -40°C to +125°C AC CHARACTERISTICS Param. No. Sym. Characteristic VCC = 1.8V to 5.5V VCC = 4.5V to 5.5V (25C080 only) Min. Max. Units Test Conditions — — — 3 2 1 MHz MHz MHz VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V 1 FCLK Clock Frequency 2 TCSS CS Setup Time 100 250 500 — — — ns ns ns VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V 3 TCSH CS Hold Time 150 250 475 — — — ns ns ns VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V 4 TCSD CS Disable Time 500 — ns — 5 Tsu Data Setup Time 30 50 50 — — — ns ns ns VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V 6 THD Data Hold Time 50 100 100 — — — ns ns ns VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V 7 TR CLK Rise Time — 2 s (Note 1) 8 TF CLK Fall Time — 2 s (Note 1) 9 THI Clock High Time 150 230 475 — — — ns ns ns VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V 10 TLO Clock Low Time 150 230 475 — — — ns ns ns VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V 11 TCLD Clock Delay Time 50 — ns — 12 TCLE Clock Enable Time 50 — ns — 13 TV Output Valid from Clock Low — — — 150 230 475 ns ns ns VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V 14 THO Output Hold Time 0 — ns (Note 1) 15 TDIS Output Disable Time — — — 200 250 500 ns ns ns VCC = 4.5V to 5.5V (Note 1) VCC = 2.5V to 4.5V (Note 1) VCC = 1.8V to 2.5V (Note 1) 16 THS HOLD Setup Time 100 100 200 — — — ns ns ns VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V 17 THH HOLD Hold Time 100 100 200 — — — ns ns ns VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V 18 THZ HOLD Low to Output High-Z 100 150 200 — — — ns ns ns VCC = 4.5V to 5.5V (Note 1) VCC = 2.5V to 4.5V (Note 1) VCC = 1.8V to 2.5V (Note 1) 19 THV HOLD High to Output Valid 100 150 200 — — — ns ns ns VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V 20 TWC Internal Write Cycle Time — 5 ms — 21 — Endurance 1M — E/W Cycles Note 1: 2: (Note 2) This parameter is periodically sampled and not 100% tested. This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site at: www.microchip.com. 1997-2012 Microchip Technology Inc. DS21230E-page 3 25AA080/25LC080/25C080 FIGURE 1-1: HOLD TIMING CS 17 16 17 16 SCK 18 SO n+2 SI n+2 n+1 n 19 High-impedance n 5 don’t care n+1 n-1 n n n-1 HOLD FIGURE 1-2: SERIAL INPUT TIMING 4 CS 2 7 Mode 1,1 12 11 8 3 SCK Mode 0,0 5 SI 6 MSB in LSB in High-impedance SO FIGURE 1-3: SERIAL OUTPUT TIMING CS 9 3 10 Mode 1,1 SCK Mode 0,0 13 14 SO SI DS21230E-page 4 MSB out 15 ISB out don’t care 1997-2012 Microchip Technology Inc. 25AA080/25LC080/25C080 1.3 FIGURE 1-4: AC Test Conditions AC TEST CIRCUIT VCC AC Waveform: VLO = 0.2V — VHI = VCC - 0.2V (Note 1) VHI = 4.0V (Note 2) Timing Measurement Reference Level 2.25 K SO Input 0.5 VCC Output 0.5 VCC 1.8 K 100 pF Note 1: For VCC 4.0V 2: For VCC > 4.0V 1997-2012 Microchip Technology Inc. DS21230E-page 5 25AA080/25LC080/25C080 2.0 PIN DESCRIPTIONS 2.4 The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE Name PDIP SOIC Function CS 1 1 Chip Select Input SO 2 2 Serial Data Output WP 3 3 Write-Protect Pin Vss 4 4 Ground SI 5 5 Serial Data Input SCK 6 6 Serial Clock Input HOLD 7 7 Hold Input Vcc 8 8 Supply Voltage 2.1 Chip Select (CS) A low level on this pin selects the device. A high level deselects the device and forces it into Standby mode. However, a programming cycle which is already initiated or in progress will be completed, regardless of the CS input signal. If CS is brought high during a program cycle, the device will go into Standby mode as soon as the programming cycle is complete. When the device is deselected, SO goes to the high-impedance state, allowing multiple parts to share the same SPI bus. A low-to-high transition on CS after a valid write sequence initiates an internal write cycle. After powerup, a low level on CS is required prior to any sequence being initiated. 2.2 Serial Input (SI) The SI pin is used to transfer data into the device. It receives instructions, addresses and data. Data is latched on the rising edge of the serial clock. 2.5 Serial Clock (SCK) The SCK is used to synchronize the communication between a master and the 25XX080. Instructions, addresses or data present on the SI pin are latched on the rising edge of the clock input, while data on the SO pin is updated after the falling edge of the clock input. 2.6 Hold (HOLD) The HOLD pin is used to suspend transmission to the 25XX080 while in the middle of a serial sequence without having to retransmit the entire sequence again. It must be held high any time this function is not being used. Once the device is selected and a serial sequence is underway, the HOLD pin may be pulled low to pause further serial communication without resetting the serial sequence. The HOLD pin must be brought low while SCK is low, otherwise the HOLD function will not be invoked until the next SCK high-tolow transition. The 25XX080 must remain selected during this sequence. The SI, SCK and SO pins are in a high-impedance state during the time the device is paused and transitions on these pins will be ignored. To resume serial communication, HOLD must be brought high while the SCK pin is low, otherwise serial communication will not resume. Lowering the HOLD line at any time will tri-state the SO line. Serial Output (SO) The SO pin is used to transfer data out of the 25XX080. During a read cycle, data is shifted out on this pin after the falling edge of the serial clock. 2.3 Write-Protect (WP) This pin is used in conjunction with the WPEN bit in the Status register to prohibit writes to the nonvolatile bits in the Status register. When WP is low and WPEN is high, writing to the nonvolatile bits in the Status register is disabled. All other operations function normally. When WP is high, all functions, including writes to the nonvolatile bits in the Status register operate normally. If the WPEN bit is set, WP low during a Status register write sequence will disable writing to the Status register. If an internal write cycle has already begun, WP going low will have no effect on the write. The WP pin function is blocked when the WPEN bit in the Status register is low. This allows the user to install the 25XX080 in a system with WP pin grounded and still be able to write to the Status register. The WP pin functions will be enabled when the WPEN bit is set high. DS21230E-page 6 1997-2012 Microchip Technology Inc. 25AA080/25LC080/25C080 3.0 FUNCTIONAL DESCRIPTION 3.1 Principles of Operation 3.3 The 25XX080 are 1024 byte Serial EEPROMs designed to interface directly with the Serial Peripheral Interface (SPI) port of many of today’s popular microcontroller families, including Microchip’s PIC16C6X/7X microcontrollers. It may also interface with microcontrollers that do not have a built-in SPI port by using discrete I/O lines programmed properly with the software. The 25XX080 contains an 8-bit instruction register. The device is accessed via the SI pin, with data being clocked in on the rising edge of SCK. The CS pin must be low and the HOLD pin must be high for the entire operation. The WP pin must be held high to allow writing to the memory array. Table 3-1 contains a list of the possible instruction bytes and format for device operation. All instructions, addresses, and data are transferred MSB first, LSB last. Data is sampled on the first rising edge of SCK after CS goes low. If the clock line is shared with other peripheral devices on the SPI bus, the user can assert the HOLD input and place the 25XX080 in ‘HOLD’ mode. After releasing the HOLD pin, operation will resume from the point when the HOLD was asserted. 3.2 Read Sequence The device is selected by pulling CS low. The 8-bit READ instruction is transmitted to the 25XX080 followed by the 16-bit address, with the six MSBs of the address being "don’t care" bits. After the correct READ instruction and address are sent, the data stored in the memory at the selected address is shifted out on the SO pin. The data stored in the memory at the next address can be read sequentially by continuing to provide clock pulses. The internal address pointer is automatically incremented to the next higher address after each byte of data is shifted out. When the highest address is reached (03FFh), the address counter rolls over to address 0000h allowing the read cycle to be continued indefinitely. The read operation is terminated by raising the CS pin (Figure 3-1). TABLE 3-1: Write Sequence Prior to any attempt to write data to the 25XX080, the write enable latch must be set by issuing the WREN instruction (Figure 3-4). This is done by setting CS low and then clocking out the proper instruction into the 25XX080. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch. If the write operation is initiated immediately after the WREN instruction without CS being brought high, the data will not be written to the array because the write enable latch will not have been properly set. Once the write enable latch is set, the user may proceed by setting the CS low, issuing a WRITE instruction, followed by the 16-bit address, with the six MSBs of the address being “don’t care” bits, and then the data to be written. Up to 16 bytes of data can be sent to the 25XX080 before a write cycle is necessary. The only restriction is that all of the bytes must reside in the same page. A page address begins with xxxx xxxx xxxx 0000 and ends with xxxx xxxx xxxx 1111. If the internal address counter reaches xxxx xxxx xxxx 1111 and the clock continues, the counter will roll back to the first address of the page and overwrite any data in the page that may have been written. For the data to be actually written to the array, the CS must be brought high after the Least Significant bit (D0) of the nth data byte has been clocked in. If CS is brought high at any other time, the write operation will not be completed. Refer to Figure 3-2 and Figure 3-3 for more detailed illustrations on the byte write sequence and the page write sequence respectively. While the write is in progress, the Status register may be read to check the status of the WPEN, WIP, WEL, BP1 and BP0 bits (Figure 3-6). A read attempt of a memory array location will not be possible during a write cycle. When the write cycle is completed, the write enable latch is reset. INSTRUCTION SET Instruction Name Instruction Format Description READ 0000 0011 Read data from memory array beginning at selected address WRITE 0000 0010 Write data to memory array beginning at selected address WRDI 0000 0100 Reset the write enable latch (disable write operations) WREN 0000 0110 Set the write enable latch (enable write operations) RDSR 0000 0101 Read Status register WRSR 0000 0001 Write Status register 1997-2012 Microchip Technology Inc. DS21230E-page 7 25AA080/25LC080/25C080 FIGURE 3-1: READ SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31 SCK instruction 0 SI 0 0 0 0 16-bit address 0 1 15 14 13 12 1 2 1 0 data out High-impedance 7 SO FIGURE 3-2: 6 5 4 3 2 1 0 BYTE WRITE SEQUENCE CS Twc 0 1 2 0 0 0 3 4 5 6 7 8 9 10 11 0 1 0 15 14 13 12 21 22 23 24 25 26 27 28 29 30 31 SCK instruction SI 0 0 16-bit address data byte 2 1 0 7 6 5 4 3 2 1 0 High-impedance SO FIGURE 3-3: PAGE WRITE SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31 SCK instruction SI 0 0 0 0 0 16-bit address 0 1 data byte 1 2 0 15 14 13 12 1 0 7 6 5 4 3 2 1 0 CS 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 SCK data byte 2 SI 7 DS21230E-page 8 6 5 4 3 data byte 3 2 1 0 7 6 5 4 3 data byte n (16 max) 2 1 0 7 6 5 4 3 2 1 0 1997-2012 Microchip Technology Inc. 25AA080/25LC080/25C080 3.4 Write Enable (WREN) and Write Disable (WRDI) The following is a list of conditions under which the write enable latch will be reset: • • • • The 25XX080 contains a write enable latch. See Table 3-3 for the Write-Protect Functionality Matrix. This latch must be set before any write operation will be completed internally. The WREN instruction will set the latch, and the WRDI will reset the latch. FIGURE 3-4: Power-up WRDI instruction successfully executed WRSR instruction successfully executed WRITE instruction successfully executed WRITE ENABLE SEQUENCE CS 0 1 2 3 4 5 6 7 SCK 0 SI 0 0 0 0 1 1 0 High-impedance SO FIGURE 3-5: WRITE DISABLE SEQUENCE CS 0 1 2 3 4 5 6 7 SCK SI 0 0 0 0 0 1 10 0 High-impedance SO 1997-2012 Microchip Technology Inc. DS21230E-page 9 25AA080/25LC080/25C080 3.5 Read Status Register (RDSR) The Write Enable Latch (WEL) bit indicates the status of the write enable latch. When set to a ‘1’, the latch allows writes to the array, when set to a ‘0’, the latch prohibits writes to the array. The state of this bit can always be updated via the WREN or WRDI commands regardless of the state of write protection on the Status register. This bit is read only. The Read Status Register (RDSR) instruction provides access to the Status register. The Status register may be read at any time, even during a write cycle. The Status register is formatted as follows: 7 WPEN 6 X 5 X 4 X 3 BP1 2 BP0 1 WEL 0 WIP The Block Protection (BP0 and BP1) bits indicate which blocks are currently write-protected. These bits are set by the user issuing the WRSR instruction. These bits are nonvolatile. The Write-In-Process (WIP) bit indicates whether the 25XX080 is busy with a write operation. When set to a ‘1’, a write is in progress, when set to a ‘0’, no write is in progress. This bit is read-only. FIGURE 3-6: See Figure 3-6 for the RDSR timing sequence. READ STATUS REGISTER TIMING SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 0 SCK instruction SI 0 0 0 0 0 1 0 1 data from Status register High-impedance SO DS21230E-page 10 7 6 5 4 3 2 1997-2012 Microchip Technology Inc. 25AA080/25LC080/25C080 Write Status Register (WRSR) TABLE 3-2: The Write Status Register (WRSR) instruction allows the user to select one of four levels of protection for the array by writing to the appropriate bits in the Status register. The array is divided up into four segments. The user has the ability to write-protect none, one, two, or all four of the segments of the array. The partitioning is controlled as shown in Table 3-2. BP1 BP0 Array Addresses Write-Protected 0 0 none 0 1 upper 1/4 (0300h - 03FFh) 1 0 upper 1/2 (0200h - 03FFh) 1 1 all (0000h - 03FFh) 3.6 The Write-Protect Enable (WPEN) bit is a nonvolatile bit that is available as an enable bit for the WP pin. The Write-Protect (WP) pin and the Write-Protect Enable (WPEN) bit in the Status register control the programmable hardware write-protect feature. Hardware write protection is enabled when WP pin is low and the WPEN bit is high. Hardware write protection is disabled when either the WP pin is high or the WPEN bit is low. When the chip is hardware write-protected, only writes to nonvolatile bits in the Status register are disabled. See Table 3-3 for a matrix of functionality on the WPEN bit. ARRAY PROTECTION See Figure 3-5 for the WRSR timing sequence. FIGURE 3-7: WRITE STATUS REGISTER TIMING SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 0 SCK instruction SI 0 0 0 0 data to Status register 0 0 0 1 7 6 5 4 3 2 High-impedance SO 1997-2012 Microchip Technology Inc. DS21230E-page 11 25AA080/25LC080/25C080 3.7 Data Protection 3.8 The following protection has been implemented to prevent inadvertent writes to the array: • The write enable latch is reset on power-up • A WRITE ENABLE instruction must be issued to set the write enable latch • After a byte write, page write or Status register write, the write enable latch is reset • CS must be set high after the proper number of clock cycles to start an internal write cycle • Access to the array during an internal write cycle is ignored and programming is continued TABLE 3-3: Power-On State The 25XX080 powers on in the following state: • The device is in low-power Standby mode (CS = 1) • The write enable latch is reset • SO is in high-impedance state • A high-to-low level transition on CS is required to enter active state WRITE-PROTECT FUNCTIONALITY MATRIX WPEN WP WEL Protected Blocks Unprotected Blocks Status Register X X 0 Protected Protected Protected 0 X 1 Protected Writable Writable 1 Low 1 Protected Writable Protected X High 1 Protected Writable Writable DS21230E-page 12 1997-2012 Microchip Technology Inc. 25AA080/25LC080/25C080 4.0 PACKAGING INFORMATION 4.1 Package Marking Information 8-Lead PDIP (300 mil) Example: XXXXXXXX XXXXXNNN YYWW 25LC080 /PNNN YYWW 8-Lead SOIC (150 mil) 25LC080 /SNYYWW NNN XXXXXXXX XXXXYYWW NNN Legend: Note: XX...X Y YY WW NNN Example: Customer specific information* Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. 1997-2012 Microchip Technology Inc. DS21230E-page 13 25AA080/25LC080/25C080 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E1 D 2 n 1 E A2 A L c A1 B1 p eB B Units Dimension Limits n p Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic A A2 A1 E E1 D L c § B1 B eB MIN .140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5 INCHES* NOM MAX 8 .100 .155 .130 .170 .145 .313 .250 .373 .130 .012 .058 .018 .370 10 10 .325 .260 .385 .135 .015 .070 .022 .430 15 15 MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10 MIN MAX 4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 DS21230E-page 14 1997-2012 Microchip Technology Inc. 25AA080/25LC080/25C080 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p D 2 B n 1 h 45× c A2 A f L Units Dimension Limits n p Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic A A2 A1 E E1 D h L f c B MIN .053 .052 .004 .228 .146 .189 .010 .019 0 .008 .013 0 0 A1 INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12 MAX .069 .061 .010 .244 .157 .197 .020 .030 8 .010 .020 15 15 MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12 MIN MAX 1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 8 0.25 0.51 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 1997-2012 Microchip Technology Inc. DS21230E-page 15 25AA080/25LC080/25C080 APPENDIX A: REVISION HISTORY Revision D Added note to page 1 header (Not recommended for new designs). Updated document format. Revision E Added a note to each package outline drawing. DS21230E-page 16 1997-2012 Microchip Technology Inc. 25AA080/25LC080/25C080 THE MICROCHIP WEB SITE CUSTOMER SUPPORT Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: Users of Microchip products can receive assistance through several channels: • Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software • General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives • • • • Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://microchip.com/support CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions. 1997-2012 Microchip Technology Inc. DS21230E-page 17 25AA080/25LC080/25C080 READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. TO: Technical Publications Manager RE: Reader Response Total Pages Sent ________ From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ FAX: (______) _________ - _________ Application (optional): Would you like a reply? Y N Device: 25AA080/25LC080/25C080 Literature Number: DS21230E Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this document easy to follow? If not, why? 4. What additions to the document do you think would enhance the structure and subject? 5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS21230E-page 18 1997-2012 Microchip Technology Inc. 25AA080/25LC080/25C080 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X /XX XXX Device Temperature Range Package Pattern Device 25AA080: 8 Kbit 1.8V SPI Serial EEPROM 25AA080T: 8 Kbit 1.8V SPI Serial EEPROM (Tape and Reel) 25LC080: 8 Kbit 2.5V SPI Serial EEPROM 25LC080: 8 Kbit 2.5V SPI Serial EEPROM (Tape and Reel) 25C080: 8 Kbit 5.0V SPI Serial EEPROM 25C080: 8 Kbit 5.0V SPI Serial EEPROM (Tape and Reel) Examples: a) 25AA080-I/SN: Industrial Temp., SOIC package b) 25AA080T-I/SN: Tape and Reel, Industrial Temp., SOIC package c) 25LC080-I/SN: Industrial Temp., SOIC package d) 25LC080T-I/SN: Tape and Reel, Industrial Temp., SOIC package 25C080-I/P: Industrial Temp., PDIP package 25C080-I/SN: Industrial Temp., SOIC package 25C080T-I/SN: Tape and Reel, Industrial Temp., SOIC package 25C080-E/SN: Extended Temp., SOIC package e) f) g) Temperature Range I E = -40C to +85C = -40C to+125C Package P SN = = h) Plastic DIP (300 mil body), 8-lead Plastic SOIC (150 mil body), 8-lead Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. Your local Microchip sales office The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 1997-2012 Microchip Technology Inc. DS21230E-page 19 25AA080/25LC080/25C080 NOTES: DS21230E-page 20 1997-2012 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MTP, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. Analog-for-the-Digital Age, Application Maestro, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. & KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 1997-2012, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 9781620767399 QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == 1997-2012 Microchip Technology Inc. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. DS21230E-page 21 Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/ support Web Address: www.microchip.com Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 India - Bangalore Tel: 91-80-3090-4444 Fax: 91-80-3090-4123 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Japan - Osaka Tel: 81-66-152-7160 Fax: 81-66-152-9310 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Cleveland Independence, OH Tel: 216-447-0464 Fax: 216-447-0643 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8569-7000 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Chongqing Tel: 86-23-8980-9588 Fax: 86-23-8980-9500 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 China - Hangzhou Tel: 86-571-2819-3187 Fax: 86-571-2819-3189 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 Taiwan - Hsin Chu Tel: 886-3-5778-366 Fax: 886-3-5770-955 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 Taiwan - Kaohsiung Tel: 886-7-213-7828 Fax: 886-7-330-9305 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 Taiwan - Taipei Tel: 886-2-2508-8600 Fax: 886-2-2508-0102 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049 DS21230E-page 22 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 10/26/12 1997-2012 Microchip Technology Inc.