22 μA, RRIO, CMOS, 18 V Operational Amplifier AD8546/AD8548 Data Sheet FEATURES PIN CONFIGURATIONS OUT A 1 –IN B 6 9 –IN C APPLICATIONS OUT B 7 8 OUT C Portable medical equipment Remote sensors Transimpedance amplifiers Current monitors 4 mA to 20 mA loop drivers Buffer/level shifting Figure 2. AD8548 (14-Lead SOIC_N) –IN A 2 AD8546 +IN A 3 TOP VIEW (Not to Scale) V– 4 8 V+ 7 OUT B 6 –IN B 5 +IN B 09585-001 Micropower at high voltage (18 V): 22 μA maximum Low input bias current: 20 pA maximum Gain bandwidth product: 240 kHz at AV =100 typical Unity-gain crossover: 240 kHz −3 dB closed-loop bandwidth: 310 kHz Slew rate: 80 V/ms Large signal voltage gain: 110 dB minimum Single-supply operation: 2.7 V to 18 V Dual-supply operation: ±1.35 V to ±9 V Unity-gain stable Excellent electromagnetic interference immunity Figure 1. AD8546 (8-Lead MSOP) OUT A 1 14 OUT D –IN A 2 13 –IN D 12 +IN D +IN A 3 AD8548 11 V– TOP VIEW +IN B 5 (Not to Scale) 10 +IN C 09585-103 V+ 4 GENERAL DESCRIPTION The AD8546 and AD8548 are dual and quad micropower, high input impedance amplifiers optimized for low power and wide operating supply voltage range applications. The AD8546/AD8548 rail-to-rail input/output (RRIO) feature provides increased dynamic range to drive low frequency data converters, making these amplifiers ideal for dc gain and buffering of sensor front ends or high impedance input sources used in wireless or remote sensors or transmitters. The AD8546/ AD8548 also have high immunity to electromagnetic interference. The low supply current specification (22 μA) of the AD8546/ AD8548 over a wide operating voltage range of 2.7 V to 18 V or dual supplies (±1.35 V to ±9 V) makes these amplifiers useful for a variety of battery-powered, portable applications, such as ECGs, pulse monitors, glucose meters, smoke and fire detectors, vibration monitors, and backup battery sensors. The AD8546/AD8548 are specified over the extended industrial temperature range of −40°C to +125°C. The AD8546 is available in an 8-lead MSOP package; the AD8548 is available in a 14-lead SOIC_N package. Rev. C Table 1. Micropower Op Amps (<250 μA Typical)1 Amplifier Single Dual Quad 1 5V AD8500 AD8505 AD8541 AD8603 ADA4505-1 AD8502 AD8506 AD8542 AD8607 ADA4505-2 AD8504 AD8508 AD8544 AD8609 ADA4505-4 Supply Voltage 12 V to 18 V 36 V AD8663 AD8546 AD8657 AD8667 OP281 ADA4062-2 ADA4096-2 AD8548 AD8669 OP481 AD8659 ADA4062-4 ADA4096-4 See www.analog.com for the latest selection of micropower op amps. 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Technical Support www.analog.com AD8546/AD8548 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................7 Applications ....................................................................................... 1 Applications Information .............................................................. 17 Pin Configurations ........................................................................... 1 Input Stage ................................................................................... 17 General Description ......................................................................... 1 Output Stage................................................................................ 18 Revision History ............................................................................... 2 Rail-to-Rail Input and Output .................................................. 18 Specifications..................................................................................... 3 Resistive Load ............................................................................. 18 Electrical Characteristics—18 V Operation ............................. 3 Comparator Operation .............................................................. 19 Electrical Characteristics—10 V Operation ............................. 4 EMI Rejection Ratio .................................................................. 20 Electrical Characteristics—2.7 V Operation ............................ 5 4 mA to 20 mA Process Control Current Loop Transmitter ...20 Absolute Maximum Ratings............................................................ 6 Outline Dimensions ....................................................................... 21 Thermal Resistance ...................................................................... 6 Ordering Guide .......................................................................... 21 ESD Caution .................................................................................. 6 REVISION HISTORY 9/12—Rev. B to Rev. C Changes to Features Section, General Description Section, and Table 1 ................................................................................................ 1 Changes to Table 2 ............................................................................ 3 Changes to Table 3 ............................................................................ 4 Changes to Table 4 ............................................................................ 5 Added EMI Rejection Ration Section.......................................... 20 4/12—Rev. A to Rev. B Added AD8548 and 14-Lead SOIC .................................. Universal Changes to Product Title, Features Section, General Description Section, and Table 1 .................................................... 1 Added Figure 2; Renumbered Figures Sequentially..................... 1 Moved Electrical Characteristics—18 V Operation Section ...... 3 Changes to Table 2 ............................................................................ 3 Changes to Table 3 ............................................................................ 4 Moved Electrical Characteristics—2.7 V Operation Section ..... 5 Changes to Table 4.............................................................................5 Changes to Table 6.............................................................................6 Changes to Figure 4, Figure 5, Figure 7, and Figure 8 ..................7 Deleted Figure 8 and Figure 11........................................................8 Changes to Figure 9, Figure 10, Figure 12, and Figure 13 ............8 Changes to Figure 22 and Figure 25............................................. 10 Changes to Figure 33...................................................................... 12 Changes to Figure 63 and Figure 64............................................. 18 Updated Outline Dimensions ....................................................... 21 Added Figure 72 ............................................................................. 21 Changes to Ordering Guide .......................................................... 21 4/11—Rev. 0 to Rev. A Changes to Product Title, Features Section, Applications Section, General Description Section, and Table 1 .......................1 1/11—Revision 0: Initial Version Rev. C | Page 2 of 24 Data Sheet AD8546/AD8548 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—18 V OPERATION VSY = 18 V, VCM = VSY/2, TA = 25°C, unless otherwise noted. Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Test Conditions/Comments VOS VCM = 0 V to 18 V VCM = 0.3 V to 17.7 V; −40°C ≤ TA ≤ +125°C VCM = 0 V to 18 V; −40°C ≤ TA ≤ +125°C Offset Voltage Drift Input Bias Current ΔVOS/ΔT IB Min Typ Max Unit 3 7 12 Input Resistance Input Capacitance Differential Mode Common Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio RIN 10 mV mV mV µV/°C pA nA pA nA V dB dB dB dB dB GΩ CINDM CINCM 11 3.5 pF pF Supply Current per Amplifier ISY 3 5 −40°C ≤ TA ≤ +125°C Input Offset Current IOS Input Voltage Range Common-Mode Rejection Ratio IVR CMRR Large Signal Voltage Gain AVO −40°C ≤ TA ≤ +125°C VCM = 0 V to 18 V VCM = 0.3 V to 17.7 V; −40°C ≤ TA ≤ +125°C VCM = 0 V to 18 V; −40°C ≤ TA ≤ +125°C RL = 100 kΩ; VO = 0.5 V to 17.5 V −40°C ≤ TA ≤ +125°C VOH VOL ISC ZOUT RL = 100 kΩ to VCM; −40°C ≤ TA ≤ +125°C RL = 100 kΩ to VCM; −40°C ≤ TA ≤ +125°C PSRR VSY = 2.7 V to 18 V −40°C ≤ TA ≤ +125°C IO = 0 mA −40°C ≤ TA ≤ +125°C 0 74 68 65 110 105 20 2.6 40 5.2 18 95 125 17.97 30 ±12 15 f = 1 kHz; AV = +1 95 90 115 18 22 33 V mV mA Ω dB dB µA µA DYNAMIC PERFORMANCE Slew Rate Settling Time to 0.1% Unity Gain Crossover Phase Margin Gain Bandwidth Product −3 dB Closed-Loop Bandwidth Channel Separation EMI Rejection Ratio of +IN x SR tS UGC ΦM GBP f−3 dB CS EMIRR RL = 1 MΩ; CL = 10 pF; AV = +1 VIN = 1 V step; RL = 100 kΩ; CL = 10 pF VIN = 10 mV p-p; RL = 1 MΩ; CL = 10 pF; AV = +1 VIN = 10 mV p-p; RL = 1 MΩ; CL = 10 pF; AV = +1 VIN = 10 mV p-p; RL = 1 MΩ; CL = 10 pF; AV = +100 VIN = 10 mV p-p; RL = 1 MΩ; CL = 10 pF; AV = +1 f = 10 kHz; RL = 1 MΩ VIN = 100 mV p-p; f = 400 MHz, 900 MHz, 1800 MHz, 2400 MHz 80 15 240 60 240 310 105 90 V/ms µs kHz Degrees kHz kHz dB dB NOISE PERFORMANCE Voltage Noise Voltage Noise Density en p-p en f = 0.1 Hz to 10 Hz f = 1 kHz f = 10 kHz f = 1 kHz 5 50 45 0.1 µV p-p nV/√Hz nV/√Hz pA/√Hz Current Noise Density in Rev. C | Page 3 of 24 AD8546/AD8548 Data Sheet ELECTRICAL CHARACTERISTICS—10 V OPERATION VSY = 10 V, VCM = VSY/2, TA = 25°C, unless otherwise noted. Table 3. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Test Conditions/Comments VOS VCM = 0 V to 10 V VCM = 0.3 V to 9.7 V; −40°C ≤ TA ≤ +125°C VCM = 0 V to 10 V; −40°C ≤ TA ≤ +125°C Min Typ Max Unit 3 8 12 Input Resistance Input Capacitance Differential Mode Common Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio RIN 10 mV mV mV µV/°C pA nA pA nA V dB dB dB dB dB GΩ CINDM CINCM 11 3.5 pF pF Supply Current per Amplifier ISY Offset Voltage Drift Input Bias Current ΔVOS/ΔT IB 3 2 −40°C ≤ TA ≤ +125°C Input Offset Current IOS Input Voltage Range Common-Mode Rejection Ratio IVR CMRR Large Signal Voltage Gain AVO −40°C ≤ TA ≤ +125°C VCM = 0 V to 10 V VCM = 0.3 V to 9.7 V; −40°C ≤ TA ≤ +125°C VCM = 0 V to 10 V; −40°C ≤ TA ≤ +125°C RL = 100 kΩ; VO = 0.5 V to 9.5 V −40°C ≤ TA ≤ +125°C VOH VOL ISC ZOUT RL = 100 kΩ to VCM; −40°C ≤ TA ≤ +125°C RL = 100 kΩ to VCM; −40°C ≤ TA ≤ +125°C PSRR VSY = 2.7 V to 18 V −40°C ≤ TA ≤ +125°C IO = 0 mA −40°C ≤ TA ≤ +125°C 0 70 62 60 105 100 15 2.6 30 5.2 10 88 120 9.98 20 ±11 15 f = 1 kHz; AV = +1 95 90 115 18 22 33 V mV mA Ω dB dB µA µA DYNAMIC PERFORMANCE Slew Rate Settling Time to 0.1% Unity-Gain Crossover Phase Margin Gain Bandwidth Product −3 dB Closed-Loop Bandwidth Channel Separation EMI Rejection Ratio of +IN x SR tS UGC ΦM GBP f−3 dB CS EMIRR RL = 1 MΩ; CL = 10 pF; AV = +1 VIN = 1 V step; RL = 100 kΩ; CL = 10 pF VIN = 10 mV p-p; RL = 1 MΩ, CL = 10 pF, AV = +1 VIN = 10 mV p-p; RL = 1 MΩ; CL = 10 pF; AV = +1 VIN = 10 mV p-p; RL = 1 MΩ; CL = 10 pF; AV = +100 VIN = 10 mV p-p, RL = 1 MΩ, CL = 10 pF, AV = +1 f = 10 kHz; RL = 1 MΩ VIN = 100 mV p-p; f = 400 MHz, 900 MHz, 1800 MHz, 2400 MHz 75 15 235 60 235 300 105 90 V/ms µs kHz Degrees kHz kHz dB dB NOISE PERFORMANCE Voltage Noise Voltage Noise Density en p-p en f = 0.1 Hz to 10 Hz f = 1 kHz f = 10 kHz f = 1 kHz 5 50 45 0.1 µV p-p nV/√Hz nV/√Hz pA/√Hz Current Noise Density in Rev. C | Page 4 of 24 Data Sheet AD8546/AD8548 ELECTRICAL CHARACTERISTICS—2.7 V OPERATION VSY = 2.7 V, VCM = VSY/2, TA = 25°C, unless otherwise noted. Table 4. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Test Conditions/Comments VOS VCM = 0 V to 2.7 V VCM = 0.3 V to 2.4 V; −40°C ≤ TA ≤ +125°C VCM = 0 V to 2.7 V; −40°C ≤ TA ≤ +125°C Offset Voltage Drift Input Bias Current ΔVOS/ΔT IB Min Typ 3 4 12 RIN 10 CINDM CINCM 11 3.5 pF pF Input Offset Current IOS Input Voltage Range Common-Mode Rejection Ratio IVR CMRR 3 1 Large Signal Voltage Gain AVO −40°C ≤ TA ≤ +125°C Supply Current per Amplifier Unit mV mV mV µV/°C pA nA pA nA V dB dB dB dB dB GΩ −40°C ≤ TA ≤ +125°C Input Resistance Input Capacitance Differential Mode Common Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Max VCM = 0 V to 2.7 V VCM = 0.3 V to 2.4 V; −40°C ≤ TA ≤ +125°C VCM = 0 V to 2.7 V; −40°C ≤ TA ≤ +125°C RL = 100 kΩ; VO = 0.5 V to 2.2 V −40°C ≤ TA ≤ +125°C VOH VOL ISC ZOUT RL = 100 kΩ to VCM; −40°C ≤ TA ≤ +125°C RL = 100 kΩ to VCM; −40°C ≤ TA ≤ +125°C PSRR VSY = 2.7 V to 18 V −40°C ≤ TA ≤ +125°C IO = 0 mA −40°C ≤ TA ≤ +125°C ISY 0 60 58 49 97 90 10 2.6 20 5.2 2.7 75 115 2.69 10 ±4 20 f = 1 kHz; AV = +1 95 90 115 18 22 33 V mV mA Ω dB dB µA µA DYNAMIC PERFORMANCE Slew Rate Settling Time to 0.1% Unity Gain Crossover Phase Margin Gain Bandwidth Product −3 dB Closed-Loop Bandwidth Channel Separation EMI Rejection Ratio of +IN x SR tS UGC ΦM GBP f−3 dB CS EMIRR RL = 1 MΩ; CL = 10 pF; AV = +1 VIN = 1 V step; RL = 100 kΩ; CL = 10 pF VIN = 10 mV p-p; RL = 1 MΩ; CL = 10 pF; AV = +1 VIN = 10 mV p-p; RL = 1 MΩ; CL = 10 pF; AV = +1 VIN = 10 mV p-p; RL = 1 MΩ; CL = 10 pF; AV = +100 VIN = 10 mV p-p; RL = 1 MΩ; CL = 10 pF; AV = +1 f = 10 kHz; RL = 1 MΩ VIN = 100 mV p-p; f = 400 MHz, 900 MHz, 1800 MHz, 2400 MHz 50 20 190 60 200 250 105 90 V/ms µs kHz Degrees kHz kHz dB dB NOISE PERFORMANCE Voltage Noise Voltage Noise Density en p-p en f = 0.1 Hz to 10 Hz f = 1 kHz f = 10 kHz f = 1 kHz 6 60 56 0.1 µV p-p nV/√Hz nV/√Hz pA/√Hz Current Noise Density in Rev. C | Page 5 of 24 AD8546/AD8548 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 5. Parameter Supply Voltage Input Voltage Input Current1 Differential Input Voltage Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) 1 Rating 20.5 V (V−) − 300 mV to (V+) + 300 mV ±10 mA ±VSY Indefinite −65°C to +150°C −40°C to +125°C −65°C to +150°C 300°C θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages using a standard 4-layer board. Table 6. Thermal Resistance Package Type 8-Lead MSOP (RM-8) 14-Lead SOIC_N (R-14) ESD CAUTION The input pins have clamp diodes to the power supply pins. Limit the input current to 10 mA or less whenever input signals exceed the power supply rail by 0.3 V. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. C | Page 6 of 24 θJA 142 115 θJC 45 36 Unit °C/W °C/W Data Sheet AD8546/AD8548 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. 40 40 VSY = 18V VCM = VSY/2 35 25 20 15 10 30 25 20 15 10 5 0 0 VOS (mV) 09585-002 5 –2.4 –2.2 –2.0 –1.8 –1.6 –1.4 –1.2 –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 NUMBER OF AMPLIFIERS 30 –2.4 –2.2 –2.0 –1.8 –1.6 –1.4 –1.2 –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 VOS (mV) Figure 3. Input Offset Voltage Distribution 70 Figure 6. Input Offset Voltage Distribution 70 VSY = 2.7V –40°C ≤ TA ≤ +125°C 60 NUMBER OF AMPLIFIERS 50 40 30 20 10 40 30 20 10 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 TCVOS (µV/°C) 0 09585-004 0 50 0 3.0 1.0 0.5 0.5 VOS (mV) 1.5 1.0 0 –0.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 18 VSY = 18V 0 –1.0 –1.5 –1.5 –2.0 –2.0 –2.5 –2.5 0.3 2.5 –0.5 –1.0 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 VCM (V) 09585-005 VOS (mV) 2.0 1.5 0 2.0 2.5 2.0 –3.0 1.5 Figure 7. Input Offset Voltage Drift Distribution VSY = 2.7V 2.5 1.0 TCVOS (µV/°C) Figure 4. Input Offset Voltage Drift Distribution 3.0 0.5 09585-007 NUMBER OF AMPLIFIERS 60 VSY = 18V –40°C ≤ TA ≤ +125°C 09585-008 NUMBER OF AMPLIFIERS 35 09585-105 VSY = 2.7V VCM = VSY/2 Figure 5. Input Offset Voltage vs. Common-Mode Voltage –3.0 0 2 4 6 8 10 12 14 16 VCM (V) Figure 8. Input Offset Voltage vs. Common-Mode Voltage Rev. C | Page 7 of 24 AD8546/AD8548 Data Sheet 6 6 VSY = 18V –40°C ≤ TA ≤ +125°C 4 4 2 2 VOS (mV) 0 –2 –2 –4 –4 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 –6 09585-110 –6 2.7 VCM (V) 6 9 12 15 18 Figure 12. Input Offset Voltage vs. Common-Mode Voltage 10000 VSY = 2.7V VSY = 18V 1000 100 100 IB (pA) IB (pA) 1000 10 1 1 | IB+ | | IB– | 75 100 125 TEMPERATURE (°C) 09585-010 50 | IB+ | | IB– | 0.1 25 50 75 100 125 TEMPERATURE (°C) Figure 10. Input Bias Current vs. Temperature Figure 13. Input Bias Current vs. Temperature 4 4 VSY = 18V VSY = 2.7V 3 2 2 1 1 IB (nA) 3 0 125°C 85°C 25°C –1 0 –2 –2 –3 –3 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 VCM (V) 2.7 –4 09585-014 –4 0 125°C 85°C 25°C –1 0 2 4 6 8 10 12 14 16 VCM (V) Figure 11. Input Bias Current vs. Common-Mode Voltage Figure 14. Input Bias Current vs. Common-Mode Voltage Rev. C | Page 8 of 24 18 09585-013 10 0.1 25 IB (nA) 3 VCM (V) Figure 9. Input Offset Voltage vs. Common-Mode Voltage 10000 0 09585-113 0 09585-017 VOS (mV) VSY = 2.7V –40°C ≤ TA ≤ +125°C Data Sheet AD8546/AD8548 1 –40°C +25°C +85°C +125°C 100m 10m 1m 0.1m 0.01m 0.001 0.01 0.1 1 LOAD CURRENT (mA) 10 100 –40°C +25°C +85°C +125°C 100m 10m 1m 0.1m 0.01m 0.001 Figure 15. Output Voltage (VOH) to Supply Rail vs. Load Current 0.01 0.1 1 LOAD CURRENT (mA) –40°C +25°C +85°C +125°C 100m 10m 1m 0.01 0.1 1 LOAD CURRENT (mA) 10 100 –40°C +25°C +85°C +125°C 100m 10m 1m 0.1m 0.01m 0.001 09585-016 0.1m VSY = 18V 1 Figure 16. Output Voltage (VOL) to Supply Rail vs. Load Current 0.01 0.1 1 LOAD CURRENT (mA) 10 100 09585-019 OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (V) 1 0.01m 0.001 Figure 19. Output Voltage (VOL) to Supply Rail vs. Load Current 18.000 2.700 RL = 1MΩ RL = 1MΩ OUTPUT VOLTAGE, VOH (V) 2.699 2.698 2.697 RL = 100kΩ 17.995 17.990 17.985 RL = 100kΩ 17.980 2.696 –25 0 25 50 75 100 TEMPERATURE (°C) 125 Figure 17. Output Voltage (VOH) vs. Temperature 17.975 –50 –25 0 25 50 75 100 TEMPERATURE (°C) Figure 20. Output Voltage (VOH) vs. Temperature Rev. C | Page 9 of 24 125 09585-023 VSY = 18V VSY = 2.7V 09585-020 OUTPUT VOLTAGE, VOH (V) 100 10 VSY = 2.7V 2.695 –50 10 Figure 18. Output Voltage (VOH) to Supply Rail vs. Load Current 10 OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (V) VSY = 18V 1 09585-018 OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (V) 10 VSY = 2.7V 09585-015 OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (V) 10 AD8546/AD8548 Data Sheet 6 12 VSY = 18V VSY = 2.7V 10 4 3 RL = 100kΩ 2 1 RL = 100kΩ 8 6 4 2 RL = 1MΩ RL = 1MΩ –25 0 25 50 75 100 125 TEMPERATURE (°C) 0 –50 09585-021 0 –50 75 100 125 VSY = 18V 30 25 25 ISY PER AMP (µA) 20 15 20 15 10 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 VCM (V) 0 09585-123 0 –40°C +25°C +85°C +125°C 5 0 3 6 9 12 15 18 VCM (V) Figure 22. Supply Current per Amplifier vs. Common-Mode Voltage 09585-126 –40°C +25°C +85°C +125°C 5 Figure 25. Supply Current per Amplifier vs. Common-Mode Voltage 60 35 30 50 VSY = 2.7V VSY = 18V ISY PER AMP (µA) 25 20 15 40 30 20 10 –40°C +25°C 5 10 +85°C +125°C 0 3 6 9 12 15 VSY (V) 18 0 –50 09585-026 0 –25 0 50 25 TEMPERATURE (°C) 75 100 Figure 26. Supply Current per Amplifier vs. Temperature Figure 23. Supply Current per Amplifier vs. Supply Voltage Rev. C | Page 10 of 24 125 09585-029 ISY PER AMP (µA) 50 35 VSY = 2.7V 10 ISY PER AMP (µA) 25 Figure 24. Output Voltage (VOL) vs. Temperature 30 0 0 TEMPERATURE (°C) Figure 21. Output Voltage (VOL) vs. Temperature 35 –25 09585-024 OUTPUT VOLTAGE, VOL (mV) OUTPUT VOLTAGE, VOL (mV) 5 Data Sheet AD8546/AD8548 GAIN 0 –45 –20 CL = 10pF –90 CL = 100pF –60 1k 10k –135 1M 100k 90 20 45 0 0 GAIN –45 –20 CL = 10pF –40 09585-027 FREQUENCY (Hz) –90 CL = 100pF –60 1k 10k –135 1M 100k FREQUENCY (Hz) Figure 27. Open-Loop Gain and Phase vs. Frequency Figure 30. Open-Loop Gain and Phase vs. Frequency 60 60 VSY = 2.7V 20 0 40 CLOSED-LOOP GAIN (dB) AV = +10 AV = +1 –20 –40 20 0 AV = +100 AV = +10 AV = +1 –20 –40 1k 10k 100k 1M FREQUENCY (Hz) –60 100 09585-028 –60 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 28. Closed-Loop Gain vs. Frequency Figure 31. Closed-Loop Gain vs. Frequency 1000 1000 AV = +100 AV = +100 AV = +10 AV = +10 100 100 AV = +1 ZOUT (Ω) AV = +1 10 10 VSY = 18V 100 10k 1k FREQUENCY (Hz) 100k 09585-032 VSY = 2.7V 1 Figure 29. Output Impedance vs. Frequency 1 100 1k 10k FREQUENCY (Hz) Figure 32. Output Impedance vs. Frequency Rev. C | Page 11 of 24 100k 09585-035 CLOSED-LOOP GAIN (dB) 40 VSY = 18V AV = +100 09585-031 –40 40 PHASE (Degrees) 45 OPEN-LOOP GAIN (dB) 20 PHASE (Degrees) 90 ZOUT (Ω) OPEN-LOOP GAIN (dB) PHASE VSY = 18V RL = 1MΩ PHASE 40 0 135 60 VSY = 2.7V RL = 1MΩ 09585-030 135 60 AD8546/AD8548 140 120 100 100 CMRR (dB) 120 80 60 80 60 40 40 20 20 1k 10k 100k 1M FREQUENCY (Hz) 0 100 1k 10k 100k Figure 33. CMRR vs. Frequency Figure 36. CMRR vs. Frequency 100 100 VSY = 18V 80 80 60 60 PSRR (dB) PSRR+ PSRR– 40 20 20 10k 100k 1M 0 100 09585-034 1k FREQUENCY (Hz) 1k 10k 100k 1M FREQUENCY (Hz) Figure 37. PSRR vs. Frequency Figure 34. PSRR vs. Frequency 70 70 VSY = 2.7V VIN = 10mV p-p RL = 1MΩ 60 60 VSY = 18V VIN = 10mV p-p RL = 1MΩ 50 OVERSHOOT (%) 50 40 30 OS+ OS– 20 40 30 20 OS+ OS– 10 10 0 10 100 CAPACITANCE (pF) 1000 09585-038 OVERSHOOT (%) PSRR+ PSRR– 40 Figure 35. Small Signal Overshoot vs. Load Capacitance 0 10 100 CAPACITANCE (pF) Figure 38. Small Signal Overshoot vs. Load Capacitance Rev. C | Page 12 of 24 1000 09585-041 PSRR (dB) VSY = 2.7V 0 100 1M FREQUENCY (Hz) 09585-037 0 100 VSY = 18V VCM = VSY/2 09585-036 VSY = 2.7V VCM = VSY/2 09585-134 CMRR (dB) 140 Data Sheet Data Sheet AD8546/AD8548 VSY = ±1.35V AV = +1 RL = 1MΩ CL = 100pF TIME (100µs/DIV) TIME (100µs/DIV) Figure 39. Large Signal Transient Response Figure 42. Large Signal Transient Response VSY = ±1.35V AV = +1 RL = 1MΩ CL = 100pF TIME (100µs/DIV) Figure 43. Small Signal Transient Response INPUT 0 2 INPUT VOLTAGE (V) VSY = ±1.35V AV = –10 RL = 1MΩ –0.4 OUTPUT VOLTAGE (V) –0.2 INPUT VSY = ±9V AV = –10 RL = 1MΩ –1 –2 10 1 5 OUTPUT OUTPUT 0 0 09585-044 TIME (40µs/DIV) OUTPUT VOLTAGE (V) 0 Figure 41. Positive Overload Recovery TIME (40µs/DIV) Figure 44. Positive Overload Recovery Rev. C | Page 13 of 24 09585-047 TIME (100µs/DIV) 09585-043 09585-040 VOLTAGE (5mV/DIV) VOLTAGE (5mV/DIV) VSY = ±9V AV = +1 RL = 1MΩ CL = 100pF Figure 40. Small Signal Transient Response INPUT VOLTAGE (V) 09585-042 09585-039 VOLTAGE (5V/DIV) VOLTAGE (500mV/DIV) VSY = ±9V AV = +1 RL = 1MΩ CL = 100pF AD8546/AD8548 Data Sheet VSY = ±1.35V AV = –10 RL = 1MΩ 0.4 OUTPUT 0 –1 INPUT VOLTAGE (V) INPUT 0 OUTPUT 0 –5 TIME (40µs/DIV) TIME (40µs/DIV) Figure 45. Negative Overload Recovery Figure 48. Negative Overload Recovery INPUT VOLTAGE (500mV/DIV) VOLTAGE (500mV/DIV) INPUT VSY = 2.7V RL = 100kΩ CL = 10pF +5mV 0 ERROR BAND 09585-048 –10 09585-045 –2 VSY = 18V RL = 100kΩ CL = 10pF +5mV 0 ERROR BAND OUTPUT OUTPUT –5mV TIME (10µs/DIV) TIME (10µs/DIV) Figure 46. Positive Settling Time to 0.1% Figure 49. Positive Settling Time to 0.1% VOLTAGE (500mV/DIV) VSY = 18V RL = 100kΩ CL = 10pF INPUT +5mV 0 ERROR BAND –5mV TIME (10µs/DIV) 09585-050 VOLTAGE (500mV/DIV) VSY = 2.7V RL = 100kΩ CL = 10pF OUTPUT 09585-049 09585-046 –5mV Figure 47. Negative Settling Time to 0.1% INPUT +5mV OUTPUT –5mV TIME (10µs/DIV) Figure 50. Negative Settling Time to 0.1% Rev. C | Page 14 of 24 0 ERROR BAND 09585-053 0 OUTPUT VOLTAGE (V) 1 INPUT OUTPUT VOLTAGE (V) 0.2 INPUT VOLTAGE (V) VSY = ±9V AV = –10 RL = 1MΩ 2 Data Sheet AD8546/AD8548 1000 1000 VSY = 18V 10 1 10 100 1k 10k FREQUENCY (Hz) 100k 1M 100 10 1 10 Figure 51. Voltage Noise Density vs. Frequency 100 1k 10k FREQUENCY (Hz) 1M Figure 54. Voltage Noise Density vs. Frequency VSY = 18V TIME (2s/DIV) 09585-055 VOLTAGE (2µV/DIV) 09585-052 VOLTAGE (2µV/DIV) VSY = 2.7V TIME (2s/DIV) Figure 52. 0.1 Hz to 10 Hz Noise Figure 55. 0.1 Hz to 10 Hz Noise 20 3.0 VSY = 2.7V VIN = 2.6V RL = 1MΩ AV = +1 VSY = 18V VIN = 17.9V RL = 1MΩ AV = +1 18 16 OUTPUT SWING (V) 2.5 2.0 1.5 1.0 14 12 10 8 6 4 0.5 0 10 100 1k 10k 100k FREQUENCY (Hz) 1M 0 10 100 1k 10k 100k FREQUENCY (Hz) Figure 53. Output Swing vs. Frequency Figure 56. Output Swing vs. Frequency Rev. C | Page 15 of 24 1M 09585-059 2 09585-056 OUTPUT SWING (V) 100k 09585-054 VOLTAGE NOISE DENSITY (nV/ Hz) 100 09585-051 VOLTAGE NOISE DENSITY (nV/ Hz) VSY = 2.7V AD8546/AD8548 Data Sheet 100 100 VSY = 18V VIN = 0.5V rms RL = 1MΩ AV = +1 VSY = 2.7V VIN = 0.2V rms RL = 1MΩ AV = +1 10 THD + N (%) 1 0.1 100 1k 10k 100k FREQUENCY (Hz) 0.01 10 09585-057 0.01 10 100 Figure 57. THD + N vs. Frequency 10k 0 VSY = 2.7V RL = 1MΩ AV = –100 1MΩ 10kΩ –20 CHANNEL SEPARATION (dB) –20 RL –40 –60 VIN = 0.5V p-p –80 100k Figure 59. THD + N vs. Frequency 0 VIN = 1.5V p-p VIN = 2.6V p-p –100 1MΩ VSY = 18V RL = 1MΩ AV = –100 10kΩ RL –40 VIN = 1V p-p VIN = 5V p-p VIN = 10V p-p VIN = 15V p-p VIN = 17V p-p –60 –80 –100 –120 –120 –140 –140 100 1k 10k FREQUENCY (Hz) 100k 09585-058 CHANNEL SEPARATION (dB) 1k FREQUENCY (Hz) 09585-060 0.1 1 Figure 58. Channel Separation vs. Frequency 100 1k 10k FREQUENCY (Hz) Figure 60. Channel Separation vs. Frequency Rev. C | Page 16 of 24 100k 09585-061 THD + N (%) 10 Data Sheet AD8546/AD8548 APPLICATIONS INFORMATION drain impedances contributes to the offset voltage of the amplifier. This problem is exacerbated at high temperatures due to the decrease in the threshold voltage of the input transistors. See Figure 9 and Figure 12 for typical performance data. The AD8546/AD8548 are low input bias current, micropower CMOS amplifiers that operate over a wide supply voltage range of 2.7 V to 18 V. The AD8546/AD8548 also employ unique input and output stages to achieve rail-to-rail input and output ranges with very low supply current. Current Source I1 drives the PMOS transistor pair. As the input common-mode voltage approaches the upper rail, I1 is steered away from the PMOS differential pair through the M5 transistor. The bias voltage, VB1, controls the point where this transfer occurs. INPUT STAGE Figure 61 shows the simplified schematic of the AD8546/AD8548. The input stage comprises two differential transistor pairs: an NMOS pair (M1, M2) and a PMOS pair (M3, M4). The input common-mode voltage determines which differential pair turns on and is more active than the other. M5 diverts the tail current into a current mirror consisting of the M6 and M7 transistors. The output of the current mirror then drives the NMOS transistor pair. Note that the activation of this current mirror causes a slight increase in supply current at high common-mode voltages (see Figure 22 and Figure 25). The PMOS differential pair is active when the input voltage approaches and reaches the lower supply rail. The NMOS differential pair is needed for input voltages up to and including the upper supply rail. This topology allows the amplifier to maintain a wide dynamic input voltage range and maximize signal swing to both supply rails. For the greater part of the input common-mode voltage range, the PMOS differential pair is active. The AD8546/AD8548 achieve their high performance by using low voltage MOS devices for their differential inputs. These low voltage MOS devices offer excellent noise and bandwidth per unit of current. Each differential input pair is protected by proprietary regulation circuitry (not shown in Figure 61). The regulation circuitry consists of a combination of active devices, which maintain the proper voltages across the input pairs during normal operation, and passive clamping devices, which protect the amplifier during fast transients. However, these passive clamping devices begin to forward-bias as the common-mode voltage approaches either power supply rail. This causes an increase in the input bias current (see Figure 11 and Figure 14). Differential pairs commonly exhibit different offset voltages. The handoff from one pair to the other creates a step-like characteristic that is visible in the VOS vs. VCM graphs (see Figure 5 and Figure 8). This characteristic is inherent in all rail-to-rail amplifiers that use the dual differential pair topology. Therefore, always choose a common-mode voltage that does not include the region of handoff from one input differential pair to the other. The input devices are also protected from large differential input voltages by clamp diodes (D1 and D2). These diodes are buffered from the inputs with two 10 kΩ resistors (R1 and R2). The differential diodes turn on when the differential input voltage exceeds approximately 600 mV; in this condition, the differential input resistance drops to 20 kΩ. Additional steps in the VOS vs. VCM graphs are also visible as the input common-mode voltage approaches the power supply rails. These changes are a result of the load transistors (M8, M9, M14, and M15) running out of headroom. As the load transistors are forced into the triode region of operation, the mismatch of their V+ VB1 I1 M5 +IN x M3 R1 D1 –IN x M8 M9 M10 M11 M4 M16 D2 VB2 R2 M1 OUT x M2 M7 M6 M13 M14 M15 V– Figure 61. Simplified Schematic Rev. C | Page 17 of 24 09585-062 M17 M12 AD8546/AD8548 Data Sheet OUTPUT STAGE RESISTIVE LOAD The AD8546/AD8548 feature a complementary output stage consisting of the M16 and M17 transistors (see Figure 61). These transistors are configured in a Class AB topology and are biased by the voltage source, VB2. This topology allows the output voltage to go within millivolts of the supply rails, achieving a rail-to-rail output swing. The output voltage is limited by the output impedance of the transistors, which are low RON MOS devices. The output voltage swing is a function of the load current and can be estimated using the output voltage to supply rail vs. load current graphs (see Figure 15, Figure 16, Figure 18, and Figure 19). The feedback resistor alters the load resistance that an amplifier sees. Therefore, it is important to carefully select the value of the feedback resistors used with the AD8546/AD8548. The amplifiers are capable of driving resistive loads down to 100 kΩ. The Inverting Op Amp Configuration section and the Noninverting Op Amp Configuration section show how the feedback resistor changes the actual load resistance seen at the output of the amplifier. RAIL-TO-RAIL INPUT AND OUTPUT The AD8546/AD8548 feature rail-to-rail input and output with a supply voltage from 2.7 V to 18 V. Figure 62 shows the input and output waveforms of the AD8546/AD8548 configured as a unitygain buffer with a supply voltage of ±9 V and a resistive load of 1 MΩ. With an input voltage of ±9 V, the AD8546/AD8548 allow the output to swing very close to both rails. Additionally, the AD8546/AD8548 do not exhibit phase reversal. Inverting Op Amp Configuration Figure 63 shows the AD8546/AD8548 in an inverting configuration with a resistive load, RL, at the output. The actual load seen by the amplifier is the parallel combination of the feedback resistor, R2, and the load, RL. For example, the combination of a feedback resistor of 1 kΩ and a load of 1 MΩ results in an equivalent load resistance of 999 Ω at the output. Because the AD8546/AD8548 are incapable of driving such a heavy load, performance degrades greatly. To avoid loading the output, use a larger feedback resistor, but consider the effect of resistor thermal noise on the overall circuit. R2 VSY = ±9V RL = 1MΩ INPUT OUTPUT +VSY R1 AD8546/ AD8548 VOUT RL 09585-064 VOLTAGE (5V/DIV) VIN –VSY RL, EFF = RL || R2 Figure 63. Inverting Op Amp Configuration Figure 62. Rail-to-Rail Input and Output Figure 64 shows the AD8546/AD8548 in a noninverting configuration with a resistive load, RL, at the output. The actual load seen by the amplifier is the parallel combination of R1 + R2 and RL. R2 +VSY R1 AD8546/ AD8548 VIN –VSY RL, EFF = RL || (R1 + R2) VOUT RL 09585-065 TIME (200µs/DIV) 09585-063 Noninverting Op Amp Configuration Figure 64. Noninverting Op Amp Configuration Rev. C | Page 18 of 24 Data Sheet AD8546/AD8548 COMPARATOR OPERATION +VSY An op amp is designed to operate in a closed-loop configuration with feedback from its output to its inverting input. Figure 65 shows the AD8546 configured as a voltage follower with an input voltage that is always kept at the midpoint of the power supplies. The same configuration is applied to the unused channel. A1 and A2 indicate the placement of ammeters to measure supply current. ISY+ refers to the current flowing from the upper supply rail to the op amp, and ISY− refers to the current flowing from the op amp to the lower supply rail. ISY+ A1 100kΩ AD8546 VOUT 1/2 100kΩ ISY– +VSY 09585-068 A2 –VSY Figure 67. Comparator Configuration A A1 ISY+ +VSY 100kΩ AD8546 A1 VOUT 1/2 ISY+ 100kΩ 100kΩ A2 ISY– AD8546 VOUT 09585-066 1/2 –VSY 100kΩ A2 ISY– As expected, Figure 66 shows that in normal operating condition, the total current flowing into the op amp is equivalent to the total current flowing out of the op amp, where ISY+ = ISY− = 36 μA for the AD8546 at VSY = 18 V. 40 30 25 20 15 ISY– ISY+ 10 –VSY Figure 68. Comparator Configuration B The AD8546/AD8548 have input devices that are protected from large differential input voltages by Diode D1 and Diode D2 (see Figure 61). These diodes consist of substrate PNP bipolar transistors and turn on when the differential input voltage exceeds approximately 600 mV; however, these diodes also allow a current path from the input to the lower supply rail, resulting in an increase in the total supply current of the system. As shown in Figure 69, both configurations yield the same result. At 18 V of power supply, ISY+ remains at 36 μA per dual amplifier, but ISY− increases to 140 μA in magnitude per dual amplifier. 160 5 0 2 4 6 8 10 VSY (V) 12 14 16 18 09585-067 0 ISY PER DUAL AMPLIFIER (µA) 140 Figure 66. Supply Current vs. Supply Voltage (Voltage Follower) In contrast to op amps, comparators are designed to work in an open-loop configuration and to drive logic circuits. Although op amps are different from comparators, occasionally an unused section of a dual or quad op amp is used as a comparator to save board space and cost; however, this is not recommended. Figure 67 and Figure 68 show the AD8546 configured as a comparator, with 100 kΩ resistors in series with the input pins. The unused channel is configured as a buffer with the input voltage kept at the midpoint of the power supplies. 120 100 ISY– ISY+ 80 60 40 20 0 0 2 4 6 8 10 VSY (V) 12 14 16 18 09585-070 ISY PER DUAL AMPLIFIER (µA) 35 09585-069 Figure 65. Voltage Follower Configuration Figure 69. Supply Current vs. Supply Voltage (AD8546 as a Comparator) Rev. C | Page 19 of 24 AD8546/AD8548 Data Sheet EMI REJECTION RATIO Circuit performance is often adversely affected by high frequency electromagnetic interference (EMI). In the event where signal strength is low and transmission lines are long, an op amp must accurately amplify the input signals. However, all op amp pins— the noninverting input, inverting input, positive supply, negative supply, and output pins—are susceptible to EMI signals. These high frequency signals are coupled into an op amp by various means such as conduction, near field radiation, or far field radiation. For instance, wires and PCB traces can act as antennas and pick up high frequency EMI signals. Op amps, such as the AD8546 and AD8548, do not amplify EMI or RF signals because of their relatively low bandwidth. However, due to the nonlinearities of the input devices, op amps can rectify these out-of-band signals. When these high frequency signals are rectified, they appear as a dc offset at the output. To describe the ability of the AD8546/AD8548 to perform as intended in the presence of an electromagnetic energy, the electromagnetic interference rejection ratio (EMIRR) of the noninverting pin is specified in Table 2, Table 3, and Table 4 of the Specifications section. A mathematical method of measuring EMIRR is defined as follows: EMIRR = 20 log (VIN_PEAK/ΔVOS) VIN 0V TO 5V RSPAN 200kΩ 1% 1/2 C4 C5 0.1µF 10µF AD8546 Q1 VDD 18V R4 3.3kΩ R3 1.2kΩ D1 C1 390pF R2 2kΩ 1% 4mA TO 20mA RSENSE 100Ω 1% RL 100Ω NOTES 1. R1 + R2 = R´. Figure 71. 4 mA to 20 mA Current Loop Transmitter The transmitter is powered directly from the control loop power supply, and the current in the loop carries signal from 4 mA to 20 mA. Thus, 4 mA establishes the baseline current budget within which the circuit must operate. The AD8546 is an excellent choice due to its low supply current of 33 μA per amplifier over temperature and supply voltage. The current transmitter controls the current flowing in the loop, where a zero-scale input signal is represented by 4 mA of current and a full-scale input signal is represented by 20 mA. The transmitter also floats from the control loop power supply, VDD, whereas signal ground is in the receiver. The loop current is measured at the load resistor, RL, at the receiver side. With a zero-scale input, a current of VREF/RNULL flows through R. This creates a current, ISENSE, that flows through the sense resistor, as determined by the following equation: With a full-scale input voltage, current flowing through R is increased by the full-scale change in VIN/RSPAN. This creates an increase in the current flowing through the sense resistor. 100 EMIRR (dB) C2 C3 10µF 0.1µF VIN GND ISENSE, MIN = (VREF × R)/(RNULL × RSENSE) 120 ISENSE, DELTA = (Full-Scale Change in VIN × R)/(RSPAN × RSENSE) 80 Therefore, ISENSE, MAX = ISENSE, MIN + ISENSE, DELTA 60 When R >> RSENSE, the current through the load resistor at the receiver side is almost equivalent to ISENSE. VIN = 100mVPEAK VSY = 2.7V TO 18V 100M 1G 10G FREQUENCY (Hz) 09585-100 20 10M VOUT RNULL 1MΩ 1% R1 68kΩ 1% 140 40 ADR125 VREF 09585-072 Note that 100 kΩ resistors are used in series with the input of the op amp. If smaller resistor values are used, the supply current of the system increases much more. For more information about using op amps as comparators, see the AN-849 Application Note, Using Op Amps as Comparators. Figure 70. EMIRR vs. Frequency 4 mA TO 20 mA PROCESS CONTROL CURRENT LOOP TRANSMITTER A 2-wire current transmitter is often used in distributed control systems and process control applications to transmit analog signals between sensors and process controllers. Figure 71 shows a 4 mA to 20 mA current loop transmitter. Figure 71 shows a design for a full-scale input voltage of 5 V. At 0 V of input, the loop current is 3.5 mA, and at a full-scale input of 5 V, the loop current is 21 mA. This allows software calibration to fine-tune the current loop to the 4 mA to 20 mA range. Together, the AD8546 and the ADR125 consume quiescent current of only 160 µA, making 3.34 mA current available to power additional signal conditioning circuitry or to power a bridge circuit. Rev. C | Page 20 of 24 Data Sheet AD8546/AD8548 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 3.20 3.00 2.80 1 5.15 4.90 4.65 5 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 0.85 0.75 15° MAX 1.10 MAX 0.40 0.25 6° 0° 0.80 0.55 0.40 0.23 0.09 10-07-2009-B 0.15 0.05 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 72. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 8.75 (0.3445) 8.55 (0.3366) 8 14 1 7 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 6.20 (0.2441) 5.80 (0.2283) 0.50 (0.0197) 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 060606-A 4.00 (0.1575) 3.80 (0.1496) Figure 73. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model1 AD8546ARMZ AD8546ARMZ-RL AD8546ARMZ-R7 AD8548ARZ AD8548ARZ-RL AD8548ARZ-R7 1 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 14-Lead Standard Small Outline Package [SOIC_N] 14-Lead Standard Small Outline Package [SOIC_N] 14-Lead Standard Small Outline Package [SOIC_N] Z = RoHS Compliant Part. Rev. C | Page 21 of 24 Package Option RM-8 RM-8 RM-8 R-14 R-14 R-14 Branding A2V A2V A2V AD8546/AD8548 Data Sheet NOTES Rev. C | Page 22 of 24 Data Sheet AD8546/AD8548 NOTES Rev. C | Page 23 of 24 AD8546/AD8548 Data Sheet NOTES ©2011–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09585-0-9/12(C) Rev. C | Page 24 of 24