EClamp2410PQ

EClamp2410PQ
ESD Protection Device
for T-Flash/MicroSD Interfaces
PROTECTION PRODUCTS - EMIClamp®
Description
Features
The EClamp®2410PQ is a combination EMI filter and
line termination device with integrated TVS diodes for
use on Multimedia Card interfaces. This state-of-theart device utilizes solid-state silicon-avalanche technology for superior clamping performance and DC electrical characteristics. They have been optimized for
protection of T-Flash/MicroSD interfaces in cellular
phones and other portable electronics.
The device consists of six circuits that include series
impedance matching resistors and pull up resistors as
required by the SD specification. TVS diodes are
included on each line for ESD protection. An additional
TVS diode connection is included for protection of the
voltage (Vdd) bus. Termination resistor value of 45
Ohms is included on the DAT0, DAT1, DAT2, DAT3,
CMD, and CLK lines. Pull up resistors of 15k Ohms are
included on DAT0, DAT1, DAT2, and CMD lines while a
50k Ohm pull up is inlcuded on the DAT3 line. These
may be configured for devices operating in SD or SPI
mode . The TVS diodes provide effective suppression
of ESD voltages in excess of ±15kV (air discharge) and
±8kV (contact discharge) per IEC 61000-4-2, level 4.
The EClamp2410PQ is in a 16-pin, RoHS/WEEE compliant, SLP4016P16 package. It measures 4.0 x 1.6 x
0.58mm. The leads are spaced at a pitch of 0.5mm
and are finished with lead-free NiPdAu. The
EClamp2410PQ is qualified to AEC-Q100 Grade1 for
Automotive use.
‹ Bidirectional EMI/RFI filtering and line termination
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with integrated ESD protection
ESD protection to IEC 61000-4-2 (ESD) Level 4,
±15kV (air), ±8kV (contact)
TVS working voltage: 5V
Termination Resistors: 45Ω
Pull Up Resistors: 15kΩ (3 each) and 50kΩ
Typical Capacitance per Line: 12pF (VR = 2.5V)
Protection and termination for six lines + Vdd
Solid-state technology
AEC-Q100 Grade1 Qualified
Mechanical Characteristics
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SLP4016P16 16-pin package
RoHS/WEEE Compliant
Nominal Dimensions: 4.0 x 1.6 x 0.58 mm
Lead Pitch: 0.5mm
Lead finish: NiPdAu
Marking: Marking Code
Packaging: Tape and Reel
Applications
‹
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Pin Configuration
T-Flash / MicroSD Interfaces
MMC Interfaces
CDMA, GSM, 3G Cell Phones
Automotive Applications
Package Configuration
4.00
DAT1 In
DAT0 In
CLK In
1
16
DAT1 Out
1 2
DAT0 Out
CLK Out
Rup1
Rup3
Vdd
Rup2
CMD In
CMD Out
DAT3 In
DAT3 Out
DAT2 In
DAT2 Out
1.60
0.50 BSC
0.58
16 Pin SLP package (Bottom Side View)
Nominal Dimensions in mm
Pin Designation (Top View)
7/24/2012
1
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EClamp2410PQ
PROTECTION PRODUCTS
Absolute
Maximum
Rating
Absolute
Maximum
Ratings
R ating
Symbol
Value
Units
VESD
+/- 17
+/- 12
kV
Junction Temp erature
TJ
125
o
Ambient Op erating Temp erature
TA
-40 to +125
o
Storage Temp erature
TSTG
-55 to +150
o
ESD p er IEC 61000-4-2 (Air)
ESD p er IEC 61000-4-2 (Contact)
C
C
C
Electrical Characteristics (T=25OC unless otherwise specified)
P ar am et er
T VS Reverse Stand-Off Voltage
T VS Reverse Breakdown Voltage
S y m b ol
Con d i t i on s
Min.
Ty p .
VRWM
V BR
T VS Reverse Leakage Current
IR
Series Resistors
R
It = 1mA
VRWM = 3.0V
TA = 25OC
6
TA = 125OC
6
8
M ax .
Units
5
V
10
10
TA = 25OC
0.5
TA = 125OC
100
Each Line
V
µA
38
45
52
Ohm
DAT Pull Up Resistor 1
Rup 1
12
15
17
kOhm
DAT Pull Up Resistor 2
Rup 2
42
50
58
kOhm
10
12
15
15
20
Total Capacitance
© 2012 Semtech Corp.
Cin
Input to Gnd,
Each Line
VR = 2.5V, f = 1MHz
2
TA = 25OC
TA = 125OC
pF
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EClamp2410PQ
PROTECTION PRODUCTS
Pin Identification and Configuration
Pin
Symbol
Identification
1, 16
DAT1
Data line #1 input/output with pull-up resistor
2, 15
DAT0
Data line #0 Input/Output
3, 14
Clock
Clock line Input/Output
4
Ru p 1
15K Pull-up resistor from DAT1 & DAT2
5
Vdd
Power Supply ESD Protection
6, 11
CMD
Command Line Input/Output
7, 10
DAT3
Data line #3 input/output with pull-up resistor
8, 9
DAT2
Data line #2 input/output with pull-up resistor
12
Ru p 2
50K Pull-Up Resistor from DAT3
13
Ru p 3
VCC Circuit 3A
Center tab
GN D
Ground connection
16 15 14 13 12 11 10 9
1
2 3 4 5 6 7
8
Schematics and Component Values
Pin 4
Pin 1, 8
45Ohm
Pin 12
Rup
50kOhm
Rup
15kOhm
Pin 16, 9
Pin 7
DAT1, DAT2
45Ohm
Pin 10
DAT3
Pin 13
Rup
15kOhm
Pin 5
Pin 3
45Ohm
CLK
© 2012 Semtech Corp.
Pin 14
Pin 2, 6
VDD
3
45Ohm
Pin 11, 15
DAT0, CMD
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EClamp2410PQ
PROTECTION PRODUCTS
Typical Characteristics
Series Resistance vs. Temperature
Pull Up Resistance (Rup1) vs. Temperature
15.5
47
I = 100uA
I = 1mA
RUP1 (kOhm)
15.4
RS (Ohm)
46
15.3
15.2
45
15.1
5369.1R2 RUP1vT
15.0
5369.1R2 RSvT
44
-50
-50
0
50
Temperature (OC)
100
0
50
100
150
Temperature (OC)
150
Capacitance vs. Temperature
Pull Up Resistance (Rup2) vs. Temperature
14.2
56
VR = 2.5V
Any Line to GND
I = 100uA
Capacitance (pF)
RUP2 (kOhm)
54
52
50
14.0
13.8
48
5369.1R2 RP2vT
5369.1R2 CvT
46
13.6
-50
0
50
Temperature (OC)
100
150
-50
50
Temperature (OC)
100
150
Reverse Leakage Current vs. Temperature
Reverse Breakdown Voltage vs. Temperature
8.0
25
IZ = 1mA
VR = 3.3V
Any Line to GND
7.8
20
Leakage Current (nA)
VZ (V)
0
7.6
7.4
7.2
15
10
5
5369.1R2 IRvT
5369.1R2 VZvT
0
7.0
-50
0
© 2012 Semtech Corp.
50
IZ (mA)
100
-50
150
4
0
50
Temperature (OC)
100
150
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EClamp2410PQ
PROTECTION PRODUCTS
Typical Characteristics
Positive ESD Clamping
(8kV Contact per IEC 61000-4-2)
Negative ESD Clamping
(8kV Contact per IEC 61000-4-2)
60
100
TA = 25OC
Corrected for 40dB attenuation
Measured with 50Ω, 40dB attenuation
50Ω Scope Input Impedance
O
TA = 25 C
Corrected for 40dB attenuation
Measured with 50Ω, 40dB attenuation
50Ω Scope Input Impedance
40
Clamping Voltage (V)
Clamping Voltage (V)
80
60
40
20
0
-20
20
0
-20
-40
-60
5369.1R2 P8KV
5369.1R2 N8KV
-40
-80
-20
0
20
40
Time (ns)
60
80
100
-20
0
Positive TLP Plot
40
Time (ns)
60
80
100
Negative TLP Plot
0
30
O
TA = 25 C
TLP Parameters:
tp = 100ns; tr = 200ps.
TLP Current (A)
TA = 25OC
TLP Parameters:
tp = 100ns; tr = 200ps.
TLP Current (A)
20
20
10
-10
-20
5369.1R2 TLP5369.1R2 TLP+
-30
0
0
5
10
15
TLP Voltage (V)
20
-10
25
-8
-6
-4
TLP Voltage (V)
-2
0
Insertion Loss S21 (Each Line)
0
Insertion Loss (dB)
-10
-20
-30
TA = 25OC
In to Out e.g Pins 3-14 etc.
50Ω System.
5369.1R2 IL
-40
100.0E+3
1.0E+6
© 2012 Semtech Corp.
10.0E+6
100.0E+6
Frequency (Hz)
1.0E+9
10.0E+9
5
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EClamp2410PQ
PROTECTION PRODUCTS
Applications Information
Device Connection
Figure 1 - Pin Identification and Configuration
(Top Side View)
The EClamp2410PQ is a microSD/T-Flash interface
device designed for use in cell phones and other
portable electronic devices. The EClamp2410PQ is
comprised of series and pull up resistors required on
the microSD interface. Each line also includes TVS
diodes for ESD protection. The device may be configured for SD or SPI mode operation. In SD mode for
example, the 15k Ohm pull up resistors (Rup 1 and
Rup 3) are connected to VDD. In SPI mode pin 4 is
not connected (Rup 1) since these are reserved lines.
The 50k Ohm pull up resistor is used for card detection or SPI mode selection during power up and is
disconnected by the user during regular data transfer.
The EClamp2410PQ is in a 16-pin SLP package. Electrical connection is made to the 16 pins located at the
bottom of the device. The device has a flow through
design for easy layout. Pin connections are noted in
Figure 1. A center tab serves as the ground connection. Recommendations for the ground connection are
given below.
Ground Connection Recommendation
Parasitic inductance present in the board layout will
affect the filtering and ESD performance of the device.
Ground loop inductance can be reduced by using
multiple vias to make the connection to the ground
plane. Figure 2 shows the recommended device
layout. The ground pad vias have a diameter of 0.008
inches (0.20 mm) while the two external vias have a
diameter of 0.010 inches (0.250mm). The internal
vias are spaced approximately evenly from the center
of the pad. The designer may choose to use more vias
with a smaller diameter (such as 0.005 inches or
0.125mm) since changing the diameter of the via will
result in little change in inductance.
DAT 1 In
DAT 0 In
CLK In
16
DAT 1 Out
DAT 0 Out
CLK Out
RUP1
RUP3
Vdd
RUP2
CMD In
CMD Out
DAT 3 In
DAT 3 Out
DAT 2 In
DAT 2 Out
Figure 2 - Recommended Layout using Ground Vias
Layout Guidelines for Optimum ESD Protection
2: The ESD transient return path to ground should be
kept as short as possible. Whenever possible, use
multiple micro vias connected directly from the
device ground pad to the ground plane.
3: Avoid running critical signals near board edges.
Good circuit board layout is critical not only for signal
integrity, but also for effective suppression of ESD
induced transients. For optimum ESD protection, the
following guidelines are recommended:
1: Place the device as close to the connector as
possible. This practice restricts ESD coupling into
adjacent traces and reduces parasitic inductance.
© 2012 Semtech Corp.
1
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EClamp2410PQ
PROTECTION PRODUCTS
Applications
Information
Applications
Information
1
16
MicroSD Connector
DAT 0 In
DAT 1 Out
DAT 0 Out
CLK In
CLK Out
RUP1
RUP3
Vdd
RUP2
CMD In
CMD Out
DAT 3 In
DAT 3 Out
DAT 2 In
DAT 2 Out
HOST IC
DAT 1 In
EClamp2410PQ
Figure 3 - MicroSD Protection
© 2012 Semtech Corp.
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EClamp2410PQ
PROTECTION PRODUCTS
Applications Information - Spice Model
Pin 12
Pin 4, 13
Rup
50K
Rup
15K
Pin 1, 8, 2, 6
45 Ohms
D1
Pin 7
Pin 9, 16, 11, 15
45 Ohms
Pin 10
D1
D1
D1
DAT3
DAT1, DAT2, DAT0, CMD
Pin 5
Pin 3
45 Ohms
Pin 14
D1
D1
D1
CLK
Vdd
EClamp2410PQ Spice Model
EClamp2410PQ Spice Parameters
© 2012 Semtech Corp.
Parameter
Unit
D1 (T VS)
IS
Amp
2E-15
BV
Volt
7.46
VJ
Volt
0.777
RS
Ohm
1.00
IB V
Amp
1E-3
CJO
Farad
10E-12
TT
sec
2.541E-9
M
--
0.246
N
--
1.1
EG
eV
1.11
8
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EClamp2410PQ
PROTECTION PRODUCTS
Outline Drawing - SLP4016P16
A
B
D
DIM
E
PIN 1
INDICATOR
(LASER MARK)
A
SEATING
PLANE
aaa C
A2
C
A1
D1
A
A1
A2
b
D
D1
E
E1
e
L
N
aaa
bbb
DIMENSIONS
INCHES
MILLIMETERS
MIN NOM MAX MIN NOM MAX
.020 .023 .026 0.50 0.58 0.65
.000 .001 .002 0.00 .003 0.05
(.005)
(0.13)
.007 .010 .012 0.20 0.25 0.30
.153 .157 .161 3.90 4.00 4.10
.122 .126 .130 3.10 3.20 3.30
.059 .063 .067 1.50 1.60 1.70
.010 .016 .020 0.25 0.40 0.50
.020 BSC
0.50 BSC
.011 .013 .015 0.28 0.33 0.38
16
16
.003
0.08
.004
0.10
1 2
LxN
E/2
E1
N
bxN
e
bbb
C A B
D/2
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.
Land Pattern - SLP4016P16
P
X
Z
F
G
Y
(C)
DIM
B
C
F
G
P
X
Y
Z
DIMENSIONS
INCHES
MILLIMETERS
.130
3.30
.060
1.52
.018
0.45
.035
0.89
.020
0.50
0.30
.012
0.63
.025
.085
2.15
B
NOTES:
1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
© 2012 Semtech Corp.
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EClamp2410PQ
PROTECTION PRODUCTS
Marking
Ordering Information
Pin 1 Indicator
Laser Mark
2410
YX = Coded
Date Code
YX
Part Number
Qty per
Reel
R eel Size
EClamp 2410PQTCT
3000
7 Inch
EMIClamp and EClamp are marks of Semtech Corporation
Tape and Reel Specification
Pin 1 Location
User Direction of feed
Device Orientation in Tape
A0
1.78 +/-0.10 mm
B0
K0
4.30 +/-0.10 mm
0.74 +/-0.10 mm
Tape
Width
B, (Max)
D
D1
12 mm
8.2 mm
(.476)
1.5 + 0.1 mm
- 0.0 mm
(0.59 +.005
- .000)
1.0 mm
±0.05
(.039)
E
1.750±.10
mm
(.069±.004)
F
K
(MAX)
P
P0
P2
T(MAX)
W
5.5±0.05
mm
(.217±.002)
4.5 mm
(.177)
4.0±0.1
mm
(.157±.004)
4.0±0.1
mm
(.157±.004)
2.0±0.05mm
(.079±.002)
0.4 mm
(.016)
12.0 mm
+ 0.3 mm
- 0.1 mm
(.472±.012)
Contact Information
Semtech Corporation
Protection Products Division
200 Flynn Rd., Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
© 2012 Semtech Corp.
10
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