79LV2040B 20 Megabit (512K x 40-Bit) Low Low Voltage EEPROM MCM Logic Diagram DESCRIPTION: • 512k x 40-bit EEPROM MCM • RAD-PAK® radiation-hardened against natural space radiation • Total dose hardness: - >100 krad (Si) - Dependent upon orbit • Excellent Single event effects @ 25°C - SEL > 120 MeV cm2/mg (Device) - SEU > 85 MeV cm2/mg(Memory Cells) - SEU > 18 MeV cm2/mg (Write Mode) - SET > 40 MeV cm2/mg (Read Mode) • High endurance - 10,000 cycles (Page Programming Mode) - 10 year data retention • Page Write Mode: 128 Dword Page • High Speed: - 200 and 250 ns maximum access times • Automatic programming - 15 ms automatic Page/Dword write • Low power dissipation - 100 mW/MHz active current - 1.5 mW standby current Maxwell Technologies’ 79LV2040B multi-chip module (MCM) memory features a greater than 100 krad (Si) total dose tolerance, dependent upon orbit. Using Maxwell Technologies’ patented radiation-hardened RAD-PAK® MCM packaging technology, the 79LV2040B is the first radiation-hardened 20 megabit MCM EEPROM for space applications. The 79LV2040B uses twenty 1 Megabit high speed CMOS EEPROM die to yield a 20 megabit product. The 79LV2040B is capable of in-system electrical byte and page programmability. It has a 128 x 40 page programming function to make the erase and write operations faster. It also features Data Polling and a Ready/Busy signal to indicate the completion of erase and programming operations. In the 79LV2040B, hardware data protection is provided with the RES pin, in addition to noise protection on the WE signal and write inhibit on power on and off. Software data protection is implemented using the JEDEC optional standard algorithm. Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK® provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Maxwell Technologies’ self-defined Class K 04.01.14 Rev 1 (858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com All data sheets are subject to change without notice 1 ©2014 Maxwell Technologies All rights reserved. Memory FEATURES: 79LV2040B 20 Megabit (512K x 40-Bit) EEPROM MCM PINOUT DESCRIPTION 1, 11, 21, 30, 40, 50, 51, 61, 71, 80, 90, 100 VSS - Ground 2, 12, 22, 29, 39, 49, 52, 62, 72, 79, 89, 99 VCC - Positive Supply 60 - 53, 41 - 48, 10 3, 91 - 98, 88 - 81 D0 to D39 23 - 28, 31, 32, 78 -73, 70 - 68 CS0\ - CS3\ Chip Enable A0 to A16 Address Inputs 33 RES\ - Reset 34 - 38 WE\0 - WE\4 66 - 63 RBSY\0 - RBSY\3 Ready/Busy 67 04.01.14 Rev 1 Memory 13, 14, 15, 16 Data I/O Write Enables OE\ - Output Enable All data sheets are subject to change without notice 2 ©2014 Maxwell Technologies All rights reserved 79LV2040B 20 Megabit (512K x 40-Bit) EEPROM MCM TABLE 1. 79LV2040B ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL MIN Supply Voltage VCC Input Voltage VIN Package Weight RP TYP MAX UNIT -0.6 7.0 V -0.51 7.0 V -- Grams Operating Temperature Range TOPR -55 125 °C Storage Temperature Range TSTG -65 150 °C 1. VIN min = -3.0V for pulse width <50ns. TABLE 2. 79LV2040B RECOMMENDED DC OPERATING CONDITIONS PARAMETER MIN MAX UNIT Supply Voltage VCC 3.0 3.6 V Input Voltage VIL VIH VH -0.31 2.2 VCC-0.5 0.8 VCC +0.3 VCC +1 V V V TOPR -55 125 °C RES_PIN Operating Temperature Range Memory SYMBOL 1. VIL min = -1.0V for pulse width < 50 ns TABLE 3. 79LV2040B DELTA LIMITS1 PARAMETER VARIATION ICC1A +/- 10 % Specified in Table 5 ICC1B +/- 10 % Specified in Table 5 ICC2A +/- 10 % Specified in Table 5 ILI - ADDR, CE, OE, WE +/- 10 % Specified in Table 5 ILI - D0-D39 +/- 10 % Specified in Table 5 1. Parameters are measured and recorded as Deltas per MIL-STD-883 for Class K Devices. 04.01.14 Rev 1 All data sheets are subject to change without notice 3 ©2014 Maxwell Technologies All rights reserved 79LV2040B 20 Megabit (512K x 40-Bit) EEPROM MCM TABLE 4. 79LV2040B CAPACITANCE (TA = 25 °C, f = 1 MHz) PARAMETER SYMBOL Input Capacitance : VIN = 0V1 Output Capacitance: VOUT = 0V1 MIN MAX UNIT CIN OE 6 pF CIN WE 6 CIN CE0-30 30 CIN A0-A16 6 CIN RES 120 COut RDY/BSY 60 CO ut D0-D39 -- pF 48 1. Guaranteed by design. TABLE 5. 79LV2040B DC ELECTRICAL CHARACTERISTICS (VCC = 3.3V ±10%, TA = -55 TO +125°C) TEST CONDITION SYMBOL SUBGROUPS MIN MAX UNITS Input Leakage Current A0-A16,WE, OE VIN = VCC & 0V ILI 1, 2, 3 -- 2 µA Input Leakage Current CE VIN = VCC & 0V 10 uA Input Leakage Current D0-D39 VIN = VCC & 0V ILI 1, 2, 3 10 µA Output Leakage Current (VCC = 3.6V, VOUT = 3.6V/0.4V) ILO 1, 2, 3 -- 8 µA Standby VCC Current CE = ADDR=WE=OE =VCC ICC1A 1, 2, 3 -- 640 µA CE = VIH; ADDR=WE=OE =VCC ICC1B 21 mA OE = 0V ADDR=WE=VCC IOUT = 0mA, CE Duty = 100%, Cycle = 1 us at VCC = 3.6V ICC2A 1, 2, 3 30 mA OE =ADDR=WE=0V IOUT = 0mA, CE Duty = 100%, Cycle = 150 ns at VCC =3.6V ICC2D 1, 2, 3 75 mA VIL VIH 1, 2, 3 0.8 V 0.4 --- V V V Operating VCC Current, Input Voltage Output Voltage 2.2 VCC -0.5 VH RES_PIN Data Lines: VCCMin, IOL= 2.1mA Data Lines: VCC Min, IOH = -400µA All Outputs: VCCMin , IOH = -100uA VOL VOH VOH Memory PARAMETER 1, 2, 3 -2.4 VCC - 0.3V 1) For RES IIL=2000uA max. 2) Only one Chip Enable Active (Logic Low) at a time. 3) RDY/BSY is an open drain output. Only VOL applies to this pin. 04.01.14 Rev 1 All data sheets are subject to change without notice 4 ©2014 Maxwell Technologies All rights reserved 79LV2040B 20 Megabit (512K x 40-Bit) EEPROM MCM TABLE 6. 79LV2040B AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION 1 (VCC =3.3V ±10%, TA = -55 TO +125°C) PARAMETER SYMBOL SUBGROUPS Address Access Time CE = OE = VIL, WE = VIH -200 -250 tACC 9, 10, 11 Chip Enable Access Time OE = VIL, WE = VIH -200 -250 tCE 9, 10, 11 Output Enable Access TIme CE = VIL, WE = VIH -200 -250 tOE 9, 10, 11 Output Hold to Address Change CE = OE =VIL, WE = VIH -200 -250 tOH 9, 10, 11 MIN MAX --- 200 250 --- 200 250 0 0 110 120 0 0 --- 0 0 50 50 0 0 300 350 0 0 525 600 UNIT ns ns ns ns 9, 10, 11 ns tDF ns tDFR RES to Output Delay CE = OE = VIL, WE = VIH3 -200 -250 tRR Memory Output Disable to High-Z 2 CE = VIL, WE = VIH -200 -250 CE = OE = VIL, WE = VIH -200 -250 9, 10, 11 ns 1. Test conditions: input pulse levels = 0.4V to 2.4V; input rise and fall times < 20 ns; output load = 1 TTL gate + 100 pF (including scope and jig); reference levels for measuring timing = 0.8 V/1.8 V. 2. tDF and tDFR are defined as the time at which the output becomes an open circuit and data is no longer driven. 3. Guaranteed by design. TABLE 7. 79LV2040B AC ELECTRICAL CHARACTERISTICS FOR WRITE OPERATION (VCC = 3.3V ±10%, TA = -55 TO +125°C) PARAMETER SYMBOL SUBGROUPS Address Setup Time -150 -200 tAS 9, 10, 11 Chip Enable to Write Setup Time (WE controlled) -150 -200 tCS 9, 10, 11 04.01.14 Rev 1 MIN 1 MAX 0 0 --- 0 0 --- UNITS ns ns All data sheets are subject to change without notice 5 ©2014 Maxwell Technologies All rights reserved 79LV2040B 20 Megabit (512K x 40-Bit) EEPROM MCM TABLE 7. 79LV2040B AC ELECTRICAL CHARACTERISTICS FOR WRITE OPERATION (VCC = 3.3V ±10%, TA = -55 TO +125°C) PARAMETER Write Pulse Width CE controlled -200 -250 WE controlled -200 -250 SYMBOL SUBGROUPS MIN 1 MAX 200 250 --- 200 250 --- 125 125 --- 100 150 --- 10 10 --- 0 0 --- 0 0 --- 0 0 --- 0 0 --- 0 0 --- --- 15 15 700 750 --- 100 100 --- 1 1 30 30 UNITS 9, 10, 11 ns tCW ns tWP tAH 9, 10, 11 Data Setup Time -200 -250 tDS 9, 10, 11 Data Hold Time -200 -250 tDH 9, 10, 11 Chip Enable Hold Time (WE controlled) -200 -250 tCH 9, 10, 11 Write Enable to Write Setup Time (CE controlled) -200 -250 tWS 9, 10, 11 Write Enable Hold Time (CE controlled) -200 -250 tWH 9, 10, 11 Output Enable to Write Setup Time -200 -250 tOES 9, 10, 11 Output Enable Hold Time -200 -250 tOEH 9, 10, 11 Write Cycle Time 2 -200 -250 tWC 9, 10, 11 Data Latch Time -200 -250 tDL 9, 10, 11 Byte Load Window -200 -250 tBL 9, 10, 11 Byte Load Cycle -200 -250 tBLC 9, 10, 11 04.01.14 Rev 1 ns ns ns Memory Address Hold Time -200 -250 ns ns ns ns ns ms ns µs µs All data sheets are subject to change without notice 6 ©2014 Maxwell Technologies All rights reserved 79LV2040B 20 Megabit (512K x 40-Bit) EEPROM MCM TABLE 7. 79LV2040B AC ELECTRICAL CHARACTERISTICS FOR WRITE OPERATION (VCC = 3.3V ±10%, TA = -55 TO +125°C) PARAMETER SYMBOL SUBGROUPS Time to Device Busy -200 -250 tDB 9, 10, 11 Write Start Time 3 -200 -250 tDW 9, 10, 11 RES to Write Setup Time -200 -250 tRP 9, 10, 11 VCC to RES Setup Time4 -200 -250 tRES 9, 10, 11 MIN 1 MAX 100 120 --- 150 250 --- 100 100 --- 1 1 --- UNITS ns ns µs µs 1. Use this device in a longer cycle than this value. 3. Next read or write operation can be initiated after tDW if polling techniques or RDY/BUSY are used. 4. Guaranteed by design. TABLE 8. 79LV2040B MODE SELECTION 1 PARAMETER CE 2 OE WE I/O RES RDY/BUSY Read VIL VIL VIH DOUT VH High-Z Standby VIH X X High-Z X High-Z Write VIL VIH VIL DIN VH High-Z --> VOL Deselect VIL VIH VIH High-Z VH High-Z Write Inhibit X X VIH -- X -- X VIL X -- X -- VIL VIL VIH Data Out3 VH VOL Program Reset X X 1. Refer to the recommended DC operating conditions. X High-Z VL High-Z Data Polling 2. For CE0-3 only one CE can be used (“on”) at a time. 3. Bits 7, 15, 23, 31 and 39 04.01.14 Rev 1 All data sheets are subject to change without notice 7 ©2014 Maxwell Technologies All rights reserved Memory 2. tWC must be longer than this value unless polling techniques or RDY/BUSY are used. This device automatically completes the internal write operation within this value. 20 Megabit (512K x 40-Bit) EEPROM MCM 79LV2040B FIGURE 1. READ TIMING WAVEFORM Memory FIGURE 2. BYTE WRITE TIMING WAVEFORM (1) (WE CONTROLLED) 04.01.14 Rev 1 All data sheets are subject to change without notice 8 ©2014 Maxwell Technologies All rights reserved 20 Megabit (512K x 40-Bit) EEPROM MCM 79LV2040B FIGURE 3. BYTE WRITE TIMING WAVEFORM (2) (CE CONTROLLED) Memory FIGURE 4. PAGE WRITE TIMING WAVEFORM (1) (WE CONTROLLED) 1) A7-A16 are Page Addresses and must be the same within a Page Write Operation. 04.01.14 Rev 1 All data sheets are subject to change without notice 9 ©2014 Maxwell Technologies All rights reserved 20 Megabit (512K x 40-Bit) EEPROM MCM 79LV2040B FIGURE 5. PAGE WRITE TIMING WAVEFORM (2) (CE CONTROLLED) 1 Memory 1) A7-A16 are Page Addresses and must be the same within a Page Write Operation. FIGURE 6. DATA POLLING TIMING WAVEFORM I/O1 1) BITS 7, 15, 23, 31 AND 39 04.01.14 Rev 1 All data sheets are subject to change without notice 10 ©2014 Maxwell Technologies All rights reserved 20 Megabit (512K x 40-Bit) EEPROM MCM 79LV2040B FIGURE 7. SOFTWARE DATA PROTECTION TIMING WAVEFORM (1) (IN PROTECTION MODE) FIGURE 8. SOFTWARE DATA PROTECTION WAVEFORM (2) (IN NON-PROTECTION MODE) Memory EEPROM APPLICATION NOTES This application note describes the programming procedures for the EEPROM modules and with details of various techniques to preserve data integrity. Automatic Page Write Page-mode write feature allows 1 to 128 bytes of data to be written into the EEPROM in a single write cycle. Loading the first byte of data, the data load window opens 30µs for the second byte. In the same manner each additional byte of data can be loaded within 30µs of the preceding falling edge of either WE or CE. When CE and WE are kept high for 100µs after data input, the EEPROM enters the write mode automatically and the data input is written into the EEPROM. WE, CE Pin Operation During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of WE or CE. 04.01.14 Rev 1 All data sheets are subject to change without notice 11 ©2014 Maxwell Technologies All rights reserved 20 Megabit (512K x 40-Bit) EEPROM MCM 79LV2040B Data Polling Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a write cycle, an inversion of the last byte of data to be loaded outputs from I/O 7 to indicate that the EEPROM is performing a write operation. RDY/Busy Signal RDY/Busy signal also allows a comparison operation to determine the status of the EEPROM. The RDY/Busy signal goes low (VOL) after the first write signal. At the end of the write cycle, the RDY/Busy returns to a high state ( VOH). RES Signal When RES is LOW (VL), the EEPROM cannot be read or programmed. The EEPROM data must be protected by keeping RES low when VCC is power on and off. RES should be high (VH) during read and programming operations. Memory Data Protection To protect the data during operation and power on/off, the EEPROM has the internal functions described below. 1. Data Protection against Noise of Control Pins (CE, OE, WE) during Operation. During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its width is 20ns or less in programming mode. Be careful not to allow noise of a width more than 20ns on the control pins. 04.01.14 Rev 1 All data sheets are subject to change without notice 12 ©2014 Maxwell Technologies All rights reserved 79LV2040B 20 Megabit (512K x 40-Bit) EEPROM MCM 2. Data Protection at VCC on/off When VCC is turned on or off, noise on the control pins generated by external circuits, such as CPUs, may turn the EEPROM to programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in unprogrammable state during VCC on/off by using a CPU reset signal to RES pin. 3. RES Signal RES should be kept at VSS level when VCC is turned on or off. The EEPROM breaks off programming operation when RES become low, programming operation doesn’t finish correctly in case that RES falls low during programming operation. RES should be kept high for 10 ms after the last data is input . Memory 15ms 4. Software Data Protection Enable The 79LV2040A contains a software controlled write protection feature that allows the user to inhibit all write operations to the device. This is useful in protecting the device from unwanted write cycles due to uncontrollable circuit noise or inadvertent writes caused by minor bus contentions. Software data protection is enabled by writing the following data sequence to the EEPROM and allowing the write cycle period (tWC) of 15ms to elapse: . Software Data Protection Enable Sequence Address Data 5555 AAAA or 2AAA AA AA AA AA AA 55 55 55 55 55 5555 A0 A0 A0 A0 A0 04.01.14 Rev 1 All data sheets are subject to change without notice 13 ©2014 Maxwell Technologies All rights reserved 79LV2040B 20 Megabit (512K x 40-Bit) EEPROM MCM 5. Writing to the Memory with Software Data Protection Enabled To write to the device once Software protection is enabled, the enable sequence must precede the data to be written. This sequence allows the write to occur while at the same time keeping the software protection enabled Sequence for Writing Data with Software Protection Enabled. Address Data 5555 AAAA or 2AAA AA AA AA AA AA 55 55 55 55 55 5555 A0 A0 A0 A0 A0 Normal Data Input Write Address(s) Software data protection mode can be disabled by inputting the following 6 bytes sequence. Once the software protection sequence has been written, no data can be written to the memory until the write cycle (TWC) has elapsed. Software Protection Disable Sequence Address Data 5555 AA AA AA AA AA AAAA or 2AAA 55 55 55 55 55 5555 80 80 80 80 80 5555 AA AA AA AA AA AAAA or 2AAA 55 55 55 55 55 5555 20 20 20 20 20 Devices are shipped in the “unprotected” state, meaning that the contents of the memory can be changed as required by the user. After the software data protection is enabled, the device enters the Protect Mode where no further write commands have any effect on the memory contents. 04.01.14 Rev 1 All data sheets are subject to change without notice 14 ©2014 Maxwell Technologies All rights reserved Memory 6. Disabling Software Protection 20 Megabit (512K x 40-Bit) EEPROM MCM 79LV2040B Memory 100 Pin Rad-Tolerant Flat Pack SYMBLOL DIMENSIONS MIN NOM MAX A 0.381 0.400 0.419 b 0.006 0.008 0.010 c 0.005 0.006 0.007 D 1.351 1.366 1.381 e 0.025 BSC E 0.887 0.897 0.907 L 0.390 0.400 0.410 Q 0.132 0.139 0.147 S 0.055 0.075 0.095 A 0.381 0.400 0.419 b 0.006 0.008 0.010 Note: All dimensions in inches. Top and Bottom of the package is internally connected to ground. 04.01.14 Rev 1 All data sheets are subject to change without notice 15 ©2014 Maxwell Technologies All rights reserved 20 Megabit (512K x 40-Bit) EEPROM MCM 79LV2040B Important Notice: These data sheets are created using the chip manufacturers published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information. Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts. Memory 04.01.14 Rev 1 All data sheets are subject to change without notice 16 ©2014 Maxwell Technologies All rights reserved 79LV2040B 20 Megabit (512K x 40-Bit) EEPROM MCM Product Ordering Options Model Number 79LV2040B XX Q Features X Option Details -XX Access Time 20 = 200 ns 25 = 250 ns Screening Flow Multi Chip Module (MCM)1 K = Maxwell Self-Defined Class K H = Maxwell Self-Defined Class H I = Industrial (Testing @-55C, +25C , +125C) Package Q = Quad Flat Pack Radiation Features2 RP = Rad-Pak® Package RT = No Radiation Guarentee Class E and I only RT1 = 10 krad (Read/Write) RT2R = 25 krad (Read); 15 krad (Write) RT4R = 40 krad (Read); 25 krad (Write) RT6R = 60 krad (Read), 25 krad (Write) Base Product Nomenclature 20 Megabyte (512K x 40-Bit) EEPROM 1) Products are manufacturered and screened to Maxwell Technologies’ self-defined Class H and Class K. 2) The device will meet the specified read mode TID level, at the die level, if it is not written to during irradiation. Writing to the device during irradiation will reduce the device’s TID tolerance to the specified write mode TID level. Writing to the device before irradiation does not alter the device’s read mode TID level. 04.01.14 Rev 1 All data sheets are subject to change without notice 17 ©2014 Maxwell Technologies All rights reserved Memory E = Engineering (Testing @ +25C)