Standard Products UT54ACS132/UT54ACTS132 Quadruple 2-Input NAND Schmitt Triggers Datasheet November 2010 www.aeroflex.com/logic FEATURES 1.2μ CMOS (ACTS 132) and 0.6μ CRH CMOS process (ACS132) - Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 14-pin DIP (not available for the ACS132) - 14-lead flatpack UT54ACS132 - SMD 5962-96542 UT54ACTS132 - SMD 5962-96543 PINOUTS 14-Pin DIP Top View A1 1 14 VDD B1 2 13 B4 Y1 3 12 A4 A2 B2 4 11 5 10 Y4 B3 Y2 VSS 6 9 7 8 14-Lead Flatpack Top View DESCRIPTION The UT54ACS132 and the UT54ACTS132 are 2-input NAND gates with Schmitt Trigger input levels. A high applied on both the inputs forces the output to a low state. A1 B1 Y1 The devices are characterized over full military temperature range of -55°C to +125°C. A2 B2 FUNCTION TABLE Y2 INPUTS VSS OUTPUT An Bn Yn L L H L H H H L H H H L A1 B1 B2 LOGIC SYMBOL A1 B1 A2 B2 A3 B3 A4 B4 (2) (9) & (3) (6) (8) (10) (12) (13) 14 2 13 3 12 4 11 5 10 Y4 B3 6 9 A3 7 8 VDD B4 A4 Y3 Y1 Y2 A3 B3 Y1 (11) Y3 A4 (4) (5) 1 LOGIC DIAGRAM A2 (1) A3 Y3 B4 Y2 Y3 Y4 Note: 1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC Publication 617-12. 1 Y4 OPERATIONAL ENVIRONMENT1 PARAMETER LIMIT UNITS Total Dose 1.0E6 (ACTS132) 5.0E5 (ACS132) rads(Si) SEU Threshold 2 80 MeV-cm2/mg SEL Threshold 120 MeV-cm2/mg Neutron Fluence 1.0E14 n/cm2 Notes: 1. Logic will not latchup during radiation exposure within the limits defined in the table. 2. Device storage elements are immune to SEU affects. ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER LIMIT UNITS VDD Supply voltage -0.3 to 7.0 V VI/O Voltage any pin -.3 to VDD +.3 V TSTG Storage Temperature range -65 to +150 °C TJ Maximum junction temperature +175 °C TLS Lead temperature (soldering 5 seconds) +300 °C ΘJC Thermal resistance junction to case 20 °C/W II DC input current ±10 mA PD Maximum power dissipation 1 W Note: 1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMIT UNITS VDD Supply voltage 4.5 to 5.5 V VIN Input voltage any pin 0 to VDD V TC Temperature range -55 to + 125 °C 2 DC ELECTRICAL CHARACTERISTICS 7 (VDD = 5.0V ±10%; VSS = 0V 6, -55°C < TC < +125°C); Unless otherwise noted, Tc is per the temperature range ordered. SYMBOL PARAMETER VT + Schmitt Trigger, positive going 1 threshold ACTS ACS VT- Schmitt Trigger, negative going 1 threshold ACTS ACS VH Schmitt Trigger, typical range of hysteresis CONDITION Input leakage current ACTS/ACS VIN = VDD or VSS 1 μA 0.40 0.25 V High-level output voltage 3 ACTS ACS IOH = -8.0mA IOH = -100μA .7VDD VDD - 0.25 IOS Short-circuit output current 2 ,4 ACTS/ACS VO = VDD and VSS -200 IOL Output current10 VIN = VDD or VSS (Sink) VOL = 0.4V Output current10 VIN = VDD or VSS (Source) VOH = VDD - 0.4V Quiescent Supply Current ΔIDDQ Quiescent Supply Current Delta ACTS V -1 VOH IDDQ V 0.9 1.5 IOL = 8.0mA IOL = 100μA Power dissipation 2, 8, 9 2.25 .7VDD 0.3 0.6 Low-level output voltage 3 ACTS ACS Ptotal UNIT V 2 VOL IOH MAX 0.5 .3VDD ACTS ACS IIN MIN V 200 mA 8 mA -8 mA CL = 50pF 1.9 mW/ MHz VDD = 5.5V 10 μA 3.1 mA For input under test VIN = VDD - 2.1V For all other inputs VIN = VDD or VSS VDD = 5.5V CIN COUT Input capacitance 5 ƒ = 1MHz @ 0V 15 pF Output capacitance 5 ƒ = 1MHz @ 0V 15 pF 3 Notes: 1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed to VIH(min) and VIL(max). 2. Supplied as a design limit but not guaranteed or tested. 3. Per MIL-PRF-38535, for current density ≤ 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765 pF/MHz. 4. Not more than one output may be shorted at a time for maximum duration of one second. 5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at frequency of 1MHz and a signal amplitude of 50mV rms maximum. 6. Maximum allowable relative shift equals 50mV. 7. All ACTS specifications are valid for radiation dose <1E6 rads(Si), and all ACS specifications are valid for radiation dose <5E5 rads(Si). 8. Power does not include power contribution of any TTL output sink current. 9. Power dissipation specified per switching output. 10. This value is guaranteed based on characterization data, but not tested. 4 AC ELECTRICAL CHARACTERISTICS 2 (VDD = 5.0V ±10%; VSS = 0V 1, -55°C < TC < +125°C); Unless otherwise noted, Tc is per the temperature range ordered. SYMBOL PARAMETER MINIMUM MAXIMUM UNIT tPHL Input to Yn 2 15 ns tPLH Input to Yn 2 12 ns Notes: 1. Maximum allowable relative shift equals 50mV. 2. For the ACTS version, all specifications are valid for radiation dose <1E6 rads(Si). For the ACS version, all specifications are valid for radiation dose <5E5 rads(Si). 5 PACKAGING Side-Brazed Packages 6 FLATPACK PACKAGES 7 UT54ACS132/UT54ACTS132: SMD 5962 * ***** ** * * * Lead Finish: (Notes 1 & 2) A = Solder C = Gold X = Optional Package Type: X = 14-lead ceramic bottom-brazed dual-in-line Flatpack C = 14-lead ceramic side-brazed dip Class Designator: Q = QML Class Q V = QML Class V Device Type: 01 Drawing Number: 96542 = UT54ACS132 96543 = UT54ACTS132 Total Dose: (Notes 3 & 4) R = 1E5 rads(Si) F = 3E5 rads(Si) G = 5E5 rads(Si) H = 1E6 rads(Si) Notes: 1. Lead finish (A,C, or X) must be specified. 2. If an “X” is specified when ordering, part marking will match the lead finish and will be either “A” (solder) or “C” (gold). 3. Total dose radiation must be specified when ordering. QML Q and QML V not available without radiation hardening. For prototype inquiries, contact factory. 4. Device type 02 is only offered with a TID tolerance guarantee of 3E5 rads(Si) or 1E6 rads(Si) and is tested in accordance with MIL-STD-883 Test Method 1019 Condition A and section 3.11.2. Device type 03 is only offered with a TID tolerance guarantee of 1E5 rads(Si), 3E5 rads(Si), and 5E5 rads(Si), and is tested in accordance with MIL-STD-883 Test Method 1019 Condition A. 8 Aeroflex Colorado Springs - Datasheet Definition Advanced Datasheet - Product In Development Preliminary Datasheet - Shipping Prototype Datasheet - Shipping QML & Reduced Hi-Rel COLORADO Toll Free: 800-645-8862 Fax: 719-594-8468 INTERNATIONAL Tel: 805-778-9229 Fax: 805-778-1980 NORTHEAST Tel: 603-888-3975 Fax: 603-888-4585 SE AND MID-ATLANTIC Tel: 321-951-4164 Fax: 321-951-4254 WEST COAST Tel: 949-362-2260 Fax: 949-362-2266 CENTRAL Tel: 719-594-8017 Fax: 719-594-8468 www.aeroflex.com [email protected] Aeroflex UTMC Microelectronic Systems Inc. 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