ACT4808N-D (5/05)

Standard Products
ACT4808N Dual Transceivers
for MACAIR (A3818, A4905, A5232, A5690) and MIL-STD-1553A/B
www.aeroflex.com/Avionics
May 25, 2005
FEATURES
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ACT4808N Dual Transceiver meets MIL-STD-1553A & B, Macair A3818, A5690,
A5232 and A4905 specs
New Low Power Model
Operates with ±12V to ±15V & +5V Power Supplies
Voltage source output
Plug-in or Flat Package
Monolithic construction
Designed for commercial, industrial and aerospace applications
MIL-PRF-38534 compliant devices available
Aeroflex-Plainview is a Class H & K MIL-PRF-38534 manufacturer
GENERAL DESCRIPTION
The Aeroflex-Plainview ACT4808N is a monolithic transceiver design which provides full compliance with Macair
(A-3818, A-4905, A-5232 and A-5690) and MIL-STD-1553A/B data bus requirements and can be considered a
"Universal" Transceiver.
The dual channel transceiver performs the front-end analog function of inputting and outputting data through a
transformer to the MIL-STD-1553 or Macair data bus.
Design of this transceiver reflects particular attention to active filter performance. This results in low bit and word
error rate with superior waveform purity and minimal zero crossover distortion. The ACT4808N series active
transmit filter design has additional high frequency roll-off to provide the required Macair low harmonic distortion
waveform without increasing the pulse delay characteristics significantly.
Efficient transmitter electrical and thermal design provides low internal power dissipation and heat rise at high as
well as low duty cycles. The receiver input threshold is set Internally.
TRANSMITTER
The Transmitter section accepts bi-phase TTL data at the input and when coupled to the data bus with a 1:1 transformer
the data bus signal produced is 7.0 Volts typical P-P at Point A-A’ (See Figure 3 or 4). When both DATA and DATA inputs
are held low or high, the transmitter output becomes a high impedance and is “removed” from the line. In addition, an
overriding “INHIBIT" input provides for the removal of the transmitter output from the line. A logic “1” signal
applied to the “INHIBIT” takes priority over the condition of the data inputs and disables the transmitter (See
Transmitter Logic Waveform, Figure 1).
The transmitter utilizes an active filter to suppress harmonics above 1 MHz to meet Macair specifications A-3818,
A-4905, A-5232 and A-5690. The transmitter may be safely operated for an indefinite period at 100% duty cycle into
a data bus short circuit (Point A-A’). The Transmitter may be safely operated for an indefinite period with the 1553
bus (Point A) short circuited at 100% duty cycle.
RECEIVER
The Receiver section accepts bi-phase differential data at the input and produces two TTL signals at the output. The
outputs are DATA and DATA, and represent positive and negative excursions of the input beyond a pre-determined
threshold (See Receiver Logic Waveform, Figure 2).
The internal threshold is nominally set to detect data bus signals exceeding 1.10 Vp-p and reject signals less than 0.6
Vp-p when used with a 1:1 turns ratio transformer (See Figure 4 for transformer data and typical connection).
A low level at the Strobe input inhibits the DATA and DATA outputs.
SCD4808N Rev B
TX DATA OUT
TX DATA IN
DRIVER
TX DATA IN
TRANSMIT
ACTIVE
FILTER
OUTPUT
STAGE
TX DATA OUT
V+
TX INHIBIT
VCC
COMP.
+5 V
RX DATA OUT
VEE
V-
RX DATA IN
RX DATA IN
INPUT
AMP
RECEIVE
ACTIVE
FILTER
COMP.
RX DATA OUT
STROBE
BLOCK DIAGRAM (WITHOUT TRANSFORMER)
DATA IN
DATA IN
INHIBIT
LINE TO LINE
OUTPUT
NOTES:
1. Line to line waveforms illustrate Macair signals, MIL-STD-1553 signals are trapezoidal.
2. DATA and DATA inputs must be complementary waveforms or 50% duty cycle average, with no delays between them.
3. DATA and DATA must be in the same state during off time (both high or low).
FIGURE 1 – TRANSMITTER LOGIC WAVEFORMS IDEALIZED
LINE TO LINE
INPUT
DATA OUT
DATA OUT
Note overlap
NOTE: Waveforms shown are for normally low devices. For normally high receiver output
level devices, the receiver outputs are swapped as shown by the dashed lines.
FIGURE 2 – RECEIVER LOGIC WAVEFORMS IDEALIZED
SCD4808N Rev B
2
ABSOLUTE MAXIMUM RATINGS
Operating Case Temperature
-55°C to +125°C
Storage Case Temperature
-65°C to +150°C
Power Supply Voltages (V CC, VEE, VL)
±12VDC to ±18VDC
Logic Input Voltage
+5VDC to +7VDC
-0.3 VDC to +5.5 VDC
Receiver Differential Input
±40 VP-P
Receiver Input Voltage (Common Mode)
±10 V
Driver Peak Output Current
150 mA
Total Package Power Dissipation over the Full Operating
Case Temperature Range
3.25 Watts
(Note: Normal operation conditions require one transmitter
on and the other off at any given time)
Maximum Junction to Case Temperature
16.25°C
Thermal resistance – Junction to Case
5°C/W
ELECTRICAL CHARACTERISTICS – DRIVER SECTION 1/ 2/
INPUT CHARACTERISTICS, TX DATA IN or TX DATA IN
Parameter
Condition
Symbol
Min
Typ
Max
Unit
"0" Input Current
VIN = 0.4V
IILD
-
-0.1
-0.2
mA
"1" Input Current
VIN = 2.7V
IIHD
-
1
40
µA
"0" Input Voltage
-
VILD
-
-
0.7
V
"1" Input Voltage
-
VIHD
2.0
-
-
V
"0" Input Current
VIN = 0.4V
IILI
-
-0.1
-0.2
mA
"1" Input Current
VIN = 2.7 V
IIHI
-
1.0
40
µA
"0" Input Voltage
-
VILI
-
-
0.7
V
"1" Input Voltage
-
VIHI
2
-
-
V
Delay from TX inhibit, (0➝1) to inhibited output
-
tDXOFF
-
350
700
nS
Delay from TX inhibit, (1➝0) to active output
-
tDXON
-
300
500
nS
Differential Output Noise, inhibit mode
3/
VNOI
-
0.8
10
mVp-p
Differential Output Impedance *
4/
ZOI
2K
-
-
Ω
Point B- B'
ZO = 70Ω
VO
26
18
29
21
32
25
Vp-p
Vp-p
5/
VOS
VOS
-
±360
±250
mVpk
mVpk
10% - 90%
tR & tF
200
250
300
nS
−
tDTX
-
240
300
nS
INHIBIT CHARACTERISTICS
* See Aeroflex Application note# 113 for reference.
OUTPUT CHARACTERISTICS
Differential output - Direct coupled stub
Differential output - Transformer coupled stub
(See Figures 3 and 4)
Differential output offset - Direct coupled stub Fig. 4
Differential output offset - Xformer coupled stub Fig. 3
Differential output rise / fall times (see Figure 5)
Delay from 50% Point of TX DATA or TX DATA input
to zero crossing of differential output.
SCD4808N Rev B
3
ELECTRICAL CHARACTERISTICS – RECEIVER SECTION
Parameter
Condition
Symbol
Min
Typ
Max
Unit
f = 1MHz
ZIN
10K
-
-
Ω
Differential Input Voltage Range
-
VIDR
-
-
40
Vp-p
Input Common Mode Voltage Range
-
VICR
10
-
-
Vp-p
Common Mode Rejection Ratio
-
CMRR
40
-
-
dB
Differential Input Impedance
STROBE CHARACTERISTICS (LOGIC "0" INHIBITS OUTPUT)
"0" Input Current
VS = 0.4 V
IIL
-
-0.2
-0.4
mA
"1" Input Current
VS = 2.7 V
IIH
-
1.0
+40
µA
"0" Input Voltage
-
VIL
-
-
0.7
V
"1" Input Voltage
-
VIH
2.0
-
-
V
Strobe Delay (Turn-on or Turn-off)
-
tSD
-
40
150
nS
VTH
0.60
0.80
1.10
Vp-p
THRESHOLD CHARACTERISTICS (SINEWAVE INPUT )
Internal Threshold Voltage Figure 4
Point B-B’
1MHz
OUTPUT CHARACTERISTICS, RX DATA AND RX DATA
"1" State
IOH = -0.4 mA
VOH
2.5
3.6
-
V
"0" State
IOL = 4 mA
VOL
-
0.35
0.5
V
Receiver Output Skew
6/
tRXSK
-
-
10
nS
Delay (average), from differential input zero
crossings to RX DATA and RX DATA output
50% points
7/
tDRX
-
300
450
nS
POWER SUPPLY CURRENTS PER CHANNEL 1/ 2/
VCC = +12V to +15V, VEE = -12V to -15V, VL = +5V
Duty Cycle
Condition
Symbol
Typ
Max
Unit
ICC
IEE
IL
5
25
18
10
35
30
mA
ICC
IEE
IL
20
40
18
30
60
30
50%
ICC
IEE
IL
40
60
18
60
80
30
100%
ICC
IEE
IL
85
105
18
120
140
30
Transmitter Standby
25%
Pt. B -B'
ZO = 70 Ω,
VO = 29 VPK-PK
Bit Pattern = FFFFHEX
Figure 4
SCD4808N Rev B
4
TYPICAL HYBRID POWER DISSIPATION *, PER CHANNEL
Power Supply
Conditions
PSC1
VCC = +15V
VEE = -15V
VL = +5V
PSC2
VCC = +15V
VEE = -12V
VL = +5V
Condition
Standby
100% Duty
Cycle
Unit
Point B-B'
ZO = 70 Ω,
VO = 29 VPK-PK
Bit Pattern = FFFFHEX
Figure 4
0.540
2.167
Watts
0.465
1.852
0.450
1.600
PSC3
VCC = +12V
VEE = -12V
VL = +5V
* See Aeroflex Application note# 112 for reference.
RECOMMENDED POWER SUPPLY VOLTAGE RANGE
+V
+11.4 Volts to +15.75 Volts
-V
-11.4 Volts to -15.75 Volts
Logic
+4.5 Volts to +5.5 Volts
Notes:
1. V CC = +15Volts ±0.75V, VEE = -15Volts ±0.75V, VIL = +5Volts ±0.5V, TC = -55°C to +125°C, unless otherwise specified.
2. All typical values are measured at +25°C.
3. Characteristics guaranteed by design, not production tested.
4. Power ON/OFF, measured from 75KHz to 1MHz at Point A-A' Figure 4, in accordance with MIL-STD-1553B paragraph 4.5.2.2.2.3.
5. At Point A-A' on Figure 3 or 4, 2.5 µS after midpoint crossing of the parity bit of the last word of a 660 µS message.
6. Receiver skew is defined as the time from the rising edge of RX DATA OUT to the rising edge of RX DATA OUT minus 500 nS, with
a sine wave input of 3 Vpk-pk at 1MHz driven into Point B-B' of Figure 4 or 2.1 Vpk-pk at 1MHz driven into Point B-B' of Figure 3. The
specification maximum is guaranteed for TA = 25°C only. Standard TTL loads applied to RX DATA Outputs.
7. This test is peformed while the Transceiver is reading its own transmission. This condition is called "Wraparound". Standard TTL loads
applied to RX DATA Outputs.
SCD4808N Rev B
5
Terminal
TRANSCEIVER
UNDER TEST
Zo
TX DATA OUT
RX DATA IN
Isolation
Transformer
Coupling
Transformer
1:N
1 : 1.414
R
B
A
RX DATA OUT
Data
Bus
Wire
Pair
Isolation
Resistors
R = 0.75 ZO
RX DATA OUT
R
B'
A'
TX DATA OUT
RX DATA IN
Zo
Terminal Input Impedance B – B'
MIL-STD-1553B para 4.5.2.1.2.3
1KΩ minimum. 75KHz – 1MHz
Transformer turns ratio:
N = 0.707
Recommend Technitrol 1553-1
FIGURE 3 – DATABUS INTERFACE USING TRANSFORMER COUPLING
(FIGURE 9, MIL-STD-1553B)
Terminal
TRANSCEIVER
UNDER TEST
TX DATA OUT
RX DATA IN
Zo
Isolation
Transformer
55Ω
1:N
B
A
Data
Bus
Wire
Pair
RX DATA OUT
RX DATA OUT
55Ω
B'
A'
TX DATA OUT
RX DATA IN
Zo
Transformer turns ratio:
N=1
Recommend Technitrol 1553-1
Terminal Input Impedance B – B'
MIL-STD-1553B para 4.5.2.2.2.3
2KΩ minimum. 75KHz – 1MHz
FIGURE 4 – DATABUS INTERFACE USING DIRECT COUPLING
(FIGURE 10, MIL-STD-1553B)
SCD4808N Rev B
6
tf*
90%
6.5V P-P MIN
8.0V P-P MAX
0 Volts
10%
tr*
* Rise and fall times measured at Point A-A’ in Figure 3 or 4
FIGURE 5 – TRANSMITTER (TX) OUTPUT WAVE FORM
LAST BIT
Magnified View
OUTPUT OFFSET
*
OUTPUT OFFSET
*
0 Volts
2.5 µsec
*Offset measured at Point A-A’ in Figure 3 or 4
FIGURE 6 – TRANSMITTER (TX) OUTPUT OFFSET
4.0
3.6
POWER DISSIPATION
WATTS
3.2
2.8
2.4
2.0
PSC 1
PSC 2
1.6
PSC 3
1.2
0.8
0.4
0
0
10
20
30
40
50
60
70
80
90 100
DUTY CYCLE, PERCENT
FIGURE 7 – TYPICAL HYBRID POWER DISSIPATION
vs. DUTY CYCLE (PER CHANNEL)
SCD4808N Rev B
7
PACKAGE PINS & FUNCTIONS
PACKAGE CONFIGURATION OUTLINE
Pin #
PLUG-IN PACKAGE
1.90 MAX
0.085
1.70
.097
19
36
0.78
MAX
0.600
18
Pin 1 & ESD
Designator
0.24
MIN
0.018 DIA.
±0.002
FLAT PACKAGE
0.78 MAX
19
18
0.015
±0.002
1.90 MAX
0.10 Typ
36
0.097
0.086 R
4 Places
0.175 MAX
Pin 1 & ESD
Designator
0.010
±0.002
0.40
MIN
2 SIDES
0.065
REF
Notes
1. Dimensions shown are in inches
2. Pins are equally spaced at 0.100±0.002 tolerance,
non-cumulative, each row
SCD4808N Rev B
8
Function
Channel
1
TX DATA OUT
A
2
TX DATA OUT
A
3
GROUND
A
4
NC
5
RX DATA OUT
A
6
STROBE
A
7
GROUND
A
8
RX DATA OUT
A
9
CASE
10
TX DATA OUT
B
11
TX DATA OUT
B
12
GROUND
B
13
NC
14
RX DATA OUT
B
15
STROBE
B
16
GROUND
B
17
RX DATA OUT
B
18
NC
19
VCC
B
20
RX DATA IN
B
21
RX DATA IN
B
22
GROUND
B
23
VEE
B
24
+5V
B
25
INHIBIT
B
26
TX DATA IN
B
27
TX DATA IN
B
28
VCC
A
29
RX DATA IN
A
30
RX DATA IN
A
31
GROUND
A
32
VEE
A
33
+5 V
A
34
INHIBIT
A
35
TX DATA IN
A
36
TX DATA IN
A
CONFIGURATIONS AND ORDERING INFORMATION
Model No.
ACT4808N-D
Receiver Data level
DESC SMD
Normally Low
Pending
Case
Plug-In Package
ACT4808N-DF
Configuration
Dual
Flat Package
ACT4808N-DI
Normally High
Plug-In Package
ACT4808N-DFI
Flat Package
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Aeroflex Microelectronic Solutions reserves the right to
change at any time without notice the specifications, design,
function, or form of its products described herein. All
parameters must be validated for each customer's application
by engineering. No liability is assumed as a result of use of
this product. No patent licenses are implied.
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SCD4808N Rev B
9