® RT6033A 4-CH Constant Current LED Driver for Display Backlight General Description The RT6033A is a 4-CH constant current sink LED drivers with Dynamic Headroom Control (DHC) function. RT6033A can provide well current matching ability, adjustable VSET to choose the suitable dropout voltage across the MOS / BTJ. Beside that, DHC will provide the stable VFB dimming, thus voltage ripple is kept as small even during the dimming. The RT6033A provides four channel constant currents with less than 3% differences in output current value among the 4-CH and ICs respectively. The constant current is adjustable by each channel external resistor (RISET). The LED brightness can also be adjusted via the EN/PWM pin with PWM dimming duty from 1% to 100%. The RT6033A can operate with external components for high current application The DHC function generates feedback signal to DC/DC control loop and regulate the output voltage. When RT6033A selects the LED string with the highest forward voltage, and then the COMP is defined according to that particular string. The COMP voltage is then compared with the voltage of VSET to determine the voltage level of VFB, which therefore control the switching of the primary controller. RT6033A's protection features include Short LED Protection (SLP), Open LED Protection (OLP) and Over Temperature Protection (OTP). When any channel triggers protection function, LED will be turned off and the FAULT pin will pull low. The RT6033A is available in SOP-16 package to achieve optimized solution for PCB space. Simplified Application Circuit VOUT COUT 4 x NLEDs DSL11 VCC FAULT RSLP RT6033A VCC RSET1 DSL14 …… Q1 ZD2 SLP CVCC1 SLP VSET VSET RSET2 VCC COMP RCOMP VFB COMP FAULT RFAULT VCC FAULT OUT1 CCOMP DC11 DC14 D1 …… COMP1 M11 PWM Signal …… CS1 EN/PWM OUT4 …… CS4 …… GND RS11 Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS6033A-02 April 2013 M14 RS14 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT6033A Features Ordering Information Wide Input Supply Voltage Range : 5V to 24V z Adjustable Channel Current z 3% Current Sense Amplifier Input Offset z VCC Under Voltage Lockout z Thermal Shutdown z Adjustable Dynamic Headroom Control (DHC) Function z LED Open/Short Protection z RoHS Compliant and Halogen Free RT6033A z Applications z z z z z Package Type S : SOP-16 Lead Plating System G : Green (Halogen Free and Pb Free) Note : Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. Pin Configurations LCD TV, MNT Display Backlight DC/DC or AC/DC LED Driver Application General Purpose Constant Current Source Architectural and Decorative LED Lighting LED Street Lighting (TOP VIEW) SLP VSET VFB COMP EN/PWM VCC OUT1 CS1 Marking Information RT6033AGS : Product Number RT6033A GSYMDNN FAULT GND OUT4 CS4 OUT3 CS3 OUT2 CS2 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 YMDNN : Date Code SOP-16 Functional Pin Description Pin No. Pin Name Pin Function 1 SLP Short LED Protection Sense Input. 2 VSET Highest Voltage LED String. 3 VFB Feedback Signal Output. 4 COMP LED String Voltage Sense. 5 EN/PWM Chip Enable (Active High) and PWM Pulse Dimming Input. 6 VCC Power Supply Input. 7 OUT1 Channel 1 Current Gate Driver Output. 8 CS1 Channel 1 Current Sense Input. 9 CS2 Channel 2 Current Sense Input. 10 OUT2 Channel 2 Current Gate Driver Output. 11 CS3 Channel 3 Current Sense Input. 12 OUT3 Channel 3 Current Gate Driver Output. 13 CS4 Channel 4 Current Sense Input. 14 OUT4 Channel 4 Current Gate Driver Output. 15 GND Power Ground. 16 FAULT Open Drain Output for Fault Detection. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS6033A-02 April 2013 RT6033A Function Block Diagram VCC BandGap Reference UVLO 0.6V + OUT1 - 4V Regulator - VDD + 8 0.4V CS1 + OUT2 - VDD 2.5V SLP EN/PWM + VCC OTP + OUT3 - CS3 COMP + VSET - VFB CS2 Fault Logic DHC + OUT4 - CS4 FAULT GND Operation The RT6033A is a 4-CH LED driver integrated with a feedback controller. When EN/PWM is go high and VCC is exceeded the voltage of the UVLO, it will start-up. During the first 256μs, RT6033A will detect which channels are using. If the CS pin < 0.4V, that channel is defined as “USED” channel. Otherwise, the channel is defined as “UN-USED” if CS pin > 0.4V. And the diver of this channel will be turned off after the un-used checking. Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS6033A-02 April 2013 Then RT6033A will enter the soft-start state, VFB is kept as 3.3V. After that period, RT6033A selects the LED string with the highest forward voltage, and then COMP is defined according to that particular string. The voltage of COMP will further compare with the voltage of VSET and determine the voltage level of VFB. Beside that, the protection function is activated after the fault blanking period. If the LED string is broken or shorted, RT6033A will turn off channels. The internal MOS of the FAULT will be turned-on, users could add an external pullhigh resistor to get this alarm signal. is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT6033A Timing Diagram VCC EN/PWM Status Fault Blanking ~ 256ms SS Start VFB = 3.3V ~ 128ms Normal Operation IC Reset (Checking Unused CHs) ~ 256µs The Time of Startup Depends on VOUT ILED Figure 1. Power On by EN/PWM Pin Signals VCC EN/PWM Status Shutdown Delay ~ 32ms Shutdown ILED Figure 2. Power Off by EN/PWM Pin Signals Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 is a registered trademark of Richtek Technology Corporation. DS6033A-02 April 2013 RT6033A Absolute Maximum Ratings z z z z z z z z z z (Note 1) Supply Input Voltage, VCC ---------------------------------------------------------------------------------------------CS1 to CS4 ----------------------------------------------------------------------------------------------------------------SLP, EN/PWM, COMP, VSET ----------------------------------------------------------------------------------------(OUT1 to OUT4), VFB, FAULT ----------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C −0.3V to 30V −0.3V to 7V −0.3V to 16V −0.3V to 16V SOP-16 ---------------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) SOP-16, θJA ---------------------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) ---------------------------------------------------------------------------------------------MM (Machine Model) ----------------------------------------------------------------------------------------------------- 1.176W Recommended Operating Conditions z z z 85°C/W 260°C 150°C −65°C to 150°C 2kV 200V (Note 4) Supply Input Voltage, VCC ---------------------------------------------------------------------------------------------- 5V to 24V Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VCC = 12V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Supply Current IVCCON VEN/PWM = 4V -- 6 -- mA Shutdown Current ISHDN VEN/PWM = 0V -- 20 -- μA Under Voltage Lockout Threshold VUVLO -- 3.7 -- V Under Voltage Lockout Threshold Hysteresis ΔVUVLO -- 500 -- mV Logic-High VIH 2 -- -- Logic-Low VIL -- -- 1 Shutdown Delay tSHDN -- 32 -- ms EN/PWM Sink Current IIH -- -- 2 μA PWM Dimming Frequency fPWM 90 -- 500 Hz 1 -- 100 % 582 600 618 mV -- 2.5 -- % Enable / PWM EN/PWM Input Threshold Voltage PWM Dimming Duty PWM Frequency = 500Hz V Current Sink CSx Reference Voltage VREF VEN/PWM = 4V Channel to Channel Accuracy VMATCH PWM Frequency = 500Hz, Duty = 80% Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS6033A-02 April 2013 (Note 5) is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT6033A Parameter Symbol Test Conditions Min Typ Max Unit Output Pins Capability OUTx Source Current IGsr 5 10 22 mA OUTx Sink Current IGsk -- 5 -- mA VSET Voltage Range VSET 2 -- 10 V VFB(MAX) VVSET = 3V, VCOMP = 2V -- 3.3 -- V VFB(MIN) VVSET = 2V, VCOMP = 3V -- 12 -- mV VFB Source Current IFBsr VVSET = 2V, VCOMP = 3V , VVFB = 1.5V -- 100 -- μA VFB Sink Current IFBsk VVSET = 3V, VCOMP = 2V, VFB = 1.5V -- 1.8 -- mA VFB Output Voltage Range Protection Short LED Protection VSLP 2.5 -- -- V Current Sink of SLP ISLP -- 100 -- μA Open LED Protection VOLP -- 0.4 -- V Over Temperature Protection TOTP -- 140 -- °C OTP Hysteresis ΔTOTP -- 30 -- °C Reset tRESET -- 256 -- μs Soft-Start tSS (Note 6) -- 128 -- ms Fault Blanking Time tFB (Note 7) -- 256 -- ms Timing Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. CSX should be left floating for unused channel(s). Note 6. During tSS, VFB = 3.3V and the protection function SLP and OLP are disabled. Note 7. The protection function SLP and OLP are disabled. Before the end of tFB. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS6033A-02 April 2013 RT6033A Typical Application Circuit For General Application VOUT COUT 100µF 4 x NLEDs RT6033A 12V RSET1 100k CVCC1 0.1µF 6 VCC CVCC2 10µF 2 VCC RFAULT 300k SLP 1 VSET RSET2 24k 90Hz to 500Hz FAULT RSLP 30k 5 EN/PWM VCC RCOMP COMP 4 OUT1 7 CS1 8 16 3 15 FAULT OUT2 10 CS2 9 VFB OUT3 12 CS3 11 GND 510k DSL1 DSL2 DSL3 DSL4 ZD1 Q1 DC1 DC2 DC3 DC4 D1 CCOMP 22nF M1 M2 M3 OUT4 14 CS4 13 M4 RS1 4.99 Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS6033A-02 April 2013 RS2 4.99 RS3 4.99 RS4 4.99 is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 VAC 90V to 265V CCOMP1 22nF CDD1 10µF COMP CDD2 1µF CX1 0.22µF COMP CS GND R7732 VDD GATE R4 10 R2 1M R1 1M RSW1 1k R5 22 D2 D1 C1 3.3nF CSW1 100pF Q2 Q1 CIN 330µF RSW2 0.05 M1 R3 100k TL431 COUT 220µF RS2 1k RS1 8.2k ZD1 60V VREF RCOMP1 CCOMP1 0.22µF 22k PC817 COMP Photo Coupler D3 RSET2 24k RSET1 100k CVCC1 1µF 2 VSET SLP RT6033A 6 VCC 1 VCC 12V ZD2 Q1 6V8S DSL11 510k CCOMP2 22nF COMP1 DC11 COMP D4 RCOMP2 SLP FAULT R SLP 30k FAULT COMP 4 RFAULT 300k 16 FAULT FAULT 7 OUT1 RFB3 51k 3 VFB CS1 8 CVFB1 33nF RFB2 OUT4 14 FPWM 7.5k 5 EN/PWM 90Hz to 500Hz CS4 13 GND 15 VSET RFB1 300k VCC 12V …… CS1 RS3 0.22nF 50 M14 RS14 4.99 …… …… RS11 4.99 M11 …… DC14 …… DSL14 4 x NLEDs RT6033A For Application Using Fly-Back Converter System is a registered trademark of Richtek Technology Corporation. DS6033A-02 April 2013 VIN 24V DS6033A-02 April 2013 CCOMP2 1nF CDC 10µF Chip Enable 5V CSS 0.33µF RCOMP1 82k CCOMP1 27nF CIN2 VIN 1µF 12V RFSW 200k CIN1 120µF EN SS FSW COMP VDC RSW1 2.7k RSW2 0.05 M1 RFAULT 300k VCC FAULT 12V FAULT OOVP 90Hz to 500Hz PWMI FB GND PGND ISW RT8525 DRV VIN D1 ROVP2 9.1k ROVP1 430k COUT 220µF RFB2 68k CVCC1 1µF 2 6 CVFB1 33nF 5 3 RSET2 24k FAULT RFAULT 300k 16 RFB1 2M RFB3 VCC 51k VSET RSET1 100k VCC 12V SLP 7 4 1 CS4 OUT4 SLP RSLP 30k DSL11 FAULT 13 CCOMP3 22nF COMP1 Q1 ZD 6V8S VCC 12V COMP DC11 RCOMP2 D2 510k 14 CS1 8 OUT1 GND 15 EN/PWM VFB FAULT COMP VSET VCC RT6033A …… Copyright © 2013 Richtek Technology Corporation. All rights reserved. …… RS11 4.99 …… M11 …… DC14 …… DSL14 RS14 4.99 M14 4 x NLEDs 2 6 5 3 16 CVFB2 33nF FAULT VSET CVCC2 1µF VCC 12V CS1 OUT1 COMP OUT4 GND CS4 15 EN/PWM VFB FAULT VSET SLP RT6033A VCC …… L1 33µH SLP 13 14 8 7 COMP 4 7 COMP1 DC21 DSL21 RS21 4.99 …… …… M21 …… DC24 …… DSL24 RS24 4.99 M24 4 x NLEDs RT6033A For Application Using Multi-Chip Boost Converter System is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT6033A Typical Operating Characteristics Supply Current vs. Temperature 7.0 6.5 6.5 Supply Current (mA) Supply Current (mA) Supply Current vs. Input Voltage 7.0 6.0 5.5 5.0 6.0 5.5 5.0 4.5 4.5 VEN/PWM = 4V VEN/PWM = 4V 4.0 4.0 5 9 13 17 21 25 -50 -25 0 50 75 100 125 LEDx Current vs. PWM Duty Cycle 1.8 120 1.6 100 LEDx Current (mA) Threshold Voltage (V) EN/PWM Threshold Voltage vs. Input Voltage V IH 1.4 VIL 1.2 25 Temperature (°C) Input Voltage (V) 1.0 0.8 ILED1 ILED2 ILED3 ILED4 80 60 40 20 VEN/PWM = 4V VEN/PWM = 4V, FPWM = 160Hz 0.6 0 5 9 13 17 21 25 0 20 Input Voltage (V) 40 60 80 100 PWM Duty Cycle (%) CSx Reference Voltage vs. Input Voltage LEDx Current vs. Input Voltage 150 0.7 CS1 CS2 CS3 CS4 0.5 0.4 LEDx Current (mA) Reference Voltage (V) 0.6 0.3 0.2 120 ILED1 ILED2 ILED3 ILED4 90 60 30 0.1 VEN/PWM = 4V 0.0 VEN/PWM = 4V 0 5 9 13 17 21 Input Voltage (V) Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 25 5 9 13 17 21 25 Input Voltage (V) is a registered trademark of Richtek Technology Corporation. DS6033A-02 April 2013 RT6033A Power On VFB Output Voltage vs. Input Voltage 4.0 Output Voltage (V) VEN/PWM = 4V 3.2 VCC = 12V, ILED1 = 120mA V FB(MAX) VEN/PWM (2V/Div) 2.4 VFB (2V/Div) 1.6 0.8 I LED1 (100mA/Div) V FB(MIN) 0.0 5 9 13 17 21 Time (1ms/Div) 25 Input Voltage (V) Power Off DHC Function VCC = 12V, ILED1 = 120mA VCOMP = VSET = 1.8V, VFB = 2.3V TSHDN = 32ms VEN/PWM (2V/Div) VCOMP (1V/Div) VFB (2V/Div) VSET (1V/Div) VFB (2V/Div) I LED1 (100mA/Div) Time (25ms/Div) Time (10μs/Div) Open Protection Short Protection VCC = 12V, VEN/PWM = 4V, ILED1 = 120mA VEN/PWM (5V/Div) VCS1 (100mV/Div) VEN/PWM (5V/Div) TFB = 256ms TSHDN = 32ms VFB (2V/Div) VCC = 12V, VEN/PWM = 4V, ILED1 = 120mA VSLP (2V/Div) TSS = 128ms I LED1 (100mA/Div) I LED2 (100mA/Div) Time (100ms/Div) Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS6033A-02 April 2013 Time (250ms/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT6033A Applications Information The RT6033A is an 4-CH LED current source controller. This device can also drive an external N-MOSFET for various applications. The RT6033A regulates the lowest cathode voltage of the LED strings and generates a feedback control signal to a primary controller to regulate the LED current. Each LED channel current is accurately matched and controlled by sensing an external resistor in series with the MOSFET. All channels' LED brightness can be precisely controlled by applying a PWM signal to the EN/PWM pin. The RT6033A also features several protection functions including LED short protection, LED open protection, and over temperature protection. The device is totally turned off by pulling the EN/PWM pin low after 32ms. RT6033A. The feedback level of the whole system is defined by the resistive voltage divider (RSET1, RSET2) at the VSET pin. The minimum setting of the VSET pin voltage is according to the following equation : Minimum VVSET = VF + VDS + 0.6 Where VF = VD1 + VDC1 VCC VOUT DC1 COMP D1 …… + VF - COMP 2 COMP1 + VDS - Under Voltage Lockout To prevent abnormal device operation caused by low input voltages, an under voltage lockout is included which shutdown the device at voltages lower than 3.7V. All functions will be turned off in this state. LED Current Setting Figure 3. COMP Circuit where VF (VD1 + VDC1) is the forward voltage of the diodes and VDS is the dropout voltage of the external MOSFET. Besides, it can improve thermal performance of external MOSFET by VSET pin voltage setting. The loop structure keeps the CS pin voltage, VCSx (x = 1 to 4), equal to the reference voltage, VREF. Therefore, by connecting the resistor, RSx (x = 1 to 4) between the CS pin and GND, the LED current can be determined via the value of RSx. The maximum LED current is calculated according to the following equation : V ILEDx = CSx RSx The R1, R2 and R3 selection is shown in below equation : Brightness Control Where VOUT is converter output voltage, VREF is converter reference voltage and typical IFB is 100μA. The connection is shown as the following Figure 4. The RT6033A provides a PWM dimming function. The LED string current sinks are turned on/off by the PWM signals applied at the EN/PWM pin. Thus, the average LED current can be calculated according to the following equation : V Average ILEDx = CS x duty RSx where duty is the duty cycle of the PWM signal. Dynamic Headroom Control Function The Dynamic Headroom Control (DHC) function is used to generate feedback signal to adjust primary converter output voltage with regulate the LED current of the Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 VOUT(default) = ( R2 + 1) × VREF R1 R2 + VOUT (MAX.) = ( ) × (VREF − 12m) + VOUT(default) R3 VOUT −(MIN.) = ( R2 ) × (VREF − 3.3) + VOUT(default) R3 R3(MIN.) = VFB − VREF IFB,SR(MAX) Output Voltage of Converter (VOUT) R2 R3 Reference Voltage of Converter (VREF) R1 VFB Output Voltage (10m to 3.3V) of RT6033A Figure 4. DHC Function Setting Circuit is a registered trademark of Richtek Technology Corporation. DS6033A-02 April 2013 RT6033A Chip Enable and PWM Dimming Operation Pull the EN/PWM pin low to drive the device into shutdown mode. Drive the EN pin high to turn on the device again. To control LED brightness, the RT6033A can perform dimming function by applying a PWM signal to the EN/ PWM pin. The average LED current is proportional to the PWM signal duty cycle. MOSFET Selection The RT6033A is designed to drive on external N-MOSFET pass element. MOSFET selection criteria include threshold voltage, VGS(TH), maximum continuous drain current, ID, on resistance, RDS(ON). ,maximum drain-tosource voltage, VDS(MAX), and package thermal resistance, θJA. Input Capacitors Selection The input capacitor reduces current spikes from the input supply and minimizes noise injection to the converter. A ceramic capacitor is recommended for the input capacitor due to its high ripple current, high voltage rating and low ESR, which makes them ideal for switching regulator applications. A 10μF capacitance is sufficient for most applications. Nevertheless, a higher or lower value may be used depending on the noise level from the input supply and the input current to the converter. Note that the voltage rating of the input capacitor must be greater than the maximum input voltage. For better voltage filtering, ceramic capacitors with low ESR are recommended. X5R and X7R types are suitable because of their wide voltage and temperature ranges. Diode Selection The reverse voltage rating is important parameters for consideration when making a diode selection. Make sure that the diode's reverse voltage rating exceeds the maximum output voltage. Power On/Off Sequence When converter's output and VCC is already ready. EN/ PWM pulled high will enable the RT6033A, and IC will check channel unused or not in first period (256μs).The unused channel must be floating. The second period is 128ms soft start time, the RT6033A feedback voltage is 3.3V in this period. Then, IC gets into the fault blanking time (32ms) when PWM duty is 100% since fault blanking counter depends on the PWM on period. After the third period, fault function will turn on. About power off sequence, IC will shut down after 32ms when EN/PWM pin is pulled low. The power on/off flow-chart are shown as the following Figure 5. VCC and EN/PWM Power on Start (RESET) Disable that Channel (Un-used channel must Be float.) Un-used IC Latched Power Reset YES Status of Channel Is CSx floating ? (256µs) EN/PWM = L TSHDN > 32ms ? Used VFB = 3.3V OLP = SLP = L Start-up Soft-start Function and ILED Turn on (128ms) OLP = SLP = L Fault Blacking Time (256ms) Over Temperature Protection ? Normal Operation FAULT = H Tj > 140 Turn off All Channel FAULT = L YES NO OLP (TF < 20µs) SLP (TF < 2µs) Tj < 110 Auto-recovery OPEN / SHORT OLP(TF > 20µs) SLP(TF > 2µs) NO LED OPEN/SHORT Protection ? VSLP > 2.5V VOLP < 0.4V Turn-off All Channel YES Figure 5. Power On/Off Flow Chart Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS6033A-02 April 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 RT6033A If the CS pin < 0.4V after a fault blanking period, the counter will be triggered when PWM is high. Moreover, there is a 4μs blanking time on every rising part of PWM. When the counter accumulates to 20μs, all channels will be off and latched. The FAULT will be pulled low. The fault state can only be released by pulling the EN/PWM pin low for 32ms. Short Protection If the SLP pin > 2.5V after a fault blanking period, the counter will be triggered when PWM is high. Moreover, there is a 4μs blanking time on every rising part of PWM . When the counter accumulates to 2μs, all channels will be off and latched. The FAULT will be pulled low. The fault state can only be released by pulling the EN/PWM pin for 32ms. The maximum power dissipation at TA = 25°C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (85°C/W) = 1.176W for SOP-16 package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 6 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Maximum Power Dissipation (W)1 Open Protection Over Temperature The RT6033A has an Over Temperature Protection (OTP) function to prevent excessive power dissipation from overheating the device. The OTP shuts down switching operation and disables all channels if the junction temperature exceeds 140°C and sends a fault signal. The channels are re-enabled when the junction temperature cools down by approximately 30°C. Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. 1.2 Four-Layer PCB 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 6. Derating Curve of Maximum Power Dissipation Layout Consideration Follow the PCB layout guidelines for optimal performance of the RT6033A. ` Keep the traces of the main current paths as short and wide as possible. ` Put the input capacitor as close as possible to the device pins (VCC and GND). ` The VFB path must be kept away from noise and short enough to connect VREF. ` The drain pad must large enough to reduce thermal on MOSFET. ` In order maintain ILEDx current match, the grounding paths of each RSx should as similar as possible. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For SOP-16 package, the thermal resistance, θJA, is 85°C/W on a standard JEDEC 51-7 four-layer thermal test board. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 is a registered trademark of Richtek Technology Corporation. DS6033A-02 April 2013 RT6033A The VFB path must be kept away from noise and short enough to connect VREF. R1 RSET2 VREF Reference Voltage of Converter VOUT of Converter RSET1 R2 0 SLP CVCC capacitor must be placed as close to the IC as possible. R3 0 CCOMP 0 ohm is use to write jump. RCOMP CVCC M1 0 RS1 0 16 FAULT VSET 2 15 GND VFB 3 14 OUT4 COMP 4 13 CS4 EN/PWM 5 12 OUT3 VCC 6 11 CS3 OUT1 7 10 OUT2 CS1 8 9 CS2 0 M2 M4 RS2 0 0 0 RS4 0 0 M6 RS6 0 Q1 ZD RSLP 0 VOUT OF Converter COUT In order maintain ILEDX current match, the grounding paths of each RSX should as similar as possible. The drian pad must large enough to reduce thermal on MOSFET. Figure 7. PCB Layout Guide for Single-clad Board Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS6033A-02 April 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 15 RT6033A Outline Dimension H A M B J F C I D Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 9.804 10.008 0.386 0.394 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.178 0.254 0.007 0.010 I 0.102 0.254 0.004 0.010 J 5.791 6.198 0.228 0.244 M 0.406 1.270 0.016 0.050 16–Lead SOP Plastic Package Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com 16 DS6033A-02 April 2013