EVBUM2083/D - 235.0 KB

NB6N239SMNEVB
NB6N239SMNEVB
Evaluation Board User's
Manual
http://onsemi.com
EVAL BOARD USER’S MANUAL
Description
Board Features
• Accommodates the electrical characterization of
The NB6N239S Evaluation Board was designed to
provide a flexible and convenient platform to quickly
evaluate, characterize and verify the performance and
operation of the NB6N239S. This user’s manual provides
detailed information on board contents, layout and its use. It
should be used in conjunction with the NB6N239S
data sheet: (www.onsemi.com).
The NB6N239S is a differential Receiver to differential
LVDS Clock Divider. The board features Output Enable
control of the Outputs.
•
•
•
•
•
the NB6N239S (and the NB6L239)
Selectable Jumper for the VT pin, minimizing cabling
CLK/CLK input and QA/QA and QB/QB output pins
are accessed via SMA connectors
MR, EN and Clock Divide Select pins are accessed via
SMA Connectors or by the Logic Switches
Convenient and Compact Board Layout
3.3 V Power Supply Operating Range
Figure 1. Evaluation Board
© Semiconductor Components Industries, LLC, 2012
February, 2012 − Rev. 1
1
Publication Order Number:
EVBUM2083/D
NB6N239SMNEVB
PROCEDURE
Lab Setup and Measurement Procedure
Table 1. POWER SUPPLY CONFIGURATIONS
Power Supply
Connector
Color
Single Power Supply
VCC
RED
VCC = +3.3 V
−
BLACK −
SMAGND
GND – 239S
BLACK
Equipment Used
•
•
•
•
•
Device
Agilent Signal Generator #8133A
Tektronix TDS8000 Oscilloscope
Agilent #6624A DC Power Supply
Digital Voltmeter
Matched High−Speed Cables with SMA Connectors
Pin
GND = 0 V
Power Supply Connections
The NB6N239S has a positive supply pin, VCC, and a
negative supply pin, GND.
Power supply terminals VCC, GND and SMAGND are
provided. The SMAGND terminal is primarily used for the
NB6L239; for the NB6N239S, it can be connected to GND.
Power Supply
+3.3 V
+
0.0 V
−
GND
VCC
Figure 2. Power Supply Connections
MR
SELA0 SELA1
VCC
SMAGND VEE/GND
Digital Oscilloscope
or Frequency Counter
Signal Generator
QA
100 W
CLK
QA
CLK
QB
VBBAC
100 W
QB
OUT
OUT
Trigger Out
EN
SELB0
SELB1
H1 − Z
H1 − Z
H1 − Z
H1 − Z
Trigger
50 W
Figure 3. Evaluation Board
Board Layout
L3 VCC and GND (positive and negative power supply)
L4 Signal (bottom)
The evaluation board is constructed with Rogers material
with 50 W trace impedances designed to minimize noise,
achieve high bandwidth and minimize crosstalk.
Control and Select Pins
The Control / Select pins, MR, SELXn and EN, can be
accessed via the appropriate SMA connector. These pins can
also be manually controlled by using the H/L switch. When
Layer Stack
L1 Signal (top) (Rogers)
L2 SMA Ground
http://onsemi.com
2
NB6N239SMNEVB
HIGH voltage is not forced on the pin. In the LOW position,
the switch forces the MR pin to the negative power supply
rail, a logic LOW.
using the switch, the SMA connector should be left open.
When using the SMA connector, the switch must be in the
“OPEN” position.
The SELXn and EN device pins have internal pulldown
resistors. The NB6N239S evaluation board was designed to
take advantage of this attribute. When the SELXn and EN
switch is in the logic LOW position, the input pin “floats” to
a logic LOW owing to the pulldown resistor; a logic LOW
voltage is not forced on the pin. In the HIGH position, the
switch forces the SELXn and EN pin to the positive power
supply rail, a logic HIGH.
The MR device pin has an internal pullup resistor. When
the MR switch is in the logic HIGH position, the input pin
“floats” to a logic HIGH owing to the pullup resistor; a logic
VBB = VBBAC
VBB labeled on the board is actually VBBAC per the
data sheet.
VT
The VT pin can be set to VCC, VEE (239) GND (239S),
VBB or SMAGND by using a jumper.
VEE / GND
VEE is the negative supply for the NB6L239. GND is the
negative supply for the NB6N239S.
Table 2. PIN DESCRIPTION (refer to data sheet, NB6N239S/D)
Open Pin
Default
Pin #
16−QFN
Pin Name
1
VT
2
CLK
Input
LVPECL, CML, LVDS,
HSTL
Noninverted Differential CLOCK Input.
3
CLK
Input
LVPECL, CML, LVDS,
HSTL
Inverted Differential CLOCK Input.
4
VBBAC
Output
Reference Voltage
5
EN
Input
L
LVCMOS/LVTTL Input
Synchronous Output Enable
6
SELB0
Input
L
LVCMOS/LVTTL Input
Clock Divide Select Pin
7
SELB1
Input
L
LVCMOS/LVTTL Input
Clock Divide Select Pin
8
GND
Negative Power
Supply
9
QB
Output
LVDS
Inverted Differential Output. Typically
terminated with 100 W resistor across outputs.
10
QB
Output
LVDS
Noninverted Differential Output. Typically
terminated with 100 W resistor across outputs.
11
QA
Output
LVDS
Inverted Differential Output. Typically
terminated with 100 W resistor across outputs.
12
QA
Output
LVDS
Noninverted Differential Output. Typically
terminated with 100 W resistor across outputs.
13
VCC
Positive Power
Supply
14
SELA1
Input
15
SELA0
16
MR
EP
Negative Power
Supply (opt)
I/O
Type
Function
Internal 100 W Center
Output Voltage Reference for Capacitor
Coupled Inputs, Only.
Negative Supply Voltage
Positive Power Supply
L
LVCMOS/LVTTL
Clock Divide Select Pin
Input
L
LVCMOS/LVTTL Input
Clock Divide Select Pin
Input
H
LVCMOS/LVTTL Input
Master Reset Asynchronous, Default Open
High, Asserted LOW
The Exposed Pad on the QFN−16 package
bottom is thermally connected to the die for
improved heat transfer out of package. The
pad is not electrically connected to the die, but
is recommended to be electrically and
thermally connected to GND on the PC board.
http://onsemi.com
3
NB6N239SMNEVB
EVALUATION BOARD APPLICATION INFORMATION
Table 3. EVALUATION BOARD BILL OF MATERIALS
Component
Description
Qty
Connector
Rosenberger SMA #32K243−40ME3
6
Capacitor C2, C4
22 mF, 10%, 16 V, KEMET T494D221T016AT, Case D
2
Capacitor C1, C3
0.1 mF, 10%, 16 V, KEMET C060C104K4RAC
4
Switch
Grayhill #78B02
4
Jumper Header
100 mil, Berg
5
Jumper/Shunt
1
Resistor R1, R2
1 kW, 0603, 1%, VISHAY 52K8015
6
Banana Jack
Deltron #EF681 150−039 Red
1
Banana Jack
Deltron #EF681 150−040 Black
1
Banana Jack
Deltron #EF681 150−043 Yellow
1
Stand−offs with Screws
Optional
4
NB6L239 or NB6N239S
QFN−16 Part Mounted on Board
1
http://onsemi.com
4
NB6N239SMNEVB
S
M
A
S
M
A
S
M
A
H
L
VEE
16
VBBAC
VEE/GND
15
14
13
1
12
2
11
TOP VIEW
CLK
SMA
SMA
VT
CLK
SMA
VCC
Switch MR SELA0 SELA1 V
CC
VCC
VTT
H
L
VBBAC
3
10
4
9
5
EN
6
7
Switch
S
M
A
QA
QB
QB
SMA
SMA
SMA
SMA
8
SELB0 SELB1 VEE
H
L
VEE
QA
S
M
A
H
L
VEE − 239
GND − 239S
S
M
A
Switch
H = VCC
L = VEE/GND
Rosenberger connectors with matched trace launches
Switch for MR
Normally open switch for EN
CLK & CLK traces – equal length
All Q Output traces – equal length
“Side−mount” banana jacks for power supplies (can be located on backside of board)
VT pin has a jumper capability to VCC, VEE / GND, VTT (SMAGND), or VBBAC.
Figure 4. Evaluation Demo Board
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
http://onsemi.com
5
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
EVBUM2083/D